arch/mips/dts/mt7628a.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <dt-bindings/clock/mt7628-clk.h>
   3
   4 / {
   5         #address-cells = <1>;
   6         #size-cells = <1>;
   7         compatible = "ralink,mt7628a-soc";
   8
   9         cpus {
  10                 #address-cells = <1>;
  11                 #size-cells = <0>;
  12
  13                 cpu@0 {
  14                         compatible = "mti,mips24KEc";
  15                         device_type = "cpu";
  16                         reg = <0>;
  17                 };
  18         };
  19
  20         resetc: reset-controller {
  21                 compatible = "ralink,rt2880-reset";
  22                 #reset-cells = <1>;
  23         };
  24
  25         cpuintc: interrupt-controller {
  26                 #address-cells = <0>;
  27                 #interrupt-cells = <1>;
  28                 interrupt-controller;
  29                 compatible = "mti,cpu-interrupt-controller";
  30         };
  31
  32         palmbus@10000000 {
  33                 compatible = "palmbus", "simple-bus";
  34                 reg = <0x10000000 0x200000>;
  35                 ranges = <0x0 0x10000000 0x1FFFFF>;
  36
  37                 #address-cells = <1>;
  38                 #size-cells = <1>;
  39
  40                 sysc: system-controller@0 {
  41                         compatible = "ralink,mt7620a-sysc", "syscon";
  42                         reg = <0x0 0x100>;
  43                 };
  44
  45                 syscon-reboot {
  46                         compatible = "syscon-reboot";
  47                         regmap = <&sysc>;
  48                         offset = <0x34>;
  49                         mask = <0x1>;
  50                 };
  51
  52                 clkctrl: clkctrl@0x2c {
  53                         reg = <0x2c 0x8>, <0x10 0x4>;
  54                         reg-names = "syscfg0", "clkcfg";
  55                         compatible = "mediatek,mt7628-clk";
  56                         #clock-cells = <1>;
  57                         u-boot,dm-pre-reloc;
  58                 };
  59
  60                 pinctrl: pinctrl@60 {
  61                         compatible = "mediatek,mt7628-pinctrl";
  62                         reg = <0x3c 0x2c>, <0x1300 0x100>;
  63                         reg-names = "gpiomode", "padconf";
  64
  65                         pinctrl-names = "default";
  66                         pinctrl-0 = <&state_default>;
  67
  68                         state_default: pin_state {
  69                         };
  70
  71                         spi_single_pins: spi_single_pins {
  72                                 groups = "spi";
  73                                 function = "spi";
  74                         };
  75
  76                         spi_dual_pins: spi_dual_pins {
  77                                 spi_master_pins {
  78                                         groups = "spi";
  79                                         function = "spi";
  80                                 };
  81
  82                                 spi_cs1_pin {
  83                                         groups = "spi cs1";
  84                                         function = "spi cs1";
  85                                 };
  86                         };
  87
  88                         uart0_pins: uart0_pins {
  89                                 groups = "uart0";
  90                                 function = "uart0";
  91                         };
  92
  93                         uart1_pins: uart1_pins {
  94                                 groups = "uart1";
  95                                 function = "uart1";
  96                         };
  97
  98                         uart2_pins: uart2_pins {
  99                                 groups = "uart2";
 100                                 function = "uart2";
 101                         };
 102
 103                         i2c_pins: i2c_pins {
 104                                 groups = "i2c";
 105                                 function = "i2c";
 106                         };
 107
 108                         ephy_iot_mode: ephy_iot_mode {
 109                                 ephy4_1_dis {
 110                                         groups = "ephy4_1_pad";
 111                                         function = "digital";
 112                                 };
 113
 114                                 ephy0_en {
 115                                         groups = "ephy0";
 116                                         function = "enable";
 117                                 };
 118                         };
 119
 120                         ephy_router_mode: ephy_router_mode {
 121                                 ephy4_1_en {
 122                                         groups = "ephy4_1_pad";
 123                                         function = "analog";
 124                                 };
 125
 126                                 ephy0_en {
 127                                         groups = "ephy0";
 128                                         function = "enable";
 129                                 };
 130                         };
 131
 132                         sd_iot_mode: sd_iot_mode {
 133                                 ephy4_1_dis {
 134                                         groups = "ephy4_1_pad";
 135                                         function = "digital";
 136                                 };
 137
 138                                 sdxc_en {
 139                                         groups = "sdmode";
 140                                         function = "sdxc";
 141                                 };
 142
 143                                 sdxc_iot_mode {
 144                                         groups = "sd router";
 145                                         function = "iot";
 146                                 };
 147
 148                                 sd_clk_pad {
 149                                         pins = "sd_clk";
 150                                         drive-strength-4g = <8>;
 151                                 };
 152                         };
 153
 154                         sd_router_mode: sd_router_mode {
 155                                 sdxc_router_mode {
 156                                         groups = "sd router";
 157                                         function = "router";
 158                                 };
 159
 160                                 sdxc_map_pins {
 161                                         groups = "gpio0", "i2s", "sdmode", \
 162                                                  "i2c", "uart1";
 163                                         function = "gpio";
 164                                 };
 165
 166                                 sd_clk_pad {
 167                                         pins = "gpio0";
 168                                         drive-strength-28 = <8>;
 169                                 };
 170                         };
 171
 172                         emmc_iot_8bit_mode: emmc_iot_8bit_mode {
 173                                 ephy4_1_dis {
 174                                         groups = "ephy4_1_pad";
 175                                         function = "digital";
 176                                 };
 177
 178                                 emmc_en {
 179                                         groups = "sdmode";
 180                                         function = "sdxc";
 181                                 };
 182
 183                                 emmc_iot_mode {
 184                                         groups = "sd router";
 185                                         function = "iot";
 186                                 };
 187
 188                                 emmc_d4_d5 {
 189                                         groups = "uart2";
 190                                         function = "sdxc d5 d4";
 191                                 };
 192
 193                                 emmc_d6 {
 194                                         groups = "pwm1";
 195                                         function = "sdxc d6";
 196                                 };
 197
 198                                 emmc_d7 {
 199                                         groups = "pwm0";
 200                                         function = "sdxc d7";
 201                                 };
 202
 203                                 sd_clk_pad {
 204                                         pins = "sd_clk";
 205                                         drive-strength-4g = <8>;
 206                                 };
 207                         };
 208                 };
 209
 210                 watchdog: watchdog@100 {
 211                         compatible = "ralink,mt7628a-wdt", "mediatek,mt7621-wdt";
 212                         reg = <0x100 0x30>;
 213
 214                         resets = <&resetc 8>;
 215                         reset-names = "wdt";
 216
 217                         interrupt-parent = <&intc>;
 218                         interrupts = <24>;
 219                 };
 220
 221                 intc: interrupt-controller@200 {
 222                         compatible = "ralink,rt2880-intc";
 223                         reg = <0x200 0x100>;
 224
 225                         interrupt-controller;
 226                         #interrupt-cells = <1>;
 227
 228                         resets = <&resetc 9>;
 229                         reset-names = "intc";
 230
 231                         interrupt-parent = <&cpuintc>;
 232                         interrupts = <2>;
 233
 234                         ralink,intc-registers = <0x9c 0xa0
 235                                                  0x6c 0xa4
 236                                                  0x80 0x78>;
 237                 };
 238
 239                 memory-controller@300 {
 240                         compatible = "ralink,mt7620a-memc";
 241                         reg = <0x300 0x100>;
 242                 };
 243
 244                 gpio@600 {
 245                         #address-cells = <1>;
 246                         #size-cells = <0>;
 247
 248                         compatible = "mtk,mt7628-gpio", "mtk,mt7621-gpio";
 249                         reg = <0x600 0x100>;
 250
 251                         interrupt-parent = <&intc>;
 252                         interrupts = <6>;
 253
 254                         gpio0: bank@0 {
 255                                 reg = <0>;
 256                                 compatible = "mtk,mt7621-gpio-bank";
 257                                 gpio-controller;
 258                                 #gpio-cells = <2>;
 259                         };
 260
 261                         gpio1: bank@1 {
 262                                 reg = <1>;
 263                                 compatible = "mtk,mt7621-gpio-bank";
 264                                 gpio-controller;
 265                                 #gpio-cells = <2>;
 266                         };
 267
 268                         gpio2: bank@2 {
 269                                 reg = <2>;
 270                                 compatible = "mtk,mt7621-gpio-bank";
 271                                 gpio-controller;
 272                                 #gpio-cells = <2>;
 273                         };
 274                 };
 275
 276                 spi0: spi@b00 {
 277                         compatible = "ralink,mt7621-spi";
 278                         reg = <0xb00 0x40>;
 279                         #address-cells = <1>;
 280                         #size-cells = <0>;
 281
 282                         clocks = <&clkctrl CLK_SPI>;
 283                 };
 284
 285                 uart0: uartlite@c00 {
 286                         compatible = "mediatek,hsuart", "ns16550a";
 287                         reg = <0xc00 0x100>;
 288
 289                         clocks = <&clkctrl CLK_UART0>;
 290
 291                         resets = <&resetc 12>;
 292                         reset-names = "uart0";
 293
 294                         interrupt-parent = <&intc>;
 295                         interrupts = <20>;
 296
 297                         reg-shift = <2>;
 298                 };
 299
 300                 uart1: uart1@d00 {
 301                         compatible = "mediatek,hsuart", "ns16550a";
 302                         reg = <0xd00 0x100>;
 303
 304                         clocks = <&clkctrl CLK_UART1>;
 305
 306                         resets = <&resetc 19>;
 307                         reset-names = "uart1";
 308
 309                         interrupt-parent = <&intc>;
 310                         interrupts = <21>;
 311
 312                         reg-shift = <2>;
 313                 };
 314
 315                 uart2: uart2@e00 {
 316                         compatible = "mediatek,hsuart", "ns16550a";
 317                         reg = <0xe00 0x100>;
 318
 319                         clocks = <&clkctrl CLK_UART2>;
 320
 321                         resets = <&resetc 20>;
 322                         reset-names = "uart2";
 323
 324                         interrupt-parent = <&intc>;
 325                         interrupts = <22>;
 326
 327                         reg-shift = <2>;
 328                 };
 329         };
 330
 331         eth@10110000 {
 332                 compatible = "mediatek,mt7628-eth";
 333                 reg = <0x10100000 0x10000
 334                        0x10110000 0x8000>;
 335
 336                 syscon = <&sysc>;
 337         };
 338
 339         usb_phy: usb-phy@10120000 {
 340                 compatible = "mediatek,mt7628-usbphy";
 341                 reg = <0x10120000 0x1000>;
 342
 343                 #phy-cells = <0>;
 344
 345                 ralink,sysctl = <&sysc>;
 346
 347                 resets = <&resetc 22 &resetc 25>;
 348                 reset-names = "host", "device";
 349
 350                 clocks = <&clkctrl CLK_UPHY>;
 351                 clock-names = "cg";
 352         };
 353
 354         ehci@101c0000 {
 355                 compatible = "generic-ehci";
 356                 reg = <0x101c0000 0x1000>;
 357
 358                 phys = <&usb_phy>;
 359                 phy-names = "usb";
 360
 361                 interrupt-parent = <&intc>;
 362                 interrupts = <18>;
 363         };
 364 };