1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
6 #include <dt-bindings/clock/bcm6358-clock.h>
7 #include <dt-bindings/dma/bcm6358-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6358-reset.h>
10 #include "skeleton.dtsi"
13 compatible = "brcm,bcm6358";
20 reg = <0xfffe0000 0x4>;
26 compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
33 compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
41 compatible = "simple-bus";
46 periph_osc: periph-osc {
47 compatible = "fixed-clock";
49 clock-frequency = <50000000>;
53 periph_clk: periph-clk {
54 compatible = "brcm,bcm6345-clk";
55 reg = <0xfffe0004 0x4>;
60 pflash: nor@1e000000 {
61 compatible = "cfi-flash";
62 reg = <0x1e000000 0x2000000>;
71 compatible = "simple-bus";
76 pll_cntl: syscon@fffe0008 {
77 compatible = "syscon";
78 reg = <0xfffe0008 0x4>;
82 compatible = "syscon-reboot";
88 periph_rst: reset-controller@fffe0034 {
89 compatible = "brcm,bcm6345-reset";
90 reg = <0xfffe0034 0x4>;
94 wdt: watchdog@fffe005c {
95 compatible = "brcm,bcm6345-wdt";
96 reg = <0xfffe005c 0xc>;
97 clocks = <&periph_osc>;
101 compatible = "wdt-reboot";
105 gpio1: gpio-controller@fffe0080 {
106 compatible = "brcm,bcm6345-gpio";
107 reg = <0xfffe0080 0x4>, <0xfffe0088 0x4>;
115 gpio0: gpio-controller@fffe0084 {
116 compatible = "brcm,bcm6345-gpio";
117 reg = <0xfffe0084 0x4>, <0xfffe008c 0x4>;
124 leds: led-controller@fffe00d0 {
125 compatible = "brcm,bcm6358-leds";
126 reg = <0xfffe00d0 0x8>;
127 #address-cells = <1>;
133 uart0: serial@fffe0100 {
134 compatible = "brcm,bcm6345-uart";
135 reg = <0xfffe0100 0x18>;
136 clocks = <&periph_osc>;
141 uart1: serial@fffe0120 {
142 compatible = "brcm,bcm6345-uart";
143 reg = <0xfffe0120 0x18>;
144 clocks = <&periph_osc>;
150 compatible = "brcm,bcm6358-spi";
151 reg = <0xfffe0800 0x70c>;
152 #address-cells = <1>;
154 clocks = <&periph_clk BCM6358_CLK_SPI>;
155 resets = <&periph_rst BCM6358_RST_SPI>;
156 spi-max-frequency = <20000000>;
162 memory-controller@fffe1200 {
163 compatible = "brcm,bcm6358-mc";
164 reg = <0xfffe1200 0x4c>;
168 ehci: usb-controller@fffe1300 {
169 compatible = "brcm,bcm6358-ehci", "generic-ehci";
170 reg = <0xfffe1300 0x100>;
177 ohci: usb-controller@fffe1400 {
178 compatible = "brcm,bcm6358-ohci", "generic-ohci";
179 reg = <0xfffe1400 0x100>;
186 usbh: usb-phy@fffe1500 {
187 compatible = "brcm,bcm6358-usbh";
188 reg = <0xfffe1500 0x28>;
190 resets = <&periph_rst BCM6358_RST_USBH>;
195 enet0: ethernet@fffe4000 {
196 compatible = "brcm,bcm6348-enet";
197 #address-cells = <1>;
199 reg = <0xfffe4000 0x2dc>;
200 clocks = <&periph_clk BCM6358_CLK_ENET0>;
201 dmas = <&iudma BCM6358_DMA_ENET0_RX>,
202 <&iudma BCM6358_DMA_ENET0_TX>;
209 enet1: ethernet@fffe4800 {
210 compatible = "brcm,bcm6348-enet";
211 #address-cells = <1>;
213 reg = <0xfffe4800 0x2dc>;
214 clocks = <&periph_clk BCM6358_CLK_ENET1>;
215 dmas = <&iudma BCM6358_DMA_ENET1_RX>,
216 <&iudma BCM6358_DMA_ENET1_TX>;
223 iudma: dma-controller@fffe5000 {
224 compatible = "brcm,bcm6348-iudma";
225 reg = <0xfffe5000 0x24>,
233 clocks = <&periph_clk BCM6358_CLK_EMUSB>,
234 <&periph_clk BCM6358_CLK_USBSU>,
235 <&periph_clk BCM6358_CLK_EPHY>;
236 resets = <&periph_rst BCM6358_RST_ENET>,
237 <&periph_rst BCM6358_RST_EPHY>;