arch/mips/alchemy/devboards/db1200.c

   1 /*
   2  * DBAu1200/PBAu1200 board platform device registration
   3  *
   4  * Copyright (C) 2008-2011 Manuel Lauss
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  */
  20
  21 #include <linux/dma-mapping.h>
  22 #include <linux/gpio.h>
  23 #include <linux/i2c.h>
  24 #include <linux/init.h>
  25 #include <linux/interrupt.h>
  26 #include <linux/io.h>
  27 #include <linux/leds.h>
  28 #include <linux/mmc/host.h>
  29 #include <linux/mtd/mtd.h>
  30 #include <linux/mtd/nand.h>
  31 #include <linux/mtd/partitions.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/serial_8250.h>
  34 #include <linux/spi/spi.h>
  35 #include <linux/spi/flash.h>
  36 #include <linux/smc91x.h>
  37 #include <asm/mach-au1x00/au1000.h>
  38 #include <asm/mach-au1x00/au1100_mmc.h>
  39 #include <asm/mach-au1x00/au1xxx_dbdma.h>
  40 #include <asm/mach-au1x00/au1200fb.h>
  41 #include <asm/mach-au1x00/au1550_spi.h>
  42 #include <asm/mach-db1x00/bcsr.h>
  43 #include <asm/mach-db1x00/db1200.h>
  44
  45 #include "platform.h"
  46
  47 static const char *board_type_str(void)
  48 {
  49         switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
  50         case BCSR_WHOAMI_PB1200_DDR1:
  51         case BCSR_WHOAMI_PB1200_DDR2:
  52                 return "PB1200";
  53         case BCSR_WHOAMI_DB1200:
  54                 return "DB1200";
  55         default:
  56                 return "(unknown)";
  57         }
  58 }
  59
  60 const char *get_system_type(void)
  61 {
  62         return board_type_str();
  63 }
  64
  65 static int __init detect_board(void)
  66 {
  67         int bid;
  68
  69         /* try the DB1200 first */
  70         bcsr_init(DB1200_BCSR_PHYS_ADDR,
  71                   DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
  72         if (BCSR_WHOAMI_DB1200 == BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
  73                 unsigned short t = bcsr_read(BCSR_HEXLEDS);
  74                 bcsr_write(BCSR_HEXLEDS, ~t);
  75                 if (bcsr_read(BCSR_HEXLEDS) != t) {
  76                         bcsr_write(BCSR_HEXLEDS, t);
  77                         return 0;
  78                 }
  79         }
  80
  81         /* okay, try the PB1200 then */
  82         bcsr_init(PB1200_BCSR_PHYS_ADDR,
  83                   PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
  84         bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
  85         if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
  86             (bid == BCSR_WHOAMI_PB1200_DDR2)) {
  87                 unsigned short t = bcsr_read(BCSR_HEXLEDS);
  88                 bcsr_write(BCSR_HEXLEDS, ~t);
  89                 if (bcsr_read(BCSR_HEXLEDS) != t) {
  90                         bcsr_write(BCSR_HEXLEDS, t);
  91                         return 0;
  92                 }
  93         }
  94
  95         return 1;       /* it's neither */
  96 }
  97
  98 void __init board_setup(void)
  99 {
 100         unsigned long freq0, clksrc, div, pfc;
 101         unsigned short whoami;
 102
 103         if (detect_board()) {
 104                 printk(KERN_ERR "NOT running on a DB1200/PB1200 board!\n");
 105                 return;
 106         }
 107
 108         whoami = bcsr_read(BCSR_WHOAMI);
 109         printk(KERN_INFO "Alchemy/AMD/RMI %s Board, CPLD Rev %d"
 110                 "  Board-ID %d  Daughtercard ID %d\n", board_type_str(),
 111                 (whoami >> 4) & 0xf, (whoami >> 8) & 0xf, whoami & 0xf);
 112
 113         /* SMBus/SPI on PSC0, Audio on PSC1 */
 114         pfc = __raw_readl((void __iomem *)SYS_PINFUNC);
 115         pfc &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
 116         pfc &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B | SYS_PINFUNC_FS3);
 117         pfc |= SYS_PINFUNC_P1C; /* SPI is configured later */
 118         __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
 119         wmb();
 120
 121         /* Clock configurations: PSC0: ~50MHz via Clkgen0, derived from
 122          * CPU clock; all other clock generators off/unused.
 123          */
 124         div = (get_au1x00_speed() + 25000000) / 50000000;
 125         if (div & 1)
 126                 div++;
 127         div = ((div >> 1) - 1) & 0xff;
 128
 129         freq0 = div << SYS_FC_FRDIV0_BIT;
 130         __raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
 131         wmb();
 132         freq0 |= SYS_FC_FE0;    /* enable F0 */
 133         __raw_writel(freq0, (void __iomem *)SYS_FREQCTRL0);
 134         wmb();
 135
 136         /* psc0_intclk comes 1:1 from F0 */
 137         clksrc = SYS_CS_MUX_FQ0 << SYS_CS_ME0_BIT;
 138         __raw_writel(clksrc, (void __iomem *)SYS_CLKSRC);
 139         wmb();
 140 }
 141
 142 /******************************************************************************/
 143
 144 static struct mtd_partition db1200_spiflash_parts[] = {
 145         {
 146                 .name   = "spi_flash",
 147                 .offset = 0,
 148                 .size   = MTDPART_SIZ_FULL,
 149         },
 150 };
 151
 152 static struct flash_platform_data db1200_spiflash_data = {
 153         .name           = "s25fl001",
 154         .parts          = db1200_spiflash_parts,
 155         .nr_parts       = ARRAY_SIZE(db1200_spiflash_parts),
 156         .type           = "m25p10",
 157 };
 158
 159 static struct spi_board_info db1200_spi_devs[] __initdata = {
 160         {
 161                 /* TI TMP121AIDBVR temp sensor */
 162                 .modalias       = "tmp121",
 163                 .max_speed_hz   = 2000000,
 164                 .bus_num        = 0,
 165                 .chip_select    = 0,
 166                 .mode           = 0,
 167         },
 168         {
 169                 /* Spansion S25FL001D0FMA SPI flash */
 170                 .modalias       = "m25p80",
 171                 .max_speed_hz   = 50000000,
 172                 .bus_num        = 0,
 173                 .chip_select    = 1,
 174                 .mode           = 0,
 175                 .platform_data  = &db1200_spiflash_data,
 176         },
 177 };
 178
 179 static struct i2c_board_info db1200_i2c_devs[] __initdata = {
 180         { I2C_BOARD_INFO("24c04", 0x52),  }, /* AT24C04-10 I2C eeprom */
 181         { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
 182         { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec WM8731 */
 183 };
 184
 185 /**********************************************************************/
 186
 187 static void au1200_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
 188                                  unsigned int ctrl)
 189 {
 190         struct nand_chip *this = mtd->priv;
 191         unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
 192
 193         ioaddr &= 0xffffff00;
 194
 195         if (ctrl & NAND_CLE) {
 196                 ioaddr += MEM_STNAND_CMD;
 197         } else if (ctrl & NAND_ALE) {
 198                 ioaddr += MEM_STNAND_ADDR;
 199         } else {
 200                 /* assume we want to r/w real data  by default */
 201                 ioaddr += MEM_STNAND_DATA;
 202         }
 203         this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
 204         if (cmd != NAND_CMD_NONE) {
 205                 __raw_writeb(cmd, this->IO_ADDR_W);
 206                 wmb();
 207         }
 208 }
 209
 210 static int au1200_nand_device_ready(struct mtd_info *mtd)
 211 {
 212         return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
 213 }
 214
 215 static struct mtd_partition db1200_nand_parts[] = {
 216         {
 217                 .name   = "NAND FS 0",
 218                 .offset = 0,
 219                 .size   = 8 * 1024 * 1024,
 220         },
 221         {
 222                 .name   = "NAND FS 1",
 223                 .offset = MTDPART_OFS_APPEND,
 224                 .size   = MTDPART_SIZ_FULL
 225         },
 226 };
 227
 228 struct platform_nand_data db1200_nand_platdata = {
 229         .chip = {
 230                 .nr_chips       = 1,
 231                 .chip_offset    = 0,
 232                 .nr_partitions  = ARRAY_SIZE(db1200_nand_parts),
 233                 .partitions     = db1200_nand_parts,
 234                 .chip_delay     = 20,
 235         },
 236         .ctrl = {
 237                 .dev_ready      = au1200_nand_device_ready,
 238                 .cmd_ctrl       = au1200_nand_cmd_ctrl,
 239         },
 240 };
 241
 242 static struct resource db1200_nand_res[] = {
 243         [0] = {
 244                 .start  = DB1200_NAND_PHYS_ADDR,
 245                 .end    = DB1200_NAND_PHYS_ADDR + 0xff,
 246                 .flags  = IORESOURCE_MEM,
 247         },
 248 };
 249
 250 static struct platform_device db1200_nand_dev = {
 251         .name           = "gen_nand",
 252         .num_resources  = ARRAY_SIZE(db1200_nand_res),
 253         .resource       = db1200_nand_res,
 254         .id             = -1,
 255         .dev            = {
 256                 .platform_data = &db1200_nand_platdata,
 257         }
 258 };
 259
 260 /**********************************************************************/
 261
 262 static struct smc91x_platdata db1200_eth_data = {
 263         .flags  = SMC91X_NOWAIT | SMC91X_USE_16BIT,
 264         .leda   = RPC_LED_100_10,
 265         .ledb   = RPC_LED_TX_RX,
 266 };
 267
 268 static struct resource db1200_eth_res[] = {
 269         [0] = {
 270                 .start  = DB1200_ETH_PHYS_ADDR,
 271                 .end    = DB1200_ETH_PHYS_ADDR + 0xf,
 272                 .flags  = IORESOURCE_MEM,
 273         },
 274         [1] = {
 275                 .start  = DB1200_ETH_INT,
 276                 .end    = DB1200_ETH_INT,
 277                 .flags  = IORESOURCE_IRQ,
 278         },
 279 };
 280
 281 static struct platform_device db1200_eth_dev = {
 282         .dev    = {
 283                 .platform_data  = &db1200_eth_data,
 284         },
 285         .name           = "smc91x",
 286         .id             = -1,
 287         .num_resources  = ARRAY_SIZE(db1200_eth_res),
 288         .resource       = db1200_eth_res,
 289 };
 290
 291 /**********************************************************************/
 292
 293 static struct resource db1200_ide_res[] = {
 294         [0] = {
 295                 .start  = DB1200_IDE_PHYS_ADDR,
 296                 .end    = DB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1,
 297                 .flags  = IORESOURCE_MEM,
 298         },
 299         [1] = {
 300                 .start  = DB1200_IDE_INT,
 301                 .end    = DB1200_IDE_INT,
 302                 .flags  = IORESOURCE_IRQ,
 303         },
 304         [2] = {
 305                 .start  = AU1200_DSCR_CMD0_DMA_REQ1,
 306                 .end    = AU1200_DSCR_CMD0_DMA_REQ1,
 307                 .flags  = IORESOURCE_DMA,
 308         },
 309 };
 310
 311 static u64 au1200_ide_dmamask = DMA_BIT_MASK(32);
 312
 313 static struct platform_device db1200_ide_dev = {
 314         .name           = "au1200-ide",
 315         .id             = 0,
 316         .dev = {
 317                 .dma_mask               = &au1200_ide_dmamask,
 318                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 319         },
 320         .num_resources  = ARRAY_SIZE(db1200_ide_res),
 321         .resource       = db1200_ide_res,
 322 };
 323
 324 /**********************************************************************/
 325
 326 /* SD carddetects:  they're supposed to be edge-triggered, but ack
 327  * doesn't seem to work (CPLD Rev 2).  Instead, the screaming one
 328  * is disabled and its counterpart enabled.  The 500ms timeout is
 329  * because the carddetect isn't debounced in hardware.
 330  */
 331 static irqreturn_t db1200_mmc_cd(int irq, void *ptr)
 332 {
 333         void(*mmc_cd)(struct mmc_host *, unsigned long);
 334
 335         if (irq == DB1200_SD0_INSERT_INT) {
 336                 disable_irq_nosync(DB1200_SD0_INSERT_INT);
 337                 enable_irq(DB1200_SD0_EJECT_INT);
 338         } else {
 339                 disable_irq_nosync(DB1200_SD0_EJECT_INT);
 340                 enable_irq(DB1200_SD0_INSERT_INT);
 341         }
 342
 343         /* link against CONFIG_MMC=m */
 344         mmc_cd = symbol_get(mmc_detect_change);
 345         if (mmc_cd) {
 346                 mmc_cd(ptr, msecs_to_jiffies(500));
 347                 symbol_put(mmc_detect_change);
 348         }
 349
 350         return IRQ_HANDLED;
 351 }
 352
 353 static int db1200_mmc_cd_setup(void *mmc_host, int en)
 354 {
 355         int ret;
 356
 357         if (en) {
 358                 ret = request_irq(DB1200_SD0_INSERT_INT, db1200_mmc_cd,
 359                                   0, "sd_insert", mmc_host);
 360                 if (ret)
 361                         goto out;
 362
 363                 ret = request_irq(DB1200_SD0_EJECT_INT, db1200_mmc_cd,
 364                                   0, "sd_eject", mmc_host);
 365                 if (ret) {
 366                         free_irq(DB1200_SD0_INSERT_INT, mmc_host);
 367                         goto out;
 368                 }
 369
 370                 if (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT)
 371                         enable_irq(DB1200_SD0_EJECT_INT);
 372                 else
 373                         enable_irq(DB1200_SD0_INSERT_INT);
 374
 375         } else {
 376                 free_irq(DB1200_SD0_INSERT_INT, mmc_host);
 377                 free_irq(DB1200_SD0_EJECT_INT, mmc_host);
 378         }
 379         ret = 0;
 380 out:
 381         return ret;
 382 }
 383
 384 static void db1200_mmc_set_power(void *mmc_host, int state)
 385 {
 386         if (state) {
 387                 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
 388                 msleep(400);    /* stabilization time */
 389         } else
 390                 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
 391 }
 392
 393 static int db1200_mmc_card_readonly(void *mmc_host)
 394 {
 395         return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 1 : 0;
 396 }
 397
 398 static int db1200_mmc_card_inserted(void *mmc_host)
 399 {
 400         return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT) ? 1 : 0;
 401 }
 402
 403 static void db1200_mmcled_set(struct led_classdev *led,
 404                               enum led_brightness brightness)
 405 {
 406         if (brightness != LED_OFF)
 407                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
 408         else
 409                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
 410 }
 411
 412 static struct led_classdev db1200_mmc_led = {
 413         .brightness_set = db1200_mmcled_set,
 414 };
 415
 416 /* -- */
 417
 418 static irqreturn_t pb1200_mmc1_cd(int irq, void *ptr)
 419 {
 420         void(*mmc_cd)(struct mmc_host *, unsigned long);
 421
 422         if (irq == PB1200_SD1_INSERT_INT) {
 423                 disable_irq_nosync(PB1200_SD1_INSERT_INT);
 424                 enable_irq(PB1200_SD1_EJECT_INT);
 425         } else {
 426                 disable_irq_nosync(PB1200_SD1_EJECT_INT);
 427                 enable_irq(PB1200_SD1_INSERT_INT);
 428         }
 429
 430         /* link against CONFIG_MMC=m */
 431         mmc_cd = symbol_get(mmc_detect_change);
 432         if (mmc_cd) {
 433                 mmc_cd(ptr, msecs_to_jiffies(500));
 434                 symbol_put(mmc_detect_change);
 435         }
 436
 437         return IRQ_HANDLED;
 438 }
 439
 440 static int pb1200_mmc1_cd_setup(void *mmc_host, int en)
 441 {
 442         int ret;
 443
 444         if (en) {
 445                 ret = request_irq(PB1200_SD1_INSERT_INT, pb1200_mmc1_cd, 0,
 446                                   "sd1_insert", mmc_host);
 447                 if (ret)
 448                         goto out;
 449
 450                 ret = request_irq(PB1200_SD1_EJECT_INT, pb1200_mmc1_cd, 0,
 451                                   "sd1_eject", mmc_host);
 452                 if (ret) {
 453                         free_irq(PB1200_SD1_INSERT_INT, mmc_host);
 454                         goto out;
 455                 }
 456
 457                 if (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT)
 458                         enable_irq(PB1200_SD1_EJECT_INT);
 459                 else
 460                         enable_irq(PB1200_SD1_INSERT_INT);
 461
 462         } else {
 463                 free_irq(PB1200_SD1_INSERT_INT, mmc_host);
 464                 free_irq(PB1200_SD1_EJECT_INT, mmc_host);
 465         }
 466         ret = 0;
 467 out:
 468         return ret;
 469 }
 470
 471 static void pb1200_mmc1led_set(struct led_classdev *led,
 472                         enum led_brightness brightness)
 473 {
 474         if (brightness != LED_OFF)
 475                         bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
 476         else
 477                         bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
 478 }
 479
 480 static struct led_classdev pb1200_mmc1_led = {
 481         .brightness_set = pb1200_mmc1led_set,
 482 };
 483
 484 static void pb1200_mmc1_set_power(void *mmc_host, int state)
 485 {
 486         if (state) {
 487                 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD1PWR);
 488                 msleep(400);    /* stabilization time */
 489         } else
 490                 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD1PWR, 0);
 491 }
 492
 493 static int pb1200_mmc1_card_readonly(void *mmc_host)
 494 {
 495         return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD1WP) ? 1 : 0;
 496 }
 497
 498 static int pb1200_mmc1_card_inserted(void *mmc_host)
 499 {
 500         return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD1INSERT) ? 1 : 0;
 501 }
 502
 503
 504 static struct au1xmmc_platform_data db1200_mmc_platdata[2] = {
 505         [0] = {
 506                 .cd_setup       = db1200_mmc_cd_setup,
 507                 .set_power      = db1200_mmc_set_power,
 508                 .card_inserted  = db1200_mmc_card_inserted,
 509                 .card_readonly  = db1200_mmc_card_readonly,
 510                 .led            = &db1200_mmc_led,
 511         },
 512         [1] = {
 513                 .cd_setup       = pb1200_mmc1_cd_setup,
 514                 .set_power      = pb1200_mmc1_set_power,
 515                 .card_inserted  = pb1200_mmc1_card_inserted,
 516                 .card_readonly  = pb1200_mmc1_card_readonly,
 517                 .led            = &pb1200_mmc1_led,
 518         },
 519 };
 520
 521 static struct resource au1200_mmc0_resources[] = {
 522         [0] = {
 523                 .start  = AU1100_SD0_PHYS_ADDR,
 524                 .end    = AU1100_SD0_PHYS_ADDR + 0xfff,
 525                 .flags  = IORESOURCE_MEM,
 526         },
 527         [1] = {
 528                 .start  = AU1200_SD_INT,
 529                 .end    = AU1200_SD_INT,
 530                 .flags  = IORESOURCE_IRQ,
 531         },
 532         [2] = {
 533                 .start  = AU1200_DSCR_CMD0_SDMS_TX0,
 534                 .end    = AU1200_DSCR_CMD0_SDMS_TX0,
 535                 .flags  = IORESOURCE_DMA,
 536         },
 537         [3] = {
 538                 .start  = AU1200_DSCR_CMD0_SDMS_RX0,
 539                 .end    = AU1200_DSCR_CMD0_SDMS_RX0,
 540                 .flags  = IORESOURCE_DMA,
 541         }
 542 };
 543
 544 static u64 au1xxx_mmc_dmamask =  DMA_BIT_MASK(32);
 545
 546 static struct platform_device db1200_mmc0_dev = {
 547         .name           = "au1xxx-mmc",
 548         .id             = 0,
 549         .dev = {
 550                 .dma_mask               = &au1xxx_mmc_dmamask,
 551                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 552                 .platform_data          = &db1200_mmc_platdata[0],
 553         },
 554         .num_resources  = ARRAY_SIZE(au1200_mmc0_resources),
 555         .resource       = au1200_mmc0_resources,
 556 };
 557
 558 static struct resource au1200_mmc1_res[] = {
 559         [0] = {
 560                 .start  = AU1100_SD1_PHYS_ADDR,
 561                 .end    = AU1100_SD1_PHYS_ADDR + 0xfff,
 562                 .flags  = IORESOURCE_MEM,
 563         },
 564         [1] = {
 565                 .start  = AU1200_SD_INT,
 566                 .end    = AU1200_SD_INT,
 567                 .flags  = IORESOURCE_IRQ,
 568         },
 569         [2] = {
 570                 .start  = AU1200_DSCR_CMD0_SDMS_TX1,
 571                 .end    = AU1200_DSCR_CMD0_SDMS_TX1,
 572                 .flags  = IORESOURCE_DMA,
 573         },
 574         [3] = {
 575                 .start  = AU1200_DSCR_CMD0_SDMS_RX1,
 576                 .end    = AU1200_DSCR_CMD0_SDMS_RX1,
 577                 .flags  = IORESOURCE_DMA,
 578         }
 579 };
 580
 581 static struct platform_device pb1200_mmc1_dev = {
 582         .name           = "au1xxx-mmc",
 583         .id             = 1,
 584         .dev = {
 585                 .dma_mask               = &au1xxx_mmc_dmamask,
 586                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 587                 .platform_data          = &db1200_mmc_platdata[1],
 588         },
 589         .num_resources  = ARRAY_SIZE(au1200_mmc1_res),
 590         .resource       = au1200_mmc1_res,
 591 };
 592
 593 /**********************************************************************/
 594
 595 static int db1200fb_panel_index(void)
 596 {
 597         return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
 598 }
 599
 600 static int db1200fb_panel_init(void)
 601 {
 602         /* Apply power */
 603         bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
 604                                 BCSR_BOARD_LCDBL);
 605         return 0;
 606 }
 607
 608 static int db1200fb_panel_shutdown(void)
 609 {
 610         /* Remove power */
 611         bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
 612                              BCSR_BOARD_LCDBL, 0);
 613         return 0;
 614 }
 615
 616 static struct au1200fb_platdata db1200fb_pd = {
 617         .panel_index    = db1200fb_panel_index,
 618         .panel_init     = db1200fb_panel_init,
 619         .panel_shutdown = db1200fb_panel_shutdown,
 620 };
 621
 622 static struct resource au1200_lcd_res[] = {
 623         [0] = {
 624                 .start  = AU1200_LCD_PHYS_ADDR,
 625                 .end    = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
 626                 .flags  = IORESOURCE_MEM,
 627         },
 628         [1] = {
 629                 .start  = AU1200_LCD_INT,
 630                 .end    = AU1200_LCD_INT,
 631                 .flags  = IORESOURCE_IRQ,
 632         }
 633 };
 634
 635 static u64 au1200_lcd_dmamask = DMA_BIT_MASK(32);
 636
 637 static struct platform_device au1200_lcd_dev = {
 638         .name           = "au1200-lcd",
 639         .id             = 0,
 640         .dev = {
 641                 .dma_mask               = &au1200_lcd_dmamask,
 642                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 643                 .platform_data          = &db1200fb_pd,
 644         },
 645         .num_resources  = ARRAY_SIZE(au1200_lcd_res),
 646         .resource       = au1200_lcd_res,
 647 };
 648
 649 /**********************************************************************/
 650
 651 static struct resource au1200_psc0_res[] = {
 652         [0] = {
 653                 .start  = AU1550_PSC0_PHYS_ADDR,
 654                 .end    = AU1550_PSC0_PHYS_ADDR + 0xfff,
 655                 .flags  = IORESOURCE_MEM,
 656         },
 657         [1] = {
 658                 .start  = AU1200_PSC0_INT,
 659                 .end    = AU1200_PSC0_INT,
 660                 .flags  = IORESOURCE_IRQ,
 661         },
 662         [2] = {
 663                 .start  = AU1200_DSCR_CMD0_PSC0_TX,
 664                 .end    = AU1200_DSCR_CMD0_PSC0_TX,
 665                 .flags  = IORESOURCE_DMA,
 666         },
 667         [3] = {
 668                 .start  = AU1200_DSCR_CMD0_PSC0_RX,
 669                 .end    = AU1200_DSCR_CMD0_PSC0_RX,
 670                 .flags  = IORESOURCE_DMA,
 671         },
 672 };
 673
 674 static struct platform_device db1200_i2c_dev = {
 675         .name           = "au1xpsc_smbus",
 676         .id             = 0,    /* bus number */
 677         .num_resources  = ARRAY_SIZE(au1200_psc0_res),
 678         .resource       = au1200_psc0_res,
 679 };
 680
 681 static void db1200_spi_cs_en(struct au1550_spi_info *spi, int cs, int pol)
 682 {
 683         if (cs)
 684                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_SPISEL);
 685         else
 686                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_SPISEL, 0);
 687 }
 688
 689 static struct au1550_spi_info db1200_spi_platdata = {
 690         .mainclk_hz     = 50000000,     /* PSC0 clock */
 691         .num_chipselect = 2,
 692         .activate_cs    = db1200_spi_cs_en,
 693 };
 694
 695 static u64 spi_dmamask = DMA_BIT_MASK(32);
 696
 697 static struct platform_device db1200_spi_dev = {
 698         .dev    = {
 699                 .dma_mask               = &spi_dmamask,
 700                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 701                 .platform_data          = &db1200_spi_platdata,
 702         },
 703         .name           = "au1550-spi",
 704         .id             = 0,    /* bus number */
 705         .num_resources  = ARRAY_SIZE(au1200_psc0_res),
 706         .resource       = au1200_psc0_res,
 707 };
 708
 709 static struct resource au1200_psc1_res[] = {
 710         [0] = {
 711                 .start  = AU1550_PSC1_PHYS_ADDR,
 712                 .end    = AU1550_PSC1_PHYS_ADDR + 0xfff,
 713                 .flags  = IORESOURCE_MEM,
 714         },
 715         [1] = {
 716                 .start  = AU1200_PSC1_INT,
 717                 .end    = AU1200_PSC1_INT,
 718                 .flags  = IORESOURCE_IRQ,
 719         },
 720         [2] = {
 721                 .start  = AU1200_DSCR_CMD0_PSC1_TX,
 722                 .end    = AU1200_DSCR_CMD0_PSC1_TX,
 723                 .flags  = IORESOURCE_DMA,
 724         },
 725         [3] = {
 726                 .start  = AU1200_DSCR_CMD0_PSC1_RX,
 727                 .end    = AU1200_DSCR_CMD0_PSC1_RX,
 728                 .flags  = IORESOURCE_DMA,
 729         },
 730 };
 731
 732 /* AC97 or I2S device */
 733 static struct platform_device db1200_audio_dev = {
 734         /* name assigned later based on switch setting */
 735         .id             = 1,    /* PSC ID */
 736         .num_resources  = ARRAY_SIZE(au1200_psc1_res),
 737         .resource       = au1200_psc1_res,
 738 };
 739
 740 /* DB1200 ASoC card device */
 741 static struct platform_device db1200_sound_dev = {
 742         /* name assigned later based on switch setting */
 743         .id             = 1,    /* PSC ID */
 744 };
 745
 746 static struct platform_device db1200_stac_dev = {
 747         .name           = "ac97-codec",
 748         .id             = 1,    /* on PSC1 */
 749 };
 750
 751 static struct platform_device db1200_audiodma_dev = {
 752         .name           = "au1xpsc-pcm",
 753         .id             = 1,    /* PSC ID */
 754 };
 755
 756 static struct platform_device *db1200_devs[] __initdata = {
 757         NULL,           /* PSC0, selected by S6.8 */
 758         &db1200_ide_dev,
 759         &db1200_mmc0_dev,
 760         &au1200_lcd_dev,
 761         &db1200_eth_dev,
 762         &db1200_nand_dev,
 763         &db1200_audiodma_dev,
 764         &db1200_audio_dev,
 765         &db1200_stac_dev,
 766         &db1200_sound_dev,
 767 };
 768
 769 static struct platform_device *pb1200_devs[] __initdata = {
 770         &pb1200_mmc1_dev,
 771 };
 772
 773 /* Some peripheral base addresses differ on the PB1200 */
 774 static int __init pb1200_res_fixup(void)
 775 {
 776         /* CPLD Revs earlier than 4 cause problems */
 777         if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
 778                 printk(KERN_ERR "WARNING!!!\n");
 779                 printk(KERN_ERR "WARNING!!!\n");
 780                 printk(KERN_ERR "PB1200 must be at CPLD rev 4. Please have\n");
 781                 printk(KERN_ERR "the board updated to latest revisions.\n");
 782                 printk(KERN_ERR "This software will not work reliably\n");
 783                 printk(KERN_ERR "on anything older than CPLD rev 4.!\n");
 784                 printk(KERN_ERR "WARNING!!!\n");
 785                 printk(KERN_ERR "WARNING!!!\n");
 786                 return 1;
 787         }
 788
 789         db1200_nand_res[0].start = PB1200_NAND_PHYS_ADDR;
 790         db1200_nand_res[0].end   = PB1200_NAND_PHYS_ADDR + 0xff;
 791         db1200_ide_res[0].start = PB1200_IDE_PHYS_ADDR;
 792         db1200_ide_res[0].end   = PB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1;
 793         db1200_eth_res[0].start = PB1200_ETH_PHYS_ADDR;
 794         db1200_eth_res[0].end   = PB1200_ETH_PHYS_ADDR + 0xff;
 795         return 0;
 796 }
 797
 798 static int __init db1200_dev_init(void)
 799 {
 800         unsigned long pfc;
 801         unsigned short sw;
 802         int swapped, bid;
 803
 804         bid = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
 805         if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
 806             (bid == BCSR_WHOAMI_PB1200_DDR2)) {
 807                 if (pb1200_res_fixup())
 808                         return -ENODEV;
 809         }
 810
 811         /* GPIO7 is low-level triggered CPLD cascade */
 812         irq_set_irq_type(AU1200_GPIO7_INT, IRQ_TYPE_LEVEL_LOW);
 813         bcsr_init_irq(DB1200_INT_BEGIN, DB1200_INT_END, AU1200_GPIO7_INT);
 814
 815         /* insert/eject pairs: one of both is always screaming.  To avoid
 816          * issues they must not be automatically enabled when initially
 817          * requested.
 818          */
 819         irq_set_status_flags(DB1200_SD0_INSERT_INT, IRQ_NOAUTOEN);
 820         irq_set_status_flags(DB1200_SD0_EJECT_INT, IRQ_NOAUTOEN);
 821         irq_set_status_flags(DB1200_PC0_INSERT_INT, IRQ_NOAUTOEN);
 822         irq_set_status_flags(DB1200_PC0_EJECT_INT, IRQ_NOAUTOEN);
 823         irq_set_status_flags(DB1200_PC1_INSERT_INT, IRQ_NOAUTOEN);
 824         irq_set_status_flags(DB1200_PC1_EJECT_INT, IRQ_NOAUTOEN);
 825
 826         i2c_register_board_info(0, db1200_i2c_devs,
 827                                 ARRAY_SIZE(db1200_i2c_devs));
 828         spi_register_board_info(db1200_spi_devs,
 829                                 ARRAY_SIZE(db1200_i2c_devs));
 830
 831         /* SWITCHES:    S6.8 I2C/SPI selector  (OFF=I2C  ON=SPI)
 832          *              S6.7 AC97/I2S selector (OFF=AC97 ON=I2S)
 833          *              or S12 on the PB1200.
 834          */
 835
 836         /* NOTE: GPIO215 controls OTG VBUS supply.  In SPI mode however
 837          * this pin is claimed by PSC0 (unused though, but pinmux doesn't
 838          * allow to free it without crippling the SPI interface).
 839          * As a result, in SPI mode, OTG simply won't work (PSC0 uses
 840          * it as an input pin which is pulled high on the boards).
 841          */
 842         pfc = __raw_readl((void __iomem *)SYS_PINFUNC) & ~SYS_PINFUNC_P0A;
 843
 844         /* switch off OTG VBUS supply */
 845         gpio_request(215, "otg-vbus");
 846         gpio_direction_output(215, 1);
 847
 848         printk(KERN_INFO "%s device configuration:\n", board_type_str());
 849
 850         sw = bcsr_read(BCSR_SWITCHES);
 851         if (sw & BCSR_SWITCHES_DIP_8) {
 852                 db1200_devs[0] = &db1200_i2c_dev;
 853                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
 854
 855                 pfc |= (2 << 17);       /* GPIO2 block owns GPIO215 */
 856
 857                 printk(KERN_INFO " S6.8 OFF: PSC0 mode I2C\n");
 858                 printk(KERN_INFO "   OTG port VBUS supply available!\n");
 859         } else {
 860                 db1200_devs[0] = &db1200_spi_dev;
 861                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC0MUX);
 862
 863                 pfc |= (1 << 17);       /* PSC0 owns GPIO215 */
 864
 865                 printk(KERN_INFO " S6.8 ON : PSC0 mode SPI\n");
 866                 printk(KERN_INFO "   OTG port VBUS supply disabled\n");
 867         }
 868         __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
 869         wmb();
 870
 871         /* Audio: DIP7 selects I2S(0)/AC97(1), but need I2C for I2S!
 872          * so: DIP7=1 || DIP8=0 => AC97, DIP7=0 && DIP8=1 => I2S
 873          */
 874         sw &= BCSR_SWITCHES_DIP_8 | BCSR_SWITCHES_DIP_7;
 875         if (sw == BCSR_SWITCHES_DIP_8) {
 876                 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC1MUX);
 877                 db1200_audio_dev.name = "au1xpsc_i2s";
 878                 db1200_sound_dev.name = "db1200-i2s";
 879                 printk(KERN_INFO " S6.7 ON : PSC1 mode I2S\n");
 880         } else {
 881                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC1MUX, 0);
 882                 db1200_audio_dev.name = "au1xpsc_ac97";
 883                 db1200_sound_dev.name = "db1200-ac97";
 884                 printk(KERN_INFO " S6.7 OFF: PSC1 mode AC97\n");
 885         }
 886
 887         /* Audio PSC clock is supplied externally. (FIXME: platdata!!) */
 888         __raw_writel(PSC_SEL_CLK_SERCLK,
 889             (void __iomem *)KSEG1ADDR(AU1550_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
 890         wmb();
 891
 892         db1x_register_pcmcia_socket(
 893                 AU1000_PCMCIA_ATTR_PHYS_ADDR,
 894                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
 895                 AU1000_PCMCIA_MEM_PHYS_ADDR,
 896                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
 897                 AU1000_PCMCIA_IO_PHYS_ADDR,
 898                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
 899                 DB1200_PC0_INT, DB1200_PC0_INSERT_INT,
 900                 /*DB1200_PC0_STSCHG_INT*/0, DB1200_PC0_EJECT_INT, 0);
 901
 902         db1x_register_pcmcia_socket(
 903                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
 904                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
 905                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
 906                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
 907                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
 908                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
 909                 DB1200_PC1_INT, DB1200_PC1_INSERT_INT,
 910                 /*DB1200_PC1_STSCHG_INT*/0, DB1200_PC1_EJECT_INT, 1);
 911
 912         swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
 913         db1x_register_norflash(64 << 20, 2, swapped);
 914
 915         platform_add_devices(db1200_devs, ARRAY_SIZE(db1200_devs));
 916
 917         /* PB1200 is a DB1200 with a 2nd MMC and Camera connector */
 918         if ((bid == BCSR_WHOAMI_PB1200_DDR1) ||
 919             (bid == BCSR_WHOAMI_PB1200_DDR2))
 920                 platform_add_devices(pb1200_devs, ARRAY_SIZE(pb1200_devs));
 921
 922         return 0;
 923 }
 924 device_initcall(db1200_dev_init);