2 * DBAu1200 board platform device registration
4 * Copyright (C) 2008-2009 Manuel Lauss
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/dma-mapping.h>
22 #include <linux/gpio.h>
23 #include <linux/i2c.h>
24 #include <linux/init.h>
26 #include <linux/leds.h>
27 #include <linux/mmc/host.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/nand.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/platform_device.h>
32 #include <linux/serial_8250.h>
33 #include <linux/spi/spi.h>
34 #include <linux/spi/flash.h>
35 #include <linux/smc91x.h>
37 #include <asm/mach-au1x00/au1100_mmc.h>
38 #include <asm/mach-au1x00/au1xxx_dbdma.h>
39 #include <asm/mach-au1x00/au1550_spi.h>
40 #include <asm/mach-db1x00/bcsr.h>
41 #include <asm/mach-db1x00/db1200.h>
43 #include "../platform.h"
45 static struct mtd_partition db1200_spiflash_parts[] = {
47 .name = "DB1200 SPI flash",
49 .size = MTDPART_SIZ_FULL,
53 static struct flash_platform_data db1200_spiflash_data = {
55 .parts = db1200_spiflash_parts,
56 .nr_parts = ARRAY_SIZE(db1200_spiflash_parts),
60 static struct spi_board_info db1200_spi_devs[] __initdata = {
62 /* TI TMP121AIDBVR temp sensor */
64 .max_speed_hz = 2000000,
70 /* Spansion S25FL001D0FMA SPI flash */
72 .max_speed_hz = 50000000,
76 .platform_data = &db1200_spiflash_data,
80 static struct i2c_board_info db1200_i2c_devs[] __initdata = {
82 /* AT24C04-10 I2C eeprom */
83 I2C_BOARD_INFO("24c04", 0x52),
86 /* Philips NE1619 temp/voltage sensor (adm1025 drv) */
87 I2C_BOARD_INFO("ne1619", 0x2d),
90 /* I2S audio codec WM8731 */
91 I2C_BOARD_INFO("wm8731", 0x1b),
95 /**********************************************************************/
97 static void au1200_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
100 struct nand_chip *this = mtd->priv;
101 unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
103 ioaddr &= 0xffffff00;
105 if (ctrl & NAND_CLE) {
106 ioaddr += MEM_STNAND_CMD;
107 } else if (ctrl & NAND_ALE) {
108 ioaddr += MEM_STNAND_ADDR;
110 /* assume we want to r/w real data by default */
111 ioaddr += MEM_STNAND_DATA;
113 this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
114 if (cmd != NAND_CMD_NONE) {
115 __raw_writeb(cmd, this->IO_ADDR_W);
120 static int au1200_nand_device_ready(struct mtd_info *mtd)
122 return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
125 static const char *db1200_part_probes[] = { "cmdlinepart", NULL };
127 static struct mtd_partition db1200_nand_parts[] = {
131 .size = 8 * 1024 * 1024,
135 .offset = MTDPART_OFS_APPEND,
136 .size = MTDPART_SIZ_FULL
140 struct platform_nand_data db1200_nand_platdata = {
144 .nr_partitions = ARRAY_SIZE(db1200_nand_parts),
145 .partitions = db1200_nand_parts,
147 .part_probe_types = db1200_part_probes,
150 .dev_ready = au1200_nand_device_ready,
151 .cmd_ctrl = au1200_nand_cmd_ctrl,
155 static struct resource db1200_nand_res[] = {
157 .start = DB1200_NAND_PHYS_ADDR,
158 .end = DB1200_NAND_PHYS_ADDR + 0xff,
159 .flags = IORESOURCE_MEM,
163 static struct platform_device db1200_nand_dev = {
165 .num_resources = ARRAY_SIZE(db1200_nand_res),
166 .resource = db1200_nand_res,
169 .platform_data = &db1200_nand_platdata,
173 /**********************************************************************/
175 static struct smc91x_platdata db1200_eth_data = {
176 .flags = SMC91X_NOWAIT | SMC91X_USE_16BIT,
177 .leda = RPC_LED_100_10,
178 .ledb = RPC_LED_TX_RX,
181 static struct resource db1200_eth_res[] = {
183 .start = DB1200_ETH_PHYS_ADDR,
184 .end = DB1200_ETH_PHYS_ADDR + 0xf,
185 .flags = IORESOURCE_MEM,
188 .start = DB1200_ETH_INT,
189 .end = DB1200_ETH_INT,
190 .flags = IORESOURCE_IRQ,
194 static struct platform_device db1200_eth_dev = {
196 .platform_data = &db1200_eth_data,
200 .num_resources = ARRAY_SIZE(db1200_eth_res),
201 .resource = db1200_eth_res,
204 /**********************************************************************/
206 static struct resource db1200_ide_res[] = {
208 .start = DB1200_IDE_PHYS_ADDR,
209 .end = DB1200_IDE_PHYS_ADDR + DB1200_IDE_PHYS_LEN - 1,
210 .flags = IORESOURCE_MEM,
213 .start = DB1200_IDE_INT,
214 .end = DB1200_IDE_INT,
215 .flags = IORESOURCE_IRQ,
219 static u64 ide_dmamask = DMA_32BIT_MASK;
221 static struct platform_device db1200_ide_dev = {
222 .name = "au1200-ide",
225 .dma_mask = &ide_dmamask,
226 .coherent_dma_mask = DMA_32BIT_MASK,
228 .num_resources = ARRAY_SIZE(db1200_ide_res),
229 .resource = db1200_ide_res,
232 /**********************************************************************/
234 static struct platform_device db1200_rtc_dev = {
235 .name = "rtc-au1xxx",
239 /**********************************************************************/
241 /* SD carddetects: they're supposed to be edge-triggered, but ack
242 * doesn't seem to work (CPLD Rev 2). Instead, the screaming one
243 * is disabled and its counterpart enabled. The 500ms timeout is
244 * because the carddetect isn't debounced in hardware.
246 static irqreturn_t db1200_mmc_cd(int irq, void *ptr)
248 void(*mmc_cd)(struct mmc_host *, unsigned long);
250 if (irq == DB1200_SD0_INSERT_INT) {
251 disable_irq_nosync(DB1200_SD0_INSERT_INT);
252 enable_irq(DB1200_SD0_EJECT_INT);
254 disable_irq_nosync(DB1200_SD0_EJECT_INT);
255 enable_irq(DB1200_SD0_INSERT_INT);
258 /* link against CONFIG_MMC=m */
259 mmc_cd = symbol_get(mmc_detect_change);
261 mmc_cd(ptr, msecs_to_jiffies(500));
262 symbol_put(mmc_detect_change);
268 static int db1200_mmc_cd_setup(void *mmc_host, int en)
273 ret = request_irq(DB1200_SD0_INSERT_INT, db1200_mmc_cd,
274 IRQF_DISABLED, "sd_insert", mmc_host);
278 ret = request_irq(DB1200_SD0_EJECT_INT, db1200_mmc_cd,
279 IRQF_DISABLED, "sd_eject", mmc_host);
281 free_irq(DB1200_SD0_INSERT_INT, mmc_host);
285 if (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT)
286 enable_irq(DB1200_SD0_EJECT_INT);
288 enable_irq(DB1200_SD0_INSERT_INT);
291 free_irq(DB1200_SD0_INSERT_INT, mmc_host);
292 free_irq(DB1200_SD0_EJECT_INT, mmc_host);
299 static void db1200_mmc_set_power(void *mmc_host, int state)
302 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_SD0PWR);
303 msleep(400); /* stabilization time */
305 bcsr_mod(BCSR_BOARD, BCSR_BOARD_SD0PWR, 0);
308 static int db1200_mmc_card_readonly(void *mmc_host)
310 return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 1 : 0;
313 static int db1200_mmc_card_inserted(void *mmc_host)
315 return (bcsr_read(BCSR_SIGSTAT) & BCSR_INT_SD0INSERT) ? 1 : 0;
318 static void db1200_mmcled_set(struct led_classdev *led,
319 enum led_brightness brightness)
321 if (brightness != LED_OFF)
322 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
324 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
327 static struct led_classdev db1200_mmc_led = {
328 .brightness_set = db1200_mmcled_set,
331 /* needed by arch/mips/alchemy/common/platform.c */
332 struct au1xmmc_platform_data au1xmmc_platdata[] = {
334 .cd_setup = db1200_mmc_cd_setup,
335 .set_power = db1200_mmc_set_power,
336 .card_inserted = db1200_mmc_card_inserted,
337 .card_readonly = db1200_mmc_card_readonly,
338 .led = &db1200_mmc_led,
342 /**********************************************************************/
344 static struct resource au1200_psc0_res[] = {
346 .start = PSC0_PHYS_ADDR,
347 .end = PSC0_PHYS_ADDR + 0x000fffff,
348 .flags = IORESOURCE_MEM,
351 .start = AU1200_PSC0_INT,
352 .end = AU1200_PSC0_INT,
353 .flags = IORESOURCE_IRQ,
356 .start = DSCR_CMD0_PSC0_TX,
357 .end = DSCR_CMD0_PSC0_TX,
358 .flags = IORESOURCE_DMA,
361 .start = DSCR_CMD0_PSC0_RX,
362 .end = DSCR_CMD0_PSC0_RX,
363 .flags = IORESOURCE_DMA,
367 static struct platform_device db1200_i2c_dev = {
368 .name = "au1xpsc_smbus",
369 .id = 0, /* bus number */
370 .num_resources = ARRAY_SIZE(au1200_psc0_res),
371 .resource = au1200_psc0_res,
374 static void db1200_spi_cs_en(struct au1550_spi_info *spi, int cs, int pol)
377 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_SPISEL);
379 bcsr_mod(BCSR_RESETS, BCSR_RESETS_SPISEL, 0);
382 static struct au1550_spi_info db1200_spi_platdata = {
383 .mainclk_hz = 50000000, /* PSC0 clock */
385 .activate_cs = db1200_spi_cs_en,
388 static u64 spi_dmamask = DMA_32BIT_MASK;
390 static struct platform_device db1200_spi_dev = {
392 .dma_mask = &spi_dmamask,
393 .coherent_dma_mask = DMA_32BIT_MASK,
394 .platform_data = &db1200_spi_platdata,
396 .name = "au1550-spi",
397 .id = 0, /* bus number */
398 .num_resources = ARRAY_SIZE(au1200_psc0_res),
399 .resource = au1200_psc0_res,
402 static struct platform_device *db1200_devs[] __initdata = {
403 NULL, /* PSC0, selected by S6.8 */
410 static int __init db1200_dev_init(void)
416 i2c_register_board_info(0, db1200_i2c_devs,
417 ARRAY_SIZE(db1200_i2c_devs));
418 spi_register_board_info(db1200_spi_devs,
419 ARRAY_SIZE(db1200_i2c_devs));
421 /* SWITCHES: S6.8 I2C/SPI selector (OFF=I2C ON=SPI)
424 /* NOTE: GPIO215 controls OTG VBUS supply. In SPI mode however
425 * this pin is claimed by PSC0 (unused though, but pinmux doesn't
426 * allow to free it without crippling the SPI interface).
427 * As a result, in SPI mode, OTG simply won't work (PSC0 uses
428 * it as an input pin which is pulled high on the boards).
430 pfc = __raw_readl((void __iomem *)SYS_PINFUNC) & ~SYS_PINFUNC_P0A;
432 /* switch off OTG VBUS supply */
433 gpio_request(215, "otg-vbus");
434 gpio_direction_output(215, 1);
436 printk(KERN_INFO "DB1200 device configuration:\n");
438 sw = bcsr_read(BCSR_SWITCHES);
439 if (sw & BCSR_SWITCHES_DIP_8) {
440 db1200_devs[0] = &db1200_i2c_dev;
441 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
443 pfc |= (2 << 17); /* GPIO2 block owns GPIO215 */
445 printk(KERN_INFO " S6.8 OFF: PSC0 mode I2C\n");
446 printk(KERN_INFO " OTG port VBUS supply available!\n");
448 db1200_devs[0] = &db1200_spi_dev;
449 bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_PSC0MUX);
451 pfc |= (1 << 17); /* PSC0 owns GPIO215 */
453 printk(KERN_INFO " S6.8 ON : PSC0 mode SPI\n");
454 printk(KERN_INFO " OTG port VBUS supply disabled\n");
456 __raw_writel(pfc, (void __iomem *)SYS_PINFUNC);
459 db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS,
460 PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1,
461 PCMCIA_MEM_PSEUDO_PHYS,
462 PCMCIA_MEM_PSEUDO_PHYS + 0x00040000 - 1,
463 PCMCIA_IO_PSEUDO_PHYS,
464 PCMCIA_IO_PSEUDO_PHYS + 0x00001000 - 1,
466 DB1200_PC0_INSERT_INT,
467 /*DB1200_PC0_STSCHG_INT*/0,
468 DB1200_PC0_EJECT_INT,
471 db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS + 0x00400000,
472 PCMCIA_ATTR_PSEUDO_PHYS + 0x00440000 - 1,
473 PCMCIA_MEM_PSEUDO_PHYS + 0x00400000,
474 PCMCIA_MEM_PSEUDO_PHYS + 0x00440000 - 1,
475 PCMCIA_IO_PSEUDO_PHYS + 0x00400000,
476 PCMCIA_IO_PSEUDO_PHYS + 0x00401000 - 1,
478 DB1200_PC1_INSERT_INT,
479 /*DB1200_PC1_STSCHG_INT*/0,
480 DB1200_PC1_EJECT_INT,
483 swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
484 db1x_register_norflash(64 << 20, 2, swapped);
486 return platform_add_devices(db1200_devs, ARRAY_SIZE(db1200_devs));
488 device_initcall(db1200_dev_init);
490 /* au1200fb calls these: STERBT EINEN TRAGISCHEN TOD!!! */
491 int board_au1200fb_panel(void)
493 return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
496 int board_au1200fb_panel_init(void)
499 bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
504 int board_au1200fb_panel_shutdown(void)
507 bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
508 BCSR_BOARD_LCDBL, 0);