arch/mips/alchemy/devboards/db1000.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * DBAu1000/1500/1100 PBAu1100/1500 board support
   4  *
   5  * Copyright 2000, 2008 MontaVista Software Inc.
   6  * Author: MontaVista Software, Inc. <source@mvista.com>
   7  */
   8
   9 #include <linux/clk.h>
  10 #include <linux/dma-mapping.h>
  11 #include <linux/gpio.h>
  12 #include <linux/gpio/machine.h>
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/leds.h>
  16 #include <linux/mmc/host.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/pm.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/spi/spi_gpio.h>
  21 #include <linux/spi/ads7846.h>
  22 #include <asm/mach-au1x00/au1000.h>
  23 #include <asm/mach-au1x00/gpio-au1000.h>
  24 #include <asm/mach-au1x00/au1000_dma.h>
  25 #include <asm/mach-au1x00/au1100_mmc.h>
  26 #include <asm/mach-db1x00/bcsr.h>
  27 #include <asm/reboot.h>
  28 #include <prom.h>
  29 #include "platform.h"
  30
  31 #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT)
  32
  33 const char *get_system_type(void);
  34
  35 int __init db1000_board_setup(void)
  36 {
  37         /* initialize board register space */
  38         bcsr_init(DB1000_BCSR_PHYS_ADDR,
  39                   DB1000_BCSR_PHYS_ADDR + DB1000_BCSR_HEXLED_OFS);
  40
  41         switch (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI))) {
  42         case BCSR_WHOAMI_DB1000:
  43         case BCSR_WHOAMI_DB1500:
  44         case BCSR_WHOAMI_DB1100:
  45         case BCSR_WHOAMI_PB1500:
  46         case BCSR_WHOAMI_PB1500R2:
  47         case BCSR_WHOAMI_PB1100:
  48                 pr_info("AMD Alchemy %s Board\n", get_system_type());
  49                 return 0;
  50         }
  51         return -ENODEV;
  52 }
  53
  54 static int db1500_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
  55 {
  56         if ((slot < 12) || (slot > 13) || pin == 0)
  57                 return -1;
  58         if (slot == 12)
  59                 return (pin == 1) ? AU1500_PCI_INTA : 0xff;
  60         if (slot == 13) {
  61                 switch (pin) {
  62                 case 1: return AU1500_PCI_INTA;
  63                 case 2: return AU1500_PCI_INTB;
  64                 case 3: return AU1500_PCI_INTC;
  65                 case 4: return AU1500_PCI_INTD;
  66                 }
  67         }
  68         return -1;
  69 }
  70
  71 static u64 au1xxx_all_dmamask = DMA_BIT_MASK(32);
  72
  73 static struct resource alchemy_pci_host_res[] = {
  74         [0] = {
  75                 .start  = AU1500_PCI_PHYS_ADDR,
  76                 .end    = AU1500_PCI_PHYS_ADDR + 0xfff,
  77                 .flags  = IORESOURCE_MEM,
  78         },
  79 };
  80
  81 static struct alchemy_pci_platdata db1500_pci_pd = {
  82         .board_map_irq  = db1500_map_pci_irq,
  83 };
  84
  85 static struct platform_device db1500_pci_host_dev = {
  86         .dev.platform_data = &db1500_pci_pd,
  87         .name           = "alchemy-pci",
  88         .id             = 0,
  89         .num_resources  = ARRAY_SIZE(alchemy_pci_host_res),
  90         .resource       = alchemy_pci_host_res,
  91 };
  92
  93 int __init db1500_pci_setup(void)
  94 {
  95         return platform_device_register(&db1500_pci_host_dev);
  96 }
  97
  98 static struct resource au1100_lcd_resources[] = {
  99         [0] = {
 100                 .start  = AU1100_LCD_PHYS_ADDR,
 101                 .end    = AU1100_LCD_PHYS_ADDR + 0x800 - 1,
 102                 .flags  = IORESOURCE_MEM,
 103         },
 104         [1] = {
 105                 .start  = AU1100_LCD_INT,
 106                 .end    = AU1100_LCD_INT,
 107                 .flags  = IORESOURCE_IRQ,
 108         }
 109 };
 110
 111 static struct platform_device au1100_lcd_device = {
 112         .name           = "au1100-lcd",
 113         .id             = 0,
 114         .dev = {
 115                 .dma_mask               = &au1xxx_all_dmamask,
 116                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 117         },
 118         .num_resources  = ARRAY_SIZE(au1100_lcd_resources),
 119         .resource       = au1100_lcd_resources,
 120 };
 121
 122 static struct resource alchemy_ac97c_res[] = {
 123         [0] = {
 124                 .start  = AU1000_AC97_PHYS_ADDR,
 125                 .end    = AU1000_AC97_PHYS_ADDR + 0xfff,
 126                 .flags  = IORESOURCE_MEM,
 127         },
 128         [1] = {
 129                 .start  = DMA_ID_AC97C_TX,
 130                 .end    = DMA_ID_AC97C_TX,
 131                 .flags  = IORESOURCE_DMA,
 132         },
 133         [2] = {
 134                 .start  = DMA_ID_AC97C_RX,
 135                 .end    = DMA_ID_AC97C_RX,
 136                 .flags  = IORESOURCE_DMA,
 137         },
 138 };
 139
 140 static struct platform_device alchemy_ac97c_dev = {
 141         .name           = "alchemy-ac97c",
 142         .id             = -1,
 143         .resource       = alchemy_ac97c_res,
 144         .num_resources  = ARRAY_SIZE(alchemy_ac97c_res),
 145 };
 146
 147 static struct platform_device alchemy_ac97c_dma_dev = {
 148         .name           = "alchemy-pcm-dma",
 149         .id             = 0,
 150 };
 151
 152 static struct platform_device db1x00_codec_dev = {
 153         .name           = "ac97-codec",
 154         .id             = -1,
 155 };
 156
 157 static struct platform_device db1x00_audio_dev = {
 158         .name           = "db1000-audio",
 159         .dev = {
 160                 .dma_mask               = &au1xxx_all_dmamask,
 161                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 162         },
 163 };
 164
 165 /******************************************************************************/
 166
 167 static irqreturn_t db1100_mmc_cd(int irq, void *ptr)
 168 {
 169         mmc_detect_change(ptr, msecs_to_jiffies(500));
 170         return IRQ_HANDLED;
 171 }
 172
 173 static int db1100_mmc_cd_setup(void *mmc_host, int en)
 174 {
 175         int ret = 0, irq;
 176
 177         if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
 178                 irq = AU1100_GPIO19_INT;
 179         else
 180                 irq = AU1100_GPIO14_INT;        /* PB1100 SD0 CD# */
 181
 182         if (en) {
 183                 irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
 184                 ret = request_irq(irq, db1100_mmc_cd, 0,
 185                                   "sd0_cd", mmc_host);
 186         } else
 187                 free_irq(irq, mmc_host);
 188         return ret;
 189 }
 190
 191 static int db1100_mmc1_cd_setup(void *mmc_host, int en)
 192 {
 193         int ret = 0, irq;
 194
 195         if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
 196                 irq = AU1100_GPIO20_INT;
 197         else
 198                 irq = AU1100_GPIO15_INT;        /* PB1100 SD1 CD# */
 199
 200         if (en) {
 201                 irq_set_irq_type(irq, IRQ_TYPE_EDGE_BOTH);
 202                 ret = request_irq(irq, db1100_mmc_cd, 0,
 203                                   "sd1_cd", mmc_host);
 204         } else
 205                 free_irq(irq, mmc_host);
 206         return ret;
 207 }
 208
 209 static int db1100_mmc_card_readonly(void *mmc_host)
 210 {
 211         /* testing suggests that this bit is inverted */
 212         return (bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP) ? 0 : 1;
 213 }
 214
 215 static int db1100_mmc_card_inserted(void *mmc_host)
 216 {
 217         return !alchemy_gpio_get_value(19);
 218 }
 219
 220 static void db1100_mmc_set_power(void *mmc_host, int state)
 221 {
 222         int bit;
 223
 224         if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
 225                 bit = BCSR_BOARD_SD0PWR;
 226         else
 227                 bit = BCSR_BOARD_PB1100_SD0PWR;
 228
 229         if (state) {
 230                 bcsr_mod(BCSR_BOARD, 0, bit);
 231                 msleep(400);    /* stabilization time */
 232         } else
 233                 bcsr_mod(BCSR_BOARD, bit, 0);
 234 }
 235
 236 static void db1100_mmcled_set(struct led_classdev *led, enum led_brightness b)
 237 {
 238         if (b != LED_OFF)
 239                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
 240         else
 241                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
 242 }
 243
 244 static struct led_classdev db1100_mmc_led = {
 245         .brightness_set = db1100_mmcled_set,
 246 };
 247
 248 static int db1100_mmc1_card_readonly(void *mmc_host)
 249 {
 250         return (bcsr_read(BCSR_BOARD) & BCSR_BOARD_SD1WP) ? 1 : 0;
 251 }
 252
 253 static int db1100_mmc1_card_inserted(void *mmc_host)
 254 {
 255         return !alchemy_gpio_get_value(20);
 256 }
 257
 258 static void db1100_mmc1_set_power(void *mmc_host, int state)
 259 {
 260         int bit;
 261
 262         if (BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI)) == BCSR_WHOAMI_DB1100)
 263                 bit = BCSR_BOARD_SD1PWR;
 264         else
 265                 bit = BCSR_BOARD_PB1100_SD1PWR;
 266
 267         if (state) {
 268                 bcsr_mod(BCSR_BOARD, 0, bit);
 269                 msleep(400);    /* stabilization time */
 270         } else
 271                 bcsr_mod(BCSR_BOARD, bit, 0);
 272 }
 273
 274 static void db1100_mmc1led_set(struct led_classdev *led, enum led_brightness b)
 275 {
 276         if (b != LED_OFF)
 277                 bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
 278         else
 279                 bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
 280 }
 281
 282 static struct led_classdev db1100_mmc1_led = {
 283         .brightness_set = db1100_mmc1led_set,
 284 };
 285
 286 static struct au1xmmc_platform_data db1100_mmc_platdata[2] = {
 287         [0] = {
 288                 .cd_setup       = db1100_mmc_cd_setup,
 289                 .set_power      = db1100_mmc_set_power,
 290                 .card_inserted  = db1100_mmc_card_inserted,
 291                 .card_readonly  = db1100_mmc_card_readonly,
 292                 .led            = &db1100_mmc_led,
 293         },
 294         [1] = {
 295                 .cd_setup       = db1100_mmc1_cd_setup,
 296                 .set_power      = db1100_mmc1_set_power,
 297                 .card_inserted  = db1100_mmc1_card_inserted,
 298                 .card_readonly  = db1100_mmc1_card_readonly,
 299                 .led            = &db1100_mmc1_led,
 300         },
 301 };
 302
 303 static struct resource au1100_mmc0_resources[] = {
 304         [0] = {
 305                 .start  = AU1100_SD0_PHYS_ADDR,
 306                 .end    = AU1100_SD0_PHYS_ADDR + 0xfff,
 307                 .flags  = IORESOURCE_MEM,
 308         },
 309         [1] = {
 310                 .start  = AU1100_SD_INT,
 311                 .end    = AU1100_SD_INT,
 312                 .flags  = IORESOURCE_IRQ,
 313         },
 314         [2] = {
 315                 .start  = DMA_ID_SD0_TX,
 316                 .end    = DMA_ID_SD0_TX,
 317                 .flags  = IORESOURCE_DMA,
 318         },
 319         [3] = {
 320                 .start  = DMA_ID_SD0_RX,
 321                 .end    = DMA_ID_SD0_RX,
 322                 .flags  = IORESOURCE_DMA,
 323         }
 324 };
 325
 326 static struct platform_device db1100_mmc0_dev = {
 327         .name           = "au1xxx-mmc",
 328         .id             = 0,
 329         .dev = {
 330                 .dma_mask               = &au1xxx_all_dmamask,
 331                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 332                 .platform_data          = &db1100_mmc_platdata[0],
 333         },
 334         .num_resources  = ARRAY_SIZE(au1100_mmc0_resources),
 335         .resource       = au1100_mmc0_resources,
 336 };
 337
 338 static struct resource au1100_mmc1_res[] = {
 339         [0] = {
 340                 .start  = AU1100_SD1_PHYS_ADDR,
 341                 .end    = AU1100_SD1_PHYS_ADDR + 0xfff,
 342                 .flags  = IORESOURCE_MEM,
 343         },
 344         [1] = {
 345                 .start  = AU1100_SD_INT,
 346                 .end    = AU1100_SD_INT,
 347                 .flags  = IORESOURCE_IRQ,
 348         },
 349         [2] = {
 350                 .start  = DMA_ID_SD1_TX,
 351                 .end    = DMA_ID_SD1_TX,
 352                 .flags  = IORESOURCE_DMA,
 353         },
 354         [3] = {
 355                 .start  = DMA_ID_SD1_RX,
 356                 .end    = DMA_ID_SD1_RX,
 357                 .flags  = IORESOURCE_DMA,
 358         }
 359 };
 360
 361 static struct platform_device db1100_mmc1_dev = {
 362         .name           = "au1xxx-mmc",
 363         .id             = 1,
 364         .dev = {
 365                 .dma_mask               = &au1xxx_all_dmamask,
 366                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 367                 .platform_data          = &db1100_mmc_platdata[1],
 368         },
 369         .num_resources  = ARRAY_SIZE(au1100_mmc1_res),
 370         .resource       = au1100_mmc1_res,
 371 };
 372
 373 /******************************************************************************/
 374
 375 static struct ads7846_platform_data db1100_touch_pd = {
 376         .model          = 7846,
 377         .vref_mv        = 3300,
 378 };
 379
 380 static struct spi_gpio_platform_data db1100_spictl_pd = {
 381         .num_chipselect = 1,
 382 };
 383
 384 static struct gpiod_lookup_table db1100_touch_gpio_table = {
 385         .dev_id = "spi0.0",
 386         .table = {
 387                 GPIO_LOOKUP("alchemy-gpio2", 21,
 388                             "pendown", GPIO_ACTIVE_LOW),
 389                 { }
 390         },
 391 };
 392
 393 static struct spi_board_info db1100_spi_info[] __initdata = {
 394         [0] = {
 395                 .modalias        = "ads7846",
 396                 .max_speed_hz    = 3250000,
 397                 .bus_num         = 0,
 398                 .chip_select     = 0,
 399                 .mode            = 0,
 400                 .irq             = AU1100_GPIO21_INT,
 401                 .platform_data   = &db1100_touch_pd,
 402         },
 403 };
 404
 405 static struct platform_device db1100_spi_dev = {
 406         .name           = "spi_gpio",
 407         .id             = 0,
 408         .dev            = {
 409                 .platform_data  = &db1100_spictl_pd,
 410                 .dma_mask               = &au1xxx_all_dmamask,
 411                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 412         },
 413 };
 414
 415 /*
 416  * Alchemy GPIO 2 has its base at 200 so the GPIO lines
 417  * 207 thru 210 are GPIOs at offset 7 thru 10 at this chip.
 418  */
 419 static struct gpiod_lookup_table db1100_spi_gpiod_table = {
 420         .dev_id         = "spi_gpio",
 421         .table          = {
 422                 GPIO_LOOKUP("alchemy-gpio2", 9,
 423                             "sck", GPIO_ACTIVE_HIGH),
 424                 GPIO_LOOKUP("alchemy-gpio2", 8,
 425                             "mosi", GPIO_ACTIVE_HIGH),
 426                 GPIO_LOOKUP("alchemy-gpio2", 7,
 427                             "miso", GPIO_ACTIVE_HIGH),
 428                 GPIO_LOOKUP("alchemy-gpio2", 10,
 429                             "cs", GPIO_ACTIVE_HIGH),
 430                 { },
 431         },
 432 };
 433
 434 static struct platform_device *db1x00_devs[] = {
 435         &db1x00_codec_dev,
 436         &alchemy_ac97c_dma_dev,
 437         &alchemy_ac97c_dev,
 438         &db1x00_audio_dev,
 439 };
 440
 441 static struct platform_device *db1100_devs[] = {
 442         &au1100_lcd_device,
 443         &db1100_mmc0_dev,
 444         &db1100_mmc1_dev,
 445 };
 446
 447 int __init db1000_dev_setup(void)
 448 {
 449         int board = BCSR_WHOAMI_BOARD(bcsr_read(BCSR_WHOAMI));
 450         int c0, c1, d0, d1, s0, s1, flashsize = 32,  twosocks = 1;
 451         unsigned long pfc;
 452         struct clk *c, *p;
 453
 454         if (board == BCSR_WHOAMI_DB1500) {
 455                 c0 = AU1500_GPIO2_INT;
 456                 c1 = AU1500_GPIO5_INT;
 457                 d0 = 0; /* GPIO number, NOT irq! */
 458                 d1 = 3; /* GPIO number, NOT irq! */
 459                 s0 = AU1500_GPIO1_INT;
 460                 s1 = AU1500_GPIO4_INT;
 461         } else if (board == BCSR_WHOAMI_DB1100) {
 462                 c0 = AU1100_GPIO2_INT;
 463                 c1 = AU1100_GPIO5_INT;
 464                 d0 = 0; /* GPIO number, NOT irq! */
 465                 d1 = 3; /* GPIO number, NOT irq! */
 466                 s0 = AU1100_GPIO1_INT;
 467                 s1 = AU1100_GPIO4_INT;
 468
 469                 gpio_request(19, "sd0_cd");
 470                 gpio_request(20, "sd1_cd");
 471                 gpio_direction_input(19);       /* sd0 cd# */
 472                 gpio_direction_input(20);       /* sd1 cd# */
 473
 474                 /* spi_gpio on SSI0 pins */
 475                 pfc = alchemy_rdsys(AU1000_SYS_PINFUNC);
 476                 pfc |= (1 << 0);        /* SSI0 pins as GPIOs */
 477                 alchemy_wrsys(pfc, AU1000_SYS_PINFUNC);
 478
 479                 gpiod_add_lookup_table(&db1100_touch_gpio_table);
 480                 spi_register_board_info(db1100_spi_info,
 481                                         ARRAY_SIZE(db1100_spi_info));
 482
 483                 /* link LCD clock to AUXPLL */
 484                 p = clk_get(NULL, "auxpll_clk");
 485                 c = clk_get(NULL, "lcd_intclk");
 486                 if (!IS_ERR(c) && !IS_ERR(p)) {
 487                         clk_set_parent(c, p);
 488                         clk_set_rate(c, clk_get_rate(p));
 489                 }
 490                 if (!IS_ERR(c))
 491                         clk_put(c);
 492                 if (!IS_ERR(p))
 493                         clk_put(p);
 494
 495                 platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
 496                 gpiod_add_lookup_table(&db1100_spi_gpiod_table);
 497                 platform_device_register(&db1100_spi_dev);
 498         } else if (board == BCSR_WHOAMI_DB1000) {
 499                 c0 = AU1000_GPIO2_INT;
 500                 c1 = AU1000_GPIO5_INT;
 501                 d0 = 0; /* GPIO number, NOT irq! */
 502                 d1 = 3; /* GPIO number, NOT irq! */
 503                 s0 = AU1000_GPIO1_INT;
 504                 s1 = AU1000_GPIO4_INT;
 505         } else if ((board == BCSR_WHOAMI_PB1500) ||
 506                    (board == BCSR_WHOAMI_PB1500R2)) {
 507                 c0 = AU1500_GPIO203_INT;
 508                 d0 = 1; /* GPIO number, NOT irq! */
 509                 s0 = AU1500_GPIO202_INT;
 510                 twosocks = 0;
 511                 flashsize = 64;
 512                 /* RTC and daughtercard irqs */
 513                 irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_LOW);
 514                 irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
 515                 /* EPSON S1D13806 0x1b000000
 516                  * SRAM 1MB/2MB   0x1a000000
 517                  * DS1693 RTC     0x0c000000
 518                  */
 519         } else if (board == BCSR_WHOAMI_PB1100) {
 520                 c0 = AU1100_GPIO11_INT;
 521                 d0 = 9; /* GPIO number, NOT irq! */
 522                 s0 = AU1100_GPIO10_INT;
 523                 twosocks = 0;
 524                 flashsize = 64;
 525                 /* pendown, rtc, daughtercard irqs */
 526                 irq_set_irq_type(AU1100_GPIO8_INT, IRQ_TYPE_LEVEL_LOW);
 527                 irq_set_irq_type(AU1100_GPIO12_INT, IRQ_TYPE_LEVEL_LOW);
 528                 irq_set_irq_type(AU1100_GPIO13_INT, IRQ_TYPE_LEVEL_LOW);
 529                 /* EPSON S1D13806 0x1b000000
 530                  * SRAM 1MB/2MB   0x1a000000
 531                  * DiskOnChip     0x0d000000
 532                  * DS1693 RTC     0x0c000000
 533                  */
 534                 platform_add_devices(db1100_devs, ARRAY_SIZE(db1100_devs));
 535         } else
 536                 return 0; /* unknown board, no further dev setup to do */
 537
 538         irq_set_irq_type(c0, IRQ_TYPE_LEVEL_LOW);
 539         irq_set_irq_type(s0, IRQ_TYPE_LEVEL_LOW);
 540
 541         db1x_register_pcmcia_socket(
 542                 AU1000_PCMCIA_ATTR_PHYS_ADDR,
 543                 AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
 544                 AU1000_PCMCIA_MEM_PHYS_ADDR,
 545                 AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x000400000 - 1,
 546                 AU1000_PCMCIA_IO_PHYS_ADDR,
 547                 AU1000_PCMCIA_IO_PHYS_ADDR   + 0x000010000 - 1,
 548                 c0, d0, /*s0*/0, 0, 0);
 549
 550         if (twosocks) {
 551                 irq_set_irq_type(c1, IRQ_TYPE_LEVEL_LOW);
 552                 irq_set_irq_type(s1, IRQ_TYPE_LEVEL_LOW);
 553
 554                 db1x_register_pcmcia_socket(
 555                         AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004000000,
 556                         AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x004400000 - 1,
 557                         AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004000000,
 558                         AU1000_PCMCIA_MEM_PHYS_ADDR  + 0x004400000 - 1,
 559                         AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004000000,
 560                         AU1000_PCMCIA_IO_PHYS_ADDR   + 0x004010000 - 1,
 561                         c1, d1, /*s1*/0, 0, 1);
 562         }
 563
 564         platform_add_devices(db1x00_devs, ARRAY_SIZE(db1x00_devs));
 565         db1x_register_norflash(flashsize << 20, 4 /* 32bit */, F_SWAPPED);
 566         return 0;
 567 }