1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_STRNCPY_FROM_USER
13 select ARCH_HAS_STRNLEN_USER
14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15 select ARCH_HAS_UBSAN_SANITIZE_ALL
16 select ARCH_HAS_GCOV_PROFILE_ALL
17 select ARCH_KEEP_MEMBLOCK
18 select ARCH_SUPPORTS_UPROBES
19 select ARCH_USE_BUILTIN_BSWAP
20 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
21 select ARCH_USE_MEMTEST
22 select ARCH_USE_QUEUED_RWLOCKS
23 select ARCH_USE_QUEUED_SPINLOCKS
24 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
25 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
26 select ARCH_WANT_IPC_PARSE_VERSION
27 select ARCH_WANT_LD_ORPHAN_WARN
28 select BUILDTIME_TABLE_SORT
29 select CLONE_BACKWARDS
30 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
31 select CPU_PM if CPU_IDLE
32 select GENERIC_ATOMIC64 if !64BIT
33 select GENERIC_CMOS_UPDATE
34 select GENERIC_CPU_AUTOPROBE
35 select GENERIC_FIND_FIRST_BIT
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HAVE_ARCH_COMPILER_H
51 select HAVE_ARCH_JUMP_LABEL
52 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
53 select HAVE_ARCH_MMAP_RND_BITS if MMU
54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
55 select HAVE_ARCH_SECCOMP_FILTER
56 select HAVE_ARCH_TRACEHOOK
57 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
58 select HAVE_ASM_MODVERSIONS
59 select HAVE_CONTEXT_TRACKING
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
67 !CPU_DADDI_WORKAROUNDS && \
68 !CPU_R4000_WORKAROUNDS && \
69 !CPU_R4400_WORKAROUNDS
70 select HAVE_EXIT_THREAD
72 select HAVE_FTRACE_MCOUNT_RECORD
73 select HAVE_FUNCTION_GRAPH_TRACER
74 select HAVE_FUNCTION_TRACER
75 select HAVE_GCC_PLUGINS
76 select HAVE_GENERIC_VDSO
77 select HAVE_IOREMAP_PROT
78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
79 select HAVE_IRQ_TIME_ACCOUNTING
81 select HAVE_KRETPROBES
82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
83 select HAVE_MOD_ARCH_SPECIFIC
85 select HAVE_PERF_EVENTS
87 select HAVE_PERF_USER_STACK_DUMP
88 select HAVE_REGS_AND_STACK_ACCESS_API
90 select HAVE_SPARSE_SYSCALL_NR
91 select HAVE_STACKPROTECTOR
92 select HAVE_SYSCALL_TRACEPOINTS
93 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
94 select IRQ_FORCED_THREADING
96 select MODULES_USE_ELF_REL if MODULES
97 select MODULES_USE_ELF_RELA if MODULES && 64BIT
98 select PERF_USE_VMALLOC
99 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
101 select SYSCTL_EXCEPTION_TRACE
102 select TRACE_IRQFLAGS_SUPPORT
104 select ARCH_HAS_ELFCORE_COMPAT
106 config MIPS_FIXUP_BIGPHYS_ADDR
114 select SYS_SUPPORTS_32BIT_KERNEL
115 select SYS_SUPPORTS_LITTLE_ENDIAN
116 select SYS_SUPPORTS_ZBOOT
117 select DMA_NONCOHERENT
118 select ARCH_HAS_SYNC_DMA_FOR_CPU
123 select GENERIC_IRQ_CHIP
124 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
126 select CPU_SUPPORTS_CPUFREQ
127 select MIPS_EXTERNAL_TIMER
129 menu "Machine selection"
133 default MIPS_GENERIC_KERNEL
135 config MIPS_GENERIC_KERNEL
136 bool "Generic board-agnostic MIPS kernel"
137 select ARCH_HAS_SETUP_DMA_OPS
142 select CLKSRC_MIPS_GIC
144 select CPU_MIPSR2_IRQ_EI
145 select CPU_MIPSR2_IRQ_VI
147 select DMA_NONCOHERENT
150 select MIPS_AUTO_PFN_OFFSET
151 select MIPS_CPU_SCACHE
153 select MIPS_L1_CACHE_SHIFT_7
154 select NO_EXCEPT_FILL
155 select PCI_DRIVERS_GENERIC
158 select SYS_HAS_CPU_MIPS32_R1
159 select SYS_HAS_CPU_MIPS32_R2
160 select SYS_HAS_CPU_MIPS32_R6
161 select SYS_HAS_CPU_MIPS64_R1
162 select SYS_HAS_CPU_MIPS64_R2
163 select SYS_HAS_CPU_MIPS64_R6
164 select SYS_SUPPORTS_32BIT_KERNEL
165 select SYS_SUPPORTS_64BIT_KERNEL
166 select SYS_SUPPORTS_BIG_ENDIAN
167 select SYS_SUPPORTS_HIGHMEM
168 select SYS_SUPPORTS_LITTLE_ENDIAN
169 select SYS_SUPPORTS_MICROMIPS
170 select SYS_SUPPORTS_MIPS16
171 select SYS_SUPPORTS_MIPS_CPS
172 select SYS_SUPPORTS_MULTITHREADING
173 select SYS_SUPPORTS_RELOCATABLE
174 select SYS_SUPPORTS_SMARTMIPS
175 select SYS_SUPPORTS_ZBOOT
177 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
178 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
179 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
180 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
181 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
182 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
185 Select this to build a kernel which aims to support multiple boards,
186 generally using a flattened device tree passed from the bootloader
187 using the boot protocol defined in the UHI (Unified Hosting
188 Interface) specification.
191 bool "Alchemy processor based machines"
192 select PHYS_ADDR_T_64BIT
196 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
197 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
198 select SYS_HAS_CPU_MIPS32_R1
199 select SYS_SUPPORTS_32BIT_KERNEL
200 select SYS_SUPPORTS_APM_EMULATION
202 select SYS_SUPPORTS_ZBOOT
206 bool "Texas Instruments AR7"
209 select DMA_NONCOHERENT
213 select NO_EXCEPT_FILL
215 select SYS_HAS_CPU_MIPS32_R1
216 select SYS_HAS_EARLY_PRINTK
217 select SYS_SUPPORTS_32BIT_KERNEL
218 select SYS_SUPPORTS_LITTLE_ENDIAN
219 select SYS_SUPPORTS_MIPS16
220 select SYS_SUPPORTS_ZBOOT_UART16550
224 Support for the Texas Instruments AR7 System-on-a-Chip
225 family: TNETD7100, 7200 and 7300.
228 bool "Atheros AR231x/AR531x SoC support"
231 select DMA_NONCOHERENT
234 select SYS_HAS_CPU_MIPS32_R1
235 select SYS_SUPPORTS_BIG_ENDIAN
236 select SYS_SUPPORTS_32BIT_KERNEL
237 select SYS_HAS_EARLY_PRINTK
239 Support for Atheros AR231x and Atheros AR531x based boards
242 bool "Atheros AR71XX/AR724X/AR913X based boards"
243 select ARCH_HAS_RESET_CONTROLLER
247 select DMA_NONCOHERENT
252 select SYS_HAS_CPU_MIPS32_R2
253 select SYS_HAS_EARLY_PRINTK
254 select SYS_SUPPORTS_32BIT_KERNEL
255 select SYS_SUPPORTS_BIG_ENDIAN
256 select SYS_SUPPORTS_MIPS16
257 select SYS_SUPPORTS_ZBOOT_UART_PROM
259 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
261 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
264 bool "Broadcom Generic BMIPS kernel"
265 select ARCH_HAS_RESET_CONTROLLER
266 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
268 select NO_EXCEPT_FILL
274 select BCM6345_L1_IRQ
275 select BCM7038_L1_IRQ
276 select BCM7120_L2_IRQ
277 select BRCMSTB_L2_IRQ
279 select DMA_NONCOHERENT
280 select SYS_SUPPORTS_32BIT_KERNEL
281 select SYS_SUPPORTS_LITTLE_ENDIAN
282 select SYS_SUPPORTS_BIG_ENDIAN
283 select SYS_SUPPORTS_HIGHMEM
284 select SYS_HAS_CPU_BMIPS32_3300
285 select SYS_HAS_CPU_BMIPS4350
286 select SYS_HAS_CPU_BMIPS4380
287 select SYS_HAS_CPU_BMIPS5000
289 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
290 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
291 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
292 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
293 select HARDIRQS_SW_RESEND
295 select PCI_DRIVERS_GENERIC
297 Build a generic DT-based kernel image that boots on select
298 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
299 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
300 must be set appropriately for your board.
303 bool "Broadcom BCM47XX based boards"
307 select DMA_NONCOHERENT
310 select SYS_HAS_CPU_MIPS32_R1
311 select NO_EXCEPT_FILL
312 select SYS_SUPPORTS_32BIT_KERNEL
313 select SYS_SUPPORTS_LITTLE_ENDIAN
314 select SYS_SUPPORTS_MIPS16
315 select SYS_SUPPORTS_ZBOOT
316 select SYS_HAS_EARLY_PRINTK
317 select USE_GENERIC_EARLY_PRINTK_8250
319 select LEDS_GPIO_REGISTER
322 select BCM47XX_SSB if !BCM47XX_BCMA
324 Support for BCM47XX based boards
327 bool "Broadcom BCM63XX based boards"
332 select DMA_NONCOHERENT
334 select SYS_SUPPORTS_32BIT_KERNEL
335 select SYS_SUPPORTS_BIG_ENDIAN
336 select SYS_HAS_EARLY_PRINTK
337 select SYS_HAS_CPU_BMIPS32_3300
338 select SYS_HAS_CPU_BMIPS4350
339 select SYS_HAS_CPU_BMIPS4380
342 select MIPS_L1_CACHE_SHIFT_4
343 select HAVE_LEGACY_CLK
345 Support for BCM63XX based boards
352 select DMA_NONCOHERENT
358 select PCI_GT64XXX_PCI0
359 select SYS_HAS_CPU_NEVADA
360 select SYS_HAS_EARLY_PRINTK
361 select SYS_SUPPORTS_32BIT_KERNEL
362 select SYS_SUPPORTS_64BIT_KERNEL
363 select SYS_SUPPORTS_LITTLE_ENDIAN
364 select USE_GENERIC_EARLY_PRINTK_8250
366 config MACH_DECSTATION
370 select CEVT_R4K if CPU_R4X00
372 select CSRC_R4K if CPU_R4X00
373 select CPU_DADDI_WORKAROUNDS if 64BIT
374 select CPU_R4000_WORKAROUNDS if 64BIT
375 select CPU_R4400_WORKAROUNDS if 64BIT
376 select DMA_NONCOHERENT
379 select SYS_HAS_CPU_R3000
380 select SYS_HAS_CPU_R4X00
381 select SYS_SUPPORTS_32BIT_KERNEL
382 select SYS_SUPPORTS_64BIT_KERNEL
383 select SYS_SUPPORTS_LITTLE_ENDIAN
384 select SYS_SUPPORTS_128HZ
385 select SYS_SUPPORTS_256HZ
386 select SYS_SUPPORTS_1024HZ
387 select MIPS_L1_CACHE_SHIFT_4
389 This enables support for DEC's MIPS based workstations. For details
390 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
391 DECstation porting pages on <http://decstation.unix-ag.org/>.
393 If you have one of the following DECstation Models you definitely
394 want to choose R4xx0 for the CPU Type:
401 otherwise choose R3000.
404 bool "Jazz family of machines"
407 select ARCH_MIGHT_HAVE_PC_PARPORT
408 select ARCH_MIGHT_HAVE_PC_SERIO
412 select ARCH_MAY_HAVE_PC_FDC
415 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
416 select GENERIC_ISA_DMA
417 select HAVE_PCSPKR_PLATFORM
422 select SYS_HAS_CPU_R4X00
423 select SYS_SUPPORTS_32BIT_KERNEL
424 select SYS_SUPPORTS_64BIT_KERNEL
425 select SYS_SUPPORTS_100HZ
426 select SYS_SUPPORTS_LITTLE_ENDIAN
428 This a family of machines based on the MIPS R4030 chipset which was
429 used by several vendors to build RISC/os and Windows NT workstations.
430 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
431 Olivetti M700-10 workstations.
433 config MACH_INGENIC_SOC
434 bool "Ingenic SoC based machines"
437 select SYS_SUPPORTS_ZBOOT_UART16550
438 select CPU_SUPPORTS_CPUFREQ
439 select MIPS_EXTERNAL_TIMER
442 bool "Lantiq based platforms"
443 select DMA_NONCOHERENT
447 select SYS_HAS_CPU_MIPS32_R1
448 select SYS_HAS_CPU_MIPS32_R2
449 select SYS_SUPPORTS_BIG_ENDIAN
450 select SYS_SUPPORTS_32BIT_KERNEL
451 select SYS_SUPPORTS_MIPS16
452 select SYS_SUPPORTS_MULTITHREADING
453 select SYS_SUPPORTS_VPE_LOADER
454 select SYS_HAS_EARLY_PRINTK
458 select HAVE_LEGACY_CLK
461 select PINCTRL_LANTIQ
462 select ARCH_HAS_RESET_CONTROLLER
463 select RESET_CONTROLLER
465 config MACH_LOONGSON32
466 bool "Loongson 32-bit family of machines"
467 select SYS_SUPPORTS_ZBOOT
469 This enables support for the Loongson-1 family of machines.
471 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
472 the Institute of Computing Technology (ICT), Chinese Academy of
475 config MACH_LOONGSON2EF
476 bool "Loongson-2E/F family of machines"
477 select SYS_SUPPORTS_ZBOOT
479 This enables the support of early Loongson-2E/F family of machines.
481 config MACH_LOONGSON64
482 bool "Loongson 64-bit family of machines"
483 select ARCH_SPARSEMEM_ENABLE
484 select ARCH_MIGHT_HAVE_PC_PARPORT
485 select ARCH_MIGHT_HAVE_PC_SERIO
486 select GENERIC_ISA_DMA_SUPPORT_BROKEN
496 select NO_EXCEPT_FILL
497 select NR_CPUS_DEFAULT_64
498 select USE_GENERIC_EARLY_PRINTK_8250
499 select PCI_DRIVERS_GENERIC
500 select SYS_HAS_CPU_LOONGSON64
501 select SYS_HAS_EARLY_PRINTK
502 select SYS_SUPPORTS_SMP
503 select SYS_SUPPORTS_HOTPLUG_CPU
504 select SYS_SUPPORTS_NUMA
505 select SYS_SUPPORTS_64BIT_KERNEL
506 select SYS_SUPPORTS_HIGHMEM
507 select SYS_SUPPORTS_LITTLE_ENDIAN
508 select SYS_SUPPORTS_ZBOOT
509 select SYS_SUPPORTS_RELOCATABLE
514 select PCI_HOST_GENERIC
516 This enables the support of Loongson-2/3 family of machines.
518 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
519 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
520 and Loongson-2F which will be removed), developed by the Institute
521 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
524 bool "MIPS Malta board"
525 select ARCH_MAY_HAVE_PC_FDC
526 select ARCH_MIGHT_HAVE_PC_PARPORT
527 select ARCH_MIGHT_HAVE_PC_SERIO
532 select CLKSRC_MIPS_GIC
535 select DMA_NONCOHERENT
536 select GENERIC_ISA_DMA
537 select HAVE_PCSPKR_PLATFORM
543 select MIPS_CPU_SCACHE
545 select MIPS_L1_CACHE_SHIFT_6
547 select PCI_GT64XXX_PCI0
550 select SYS_HAS_CPU_MIPS32_R1
551 select SYS_HAS_CPU_MIPS32_R2
552 select SYS_HAS_CPU_MIPS32_R3_5
553 select SYS_HAS_CPU_MIPS32_R5
554 select SYS_HAS_CPU_MIPS32_R6
555 select SYS_HAS_CPU_MIPS64_R1
556 select SYS_HAS_CPU_MIPS64_R2
557 select SYS_HAS_CPU_MIPS64_R6
558 select SYS_HAS_CPU_NEVADA
559 select SYS_HAS_CPU_RM7000
560 select SYS_SUPPORTS_32BIT_KERNEL
561 select SYS_SUPPORTS_64BIT_KERNEL
562 select SYS_SUPPORTS_BIG_ENDIAN
563 select SYS_SUPPORTS_HIGHMEM
564 select SYS_SUPPORTS_LITTLE_ENDIAN
565 select SYS_SUPPORTS_MICROMIPS
566 select SYS_SUPPORTS_MIPS16
567 select SYS_SUPPORTS_MIPS_CMP
568 select SYS_SUPPORTS_MIPS_CPS
569 select SYS_SUPPORTS_MULTITHREADING
570 select SYS_SUPPORTS_RELOCATABLE
571 select SYS_SUPPORTS_SMARTMIPS
572 select SYS_SUPPORTS_VPE_LOADER
573 select SYS_SUPPORTS_ZBOOT
575 select WAR_ICACHE_REFILLS
576 select ZONE_DMA32 if 64BIT
578 This enables support for the MIPS Technologies Malta evaluation
582 bool "Microchip PIC32 Family"
584 This enables support for the Microchip PIC32 family of platforms.
586 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
590 bool "NEC VR4100 series based machines"
593 select SYS_HAS_CPU_VR41XX
594 select SYS_SUPPORTS_MIPS16
597 config MACH_NINTENDO64
598 bool "Nintendo 64 console"
601 select SYS_HAS_CPU_R4300
602 select SYS_SUPPORTS_BIG_ENDIAN
603 select SYS_SUPPORTS_ZBOOT
604 select SYS_SUPPORTS_32BIT_KERNEL
605 select SYS_SUPPORTS_64BIT_KERNEL
606 select DMA_NONCOHERENT
610 bool "Ralink based machines"
615 select DMA_NONCOHERENT
618 select SYS_HAS_CPU_MIPS32_R1
619 select SYS_HAS_CPU_MIPS32_R2
620 select SYS_SUPPORTS_32BIT_KERNEL
621 select SYS_SUPPORTS_LITTLE_ENDIAN
622 select SYS_SUPPORTS_MIPS16
623 select SYS_SUPPORTS_ZBOOT
624 select SYS_HAS_EARLY_PRINTK
625 select ARCH_HAS_RESET_CONTROLLER
626 select RESET_CONTROLLER
628 config MACH_REALTEK_RTL
629 bool "Realtek RTL838x/RTL839x based machines"
631 select DMA_NONCOHERENT
635 select SYS_HAS_CPU_MIPS32_R1
636 select SYS_HAS_CPU_MIPS32_R2
637 select SYS_SUPPORTS_BIG_ENDIAN
638 select SYS_SUPPORTS_32BIT_KERNEL
639 select SYS_SUPPORTS_MIPS16
640 select SYS_SUPPORTS_MULTITHREADING
641 select SYS_SUPPORTS_VPE_LOADER
647 bool "SGI IP22 (Indy/Indigo2)"
652 select ARCH_MIGHT_HAVE_PC_SERIO
656 select DEFAULT_SGI_PARTITION
657 select DMA_NONCOHERENT
661 select IP22_CPU_SCACHE
663 select GENERIC_ISA_DMA_SUPPORT_BROKEN
665 select SGI_HAS_INDYDOG
671 select SYS_HAS_CPU_R4X00
672 select SYS_HAS_CPU_R5000
673 select SYS_HAS_EARLY_PRINTK
674 select SYS_SUPPORTS_32BIT_KERNEL
675 select SYS_SUPPORTS_64BIT_KERNEL
676 select SYS_SUPPORTS_BIG_ENDIAN
677 select WAR_R4600_V1_INDEX_ICACHEOP
678 select WAR_R4600_V1_HIT_CACHEOP
679 select WAR_R4600_V2_HIT_CACHEOP
680 select MIPS_L1_CACHE_SHIFT_7
682 This are the SGI Indy, Challenge S and Indigo2, as well as certain
683 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
684 that runs on these, say Y here.
687 bool "SGI IP27 (Origin200/2000)"
688 select ARCH_HAS_PHYS_TO_DMA
689 select ARCH_SPARSEMEM_ENABLE
692 select ARC_CMDLINE_ONLY
694 select DEFAULT_SGI_PARTITION
696 select SYS_HAS_EARLY_PRINTK
699 select IRQ_DOMAIN_HIERARCHY
700 select NR_CPUS_DEFAULT_64
701 select PCI_DRIVERS_GENERIC
702 select PCI_XTALK_BRIDGE
703 select SYS_HAS_CPU_R10000
704 select SYS_SUPPORTS_64BIT_KERNEL
705 select SYS_SUPPORTS_BIG_ENDIAN
706 select SYS_SUPPORTS_NUMA
707 select SYS_SUPPORTS_SMP
708 select WAR_R10000_LLSC
709 select MIPS_L1_CACHE_SHIFT_7
712 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
713 workstations. To compile a Linux kernel that runs on these, say Y
717 bool "SGI IP28 (Indigo2 R10k)"
722 select ARCH_MIGHT_HAVE_PC_SERIO
726 select DEFAULT_SGI_PARTITION
727 select DMA_NONCOHERENT
728 select GENERIC_ISA_DMA_SUPPORT_BROKEN
734 select SGI_HAS_INDYDOG
740 select SYS_HAS_CPU_R10000
741 select SYS_HAS_EARLY_PRINTK
742 select SYS_SUPPORTS_64BIT_KERNEL
743 select SYS_SUPPORTS_BIG_ENDIAN
744 select WAR_R10000_LLSC
745 select MIPS_L1_CACHE_SHIFT_7
747 This is the SGI Indigo2 with R10000 processor. To compile a Linux
748 kernel that runs on these, say Y here.
751 bool "SGI IP30 (Octane/Octane2)"
752 select ARCH_HAS_PHYS_TO_DMA
759 select SYNC_R4K if SMP
763 select IRQ_DOMAIN_HIERARCHY
764 select PCI_DRIVERS_GENERIC
765 select PCI_XTALK_BRIDGE
766 select SYS_HAS_EARLY_PRINTK
767 select SYS_HAS_CPU_R10000
768 select SYS_SUPPORTS_64BIT_KERNEL
769 select SYS_SUPPORTS_BIG_ENDIAN
770 select SYS_SUPPORTS_SMP
771 select WAR_R10000_LLSC
772 select MIPS_L1_CACHE_SHIFT_7
775 These are the SGI Octane and Octane2 graphics workstations. To
776 compile a Linux kernel that runs on these, say Y here.
782 select ARCH_HAS_PHYS_TO_DMA
788 select DMA_NONCOHERENT
791 select R5000_CPU_SCACHE
792 select RM7000_CPU_SCACHE
793 select SYS_HAS_CPU_R5000
794 select SYS_HAS_CPU_R10000 if BROKEN
795 select SYS_HAS_CPU_RM7000
796 select SYS_HAS_CPU_NEVADA
797 select SYS_SUPPORTS_64BIT_KERNEL
798 select SYS_SUPPORTS_BIG_ENDIAN
799 select WAR_ICACHE_REFILLS
801 If you want this kernel to run on SGI O2 workstation, say Y here.
804 bool "Sibyte BCM91120C-CRhine"
806 select SIBYTE_BCM1120
808 select SYS_HAS_CPU_SB1
809 select SYS_SUPPORTS_BIG_ENDIAN
810 select SYS_SUPPORTS_LITTLE_ENDIAN
813 bool "Sibyte BCM91120x-Carmel"
815 select SIBYTE_BCM1120
817 select SYS_HAS_CPU_SB1
818 select SYS_SUPPORTS_BIG_ENDIAN
819 select SYS_SUPPORTS_LITTLE_ENDIAN
822 bool "Sibyte BCM91125C-CRhone"
824 select SIBYTE_BCM1125
826 select SYS_HAS_CPU_SB1
827 select SYS_SUPPORTS_BIG_ENDIAN
828 select SYS_SUPPORTS_HIGHMEM
829 select SYS_SUPPORTS_LITTLE_ENDIAN
832 bool "Sibyte BCM91125E-Rhone"
834 select SIBYTE_BCM1125H
836 select SYS_HAS_CPU_SB1
837 select SYS_SUPPORTS_BIG_ENDIAN
838 select SYS_SUPPORTS_LITTLE_ENDIAN
841 bool "Sibyte BCM91250A-SWARM"
843 select HAVE_PATA_PLATFORM
846 select SYS_HAS_CPU_SB1
847 select SYS_SUPPORTS_BIG_ENDIAN
848 select SYS_SUPPORTS_HIGHMEM
849 select SYS_SUPPORTS_LITTLE_ENDIAN
850 select ZONE_DMA32 if 64BIT
851 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
853 config SIBYTE_LITTLESUR
854 bool "Sibyte BCM91250C2-LittleSur"
856 select HAVE_PATA_PLATFORM
859 select SYS_HAS_CPU_SB1
860 select SYS_SUPPORTS_BIG_ENDIAN
861 select SYS_SUPPORTS_HIGHMEM
862 select SYS_SUPPORTS_LITTLE_ENDIAN
863 select ZONE_DMA32 if 64BIT
865 config SIBYTE_SENTOSA
866 bool "Sibyte BCM91250E-Sentosa"
870 select SYS_HAS_CPU_SB1
871 select SYS_SUPPORTS_BIG_ENDIAN
872 select SYS_SUPPORTS_LITTLE_ENDIAN
873 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
876 bool "Sibyte BCM91480B-BigSur"
878 select NR_CPUS_DEFAULT_4
879 select SIBYTE_BCM1x80
881 select SYS_HAS_CPU_SB1
882 select SYS_SUPPORTS_BIG_ENDIAN
883 select SYS_SUPPORTS_HIGHMEM
884 select SYS_SUPPORTS_LITTLE_ENDIAN
885 select ZONE_DMA32 if 64BIT
886 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
889 bool "SNI RM200/300/400"
892 select FW_ARC if CPU_LITTLE_ENDIAN
893 select FW_ARC32 if CPU_LITTLE_ENDIAN
894 select FW_SNIPROM if CPU_BIG_ENDIAN
895 select ARCH_MAY_HAVE_PC_FDC
896 select ARCH_MIGHT_HAVE_PC_PARPORT
897 select ARCH_MIGHT_HAVE_PC_SERIO
901 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
902 select DMA_NONCOHERENT
903 select GENERIC_ISA_DMA
905 select HAVE_PCSPKR_PLATFORM
911 select MIPS_L1_CACHE_SHIFT_6
912 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
913 select SYS_HAS_CPU_R4X00
914 select SYS_HAS_CPU_R5000
915 select SYS_HAS_CPU_R10000
916 select R5000_CPU_SCACHE
917 select SYS_HAS_EARLY_PRINTK
918 select SYS_SUPPORTS_32BIT_KERNEL
919 select SYS_SUPPORTS_64BIT_KERNEL
920 select SYS_SUPPORTS_BIG_ENDIAN
921 select SYS_SUPPORTS_HIGHMEM
922 select SYS_SUPPORTS_LITTLE_ENDIAN
923 select WAR_R4600_V2_HIT_CACHEOP
925 The SNI RM200/300/400 are MIPS-based machines manufactured by
926 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
927 Technology and now in turn merged with Fujitsu. Say Y here to
928 support this machine type.
931 bool "Toshiba TX39 series based machines"
934 bool "Toshiba TX49 series based machines"
935 select WAR_TX49XX_ICACHE_INDEX_INV
937 config MIKROTIK_RB532
938 bool "Mikrotik RB532 boards"
941 select DMA_NONCOHERENT
944 select SYS_HAS_CPU_MIPS32_R1
945 select SYS_SUPPORTS_32BIT_KERNEL
946 select SYS_SUPPORTS_LITTLE_ENDIAN
950 select MIPS_L1_CACHE_SHIFT_4
952 Support the Mikrotik(tm) RouterBoard 532 series,
953 based on the IDT RC32434 SoC.
955 config CAVIUM_OCTEON_SOC
956 bool "Cavium Networks Octeon SoC based boards"
958 select ARCH_HAS_PHYS_TO_DMA
960 select PHYS_ADDR_T_64BIT
961 select SYS_SUPPORTS_64BIT_KERNEL
962 select SYS_SUPPORTS_BIG_ENDIAN
964 select EDAC_ATOMIC_SCRUB
965 select SYS_SUPPORTS_LITTLE_ENDIAN
966 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
967 select SYS_HAS_EARLY_PRINTK
968 select SYS_HAS_CPU_CAVIUM_OCTEON
970 select HAVE_PLAT_DELAY
971 select HAVE_PLAT_FW_INIT_CMDLINE
972 select HAVE_PLAT_MEMCPY
976 select ARCH_SPARSEMEM_ENABLE
977 select SYS_SUPPORTS_SMP
978 select NR_CPUS_DEFAULT_64
979 select MIPS_NR_CPU_NR_MAP_1024
982 select MTD_COMPLEX_MAPPINGS
984 select SYS_SUPPORTS_RELOCATABLE
986 This option supports all of the Octeon reference boards from Cavium
987 Networks. It builds a kernel that dynamically determines the Octeon
988 CPU type and supports all known board reference implementations.
989 Some of the supported boards are:
996 Say Y here for most Octeon reference boards.
1000 source "arch/mips/alchemy/Kconfig"
1001 source "arch/mips/ath25/Kconfig"
1002 source "arch/mips/ath79/Kconfig"
1003 source "arch/mips/bcm47xx/Kconfig"
1004 source "arch/mips/bcm63xx/Kconfig"
1005 source "arch/mips/bmips/Kconfig"
1006 source "arch/mips/generic/Kconfig"
1007 source "arch/mips/ingenic/Kconfig"
1008 source "arch/mips/jazz/Kconfig"
1009 source "arch/mips/lantiq/Kconfig"
1010 source "arch/mips/pic32/Kconfig"
1011 source "arch/mips/ralink/Kconfig"
1012 source "arch/mips/sgi-ip27/Kconfig"
1013 source "arch/mips/sibyte/Kconfig"
1014 source "arch/mips/txx9/Kconfig"
1015 source "arch/mips/vr41xx/Kconfig"
1016 source "arch/mips/cavium-octeon/Kconfig"
1017 source "arch/mips/loongson2ef/Kconfig"
1018 source "arch/mips/loongson32/Kconfig"
1019 source "arch/mips/loongson64/Kconfig"
1023 config GENERIC_HWEIGHT
1027 config GENERIC_CALIBRATE_DELAY
1031 config SCHED_OMIT_FRAME_POINTER
1036 # Select some configuration options automatically based on user selections.
1041 config ARCH_MAY_HAVE_PC_FDC
1072 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1078 config MIPS_CLOCK_VSYSCALL
1079 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1088 config ARCH_SUPPORTS_UPROBES
1091 config DMA_PERDEV_COHERENT
1093 select ARCH_HAS_SETUP_DMA_OPS
1094 select DMA_NONCOHERENT
1096 config DMA_NONCOHERENT
1099 # MIPS allows mixing "slightly different" Cacheability and Coherency
1100 # Attribute bits. It is believed that the uncached access through
1101 # KSEG1 and the implementation specific "uncached accelerated" used
1102 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1103 # significant advantages.
1105 select ARCH_HAS_DMA_WRITE_COMBINE
1106 select ARCH_HAS_DMA_PREP_COHERENT
1107 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1108 select ARCH_HAS_DMA_SET_UNCACHED
1109 select DMA_NONCOHERENT_MMAP
1110 select NEED_DMA_MAP_STATE
1112 config SYS_HAS_EARLY_PRINTK
1115 config SYS_SUPPORTS_HOTPLUG_CPU
1118 config MIPS_BONITO64
1127 config NO_IOPORT_MAP
1131 def_bool CPU_NO_LOAD_STORE_LR
1133 config GENERIC_ISA_DMA
1135 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1138 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1140 select GENERIC_ISA_DMA
1142 config HAVE_PLAT_DELAY
1145 config HAVE_PLAT_FW_INIT_CMDLINE
1148 config HAVE_PLAT_MEMCPY
1154 config SYS_SUPPORTS_RELOCATABLE
1157 Selected if the platform supports relocating the kernel.
1158 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1159 to allow access to command line and entropy sources.
1162 # Endianness selection. Sufficiently obscure so many users don't know what to
1163 # answer,so we try hard to limit the available choices. Also the use of a
1164 # choice statement should be more obvious to the user.
1167 prompt "Endianness selection"
1169 Some MIPS machines can be configured for either little or big endian
1170 byte order. These modes require different kernels and a different
1171 Linux distribution. In general there is one preferred byteorder for a
1172 particular system but some systems are just as commonly used in the
1173 one or the other endianness.
1175 config CPU_BIG_ENDIAN
1177 depends on SYS_SUPPORTS_BIG_ENDIAN
1179 config CPU_LITTLE_ENDIAN
1180 bool "Little endian"
1181 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1188 config SYS_SUPPORTS_APM_EMULATION
1191 config SYS_SUPPORTS_BIG_ENDIAN
1194 config SYS_SUPPORTS_LITTLE_ENDIAN
1197 config MIPS_HUGE_TLB_SUPPORT
1198 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1212 config PCI_GT64XXX_PCI0
1215 config PCI_XTALK_BRIDGE
1218 config NO_EXCEPT_FILL
1224 config SWAP_IO_SPACE
1227 config SGI_HAS_INDYDOG
1239 config SGI_HAS_ZILOG
1242 config SGI_HAS_I8042
1245 config DEFAULT_SGI_PARTITION
1257 config MIPS_L1_CACHE_SHIFT_4
1260 config MIPS_L1_CACHE_SHIFT_5
1263 config MIPS_L1_CACHE_SHIFT_6
1266 config MIPS_L1_CACHE_SHIFT_7
1269 config MIPS_L1_CACHE_SHIFT
1271 default "7" if MIPS_L1_CACHE_SHIFT_7
1272 default "6" if MIPS_L1_CACHE_SHIFT_6
1273 default "5" if MIPS_L1_CACHE_SHIFT_5
1274 default "4" if MIPS_L1_CACHE_SHIFT_4
1277 config ARC_CMDLINE_ONLY
1281 bool "ARC console support"
1282 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1296 menu "CPU selection"
1302 config CPU_LOONGSON64
1303 bool "Loongson 64-bit CPU"
1304 depends on SYS_HAS_CPU_LOONGSON64
1305 select ARCH_HAS_PHYS_TO_DMA
1307 select CPU_HAS_PREFETCH
1308 select CPU_SUPPORTS_64BIT_KERNEL
1309 select CPU_SUPPORTS_HIGHMEM
1310 select CPU_SUPPORTS_HUGEPAGES
1311 select CPU_SUPPORTS_MSA
1312 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1313 select CPU_MIPSR2_IRQ_VI
1314 select WEAK_ORDERING
1315 select WEAK_REORDERING_BEYOND_LLSC
1316 select MIPS_ASID_BITS_VARIABLE
1317 select MIPS_PGD_C0_CONTEXT
1318 select MIPS_L1_CACHE_SHIFT_6
1319 select MIPS_FP_SUPPORT
1324 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1325 cores implements the MIPS64R2 instruction set with many extensions,
1326 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1327 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1328 Loongson-2E/2F is not covered here and will be removed in future.
1330 config LOONGSON3_ENHANCEMENT
1331 bool "New Loongson-3 CPU Enhancements"
1333 depends on CPU_LOONGSON64
1335 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1336 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1337 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1338 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1339 Fast TLB refill support, etc.
1341 This option enable those enhancements which are not probed at run
1342 time. If you want a generic kernel to run on all Loongson 3 machines,
1343 please say 'N' here. If you want a high-performance kernel to run on
1344 new Loongson-3 machines only, please say 'Y' here.
1346 config CPU_LOONGSON3_WORKAROUNDS
1347 bool "Old Loongson-3 LLSC Workarounds"
1349 depends on CPU_LOONGSON64
1351 Loongson-3 processors have the llsc issues which require workarounds.
1352 Without workarounds the system may hang unexpectedly.
1354 Newer Loongson-3 will fix these issues and no workarounds are needed.
1355 The workarounds have no significant side effect on them but may
1356 decrease the performance of the system so this option should be
1357 disabled unless the kernel is intended to be run on old systems.
1359 If unsure, please say Y.
1361 config CPU_LOONGSON3_CPUCFG_EMULATION
1362 bool "Emulate the CPUCFG instruction on older Loongson cores"
1364 depends on CPU_LOONGSON64
1366 Loongson-3A R4 and newer have the CPUCFG instruction available for
1367 userland to query CPU capabilities, much like CPUID on x86. This
1368 option provides emulation of the instruction on older Loongson
1369 cores, back to Loongson-3A1000.
1371 If unsure, please say Y.
1373 config CPU_LOONGSON2E
1375 depends on SYS_HAS_CPU_LOONGSON2E
1376 select CPU_LOONGSON2EF
1378 The Loongson 2E processor implements the MIPS III instruction set
1379 with many extensions.
1381 It has an internal FPGA northbridge, which is compatible to
1384 config CPU_LOONGSON2F
1386 depends on SYS_HAS_CPU_LOONGSON2F
1387 select CPU_LOONGSON2EF
1390 The Loongson 2F processor implements the MIPS III instruction set
1391 with many extensions.
1393 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1394 have a similar programming interface with FPGA northbridge used in
1397 config CPU_LOONGSON1B
1399 depends on SYS_HAS_CPU_LOONGSON1B
1400 select CPU_LOONGSON32
1401 select LEDS_GPIO_REGISTER
1403 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1404 Release 1 instruction set and part of the MIPS32 Release 2
1407 config CPU_LOONGSON1C
1409 depends on SYS_HAS_CPU_LOONGSON1C
1410 select CPU_LOONGSON32
1411 select LEDS_GPIO_REGISTER
1413 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1414 Release 1 instruction set and part of the MIPS32 Release 2
1417 config CPU_MIPS32_R1
1418 bool "MIPS32 Release 1"
1419 depends on SYS_HAS_CPU_MIPS32_R1
1420 select CPU_HAS_PREFETCH
1421 select CPU_SUPPORTS_32BIT_KERNEL
1422 select CPU_SUPPORTS_HIGHMEM
1424 Choose this option to build a kernel for release 1 or later of the
1425 MIPS32 architecture. Most modern embedded systems with a 32-bit
1426 MIPS processor are based on a MIPS32 processor. If you know the
1427 specific type of processor in your system, choose those that one
1428 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1429 Release 2 of the MIPS32 architecture is available since several
1430 years so chances are you even have a MIPS32 Release 2 processor
1431 in which case you should choose CPU_MIPS32_R2 instead for better
1434 config CPU_MIPS32_R2
1435 bool "MIPS32 Release 2"
1436 depends on SYS_HAS_CPU_MIPS32_R2
1437 select CPU_HAS_PREFETCH
1438 select CPU_SUPPORTS_32BIT_KERNEL
1439 select CPU_SUPPORTS_HIGHMEM
1440 select CPU_SUPPORTS_MSA
1443 Choose this option to build a kernel for release 2 or later of the
1444 MIPS32 architecture. Most modern embedded systems with a 32-bit
1445 MIPS processor are based on a MIPS32 processor. If you know the
1446 specific type of processor in your system, choose those that one
1447 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1449 config CPU_MIPS32_R5
1450 bool "MIPS32 Release 5"
1451 depends on SYS_HAS_CPU_MIPS32_R5
1452 select CPU_HAS_PREFETCH
1453 select CPU_SUPPORTS_32BIT_KERNEL
1454 select CPU_SUPPORTS_HIGHMEM
1455 select CPU_SUPPORTS_MSA
1457 select MIPS_O32_FP64_SUPPORT
1459 Choose this option to build a kernel for release 5 or later of the
1460 MIPS32 architecture. New MIPS processors, starting with the Warrior
1461 family, are based on a MIPS32r5 processor. If you own an older
1462 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1464 config CPU_MIPS32_R6
1465 bool "MIPS32 Release 6"
1466 depends on SYS_HAS_CPU_MIPS32_R6
1467 select CPU_HAS_PREFETCH
1468 select CPU_NO_LOAD_STORE_LR
1469 select CPU_SUPPORTS_32BIT_KERNEL
1470 select CPU_SUPPORTS_HIGHMEM
1471 select CPU_SUPPORTS_MSA
1473 select MIPS_O32_FP64_SUPPORT
1475 Choose this option to build a kernel for release 6 or later of the
1476 MIPS32 architecture. New MIPS processors, starting with the Warrior
1477 family, are based on a MIPS32r6 processor. If you own an older
1478 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1480 config CPU_MIPS64_R1
1481 bool "MIPS64 Release 1"
1482 depends on SYS_HAS_CPU_MIPS64_R1
1483 select CPU_HAS_PREFETCH
1484 select CPU_SUPPORTS_32BIT_KERNEL
1485 select CPU_SUPPORTS_64BIT_KERNEL
1486 select CPU_SUPPORTS_HIGHMEM
1487 select CPU_SUPPORTS_HUGEPAGES
1489 Choose this option to build a kernel for release 1 or later of the
1490 MIPS64 architecture. Many modern embedded systems with a 64-bit
1491 MIPS processor are based on a MIPS64 processor. If you know the
1492 specific type of processor in your system, choose those that one
1493 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1494 Release 2 of the MIPS64 architecture is available since several
1495 years so chances are you even have a MIPS64 Release 2 processor
1496 in which case you should choose CPU_MIPS64_R2 instead for better
1499 config CPU_MIPS64_R2
1500 bool "MIPS64 Release 2"
1501 depends on SYS_HAS_CPU_MIPS64_R2
1502 select CPU_HAS_PREFETCH
1503 select CPU_SUPPORTS_32BIT_KERNEL
1504 select CPU_SUPPORTS_64BIT_KERNEL
1505 select CPU_SUPPORTS_HIGHMEM
1506 select CPU_SUPPORTS_HUGEPAGES
1507 select CPU_SUPPORTS_MSA
1510 Choose this option to build a kernel for release 2 or later of the
1511 MIPS64 architecture. Many modern embedded systems with a 64-bit
1512 MIPS processor are based on a MIPS64 processor. If you know the
1513 specific type of processor in your system, choose those that one
1514 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1516 config CPU_MIPS64_R5
1517 bool "MIPS64 Release 5"
1518 depends on SYS_HAS_CPU_MIPS64_R5
1519 select CPU_HAS_PREFETCH
1520 select CPU_SUPPORTS_32BIT_KERNEL
1521 select CPU_SUPPORTS_64BIT_KERNEL
1522 select CPU_SUPPORTS_HIGHMEM
1523 select CPU_SUPPORTS_HUGEPAGES
1524 select CPU_SUPPORTS_MSA
1525 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1528 Choose this option to build a kernel for release 5 or later of the
1529 MIPS64 architecture. This is a intermediate MIPS architecture
1530 release partly implementing release 6 features. Though there is no
1531 any hardware known to be based on this release.
1533 config CPU_MIPS64_R6
1534 bool "MIPS64 Release 6"
1535 depends on SYS_HAS_CPU_MIPS64_R6
1536 select CPU_HAS_PREFETCH
1537 select CPU_NO_LOAD_STORE_LR
1538 select CPU_SUPPORTS_32BIT_KERNEL
1539 select CPU_SUPPORTS_64BIT_KERNEL
1540 select CPU_SUPPORTS_HIGHMEM
1541 select CPU_SUPPORTS_HUGEPAGES
1542 select CPU_SUPPORTS_MSA
1543 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1546 Choose this option to build a kernel for release 6 or later of the
1547 MIPS64 architecture. New MIPS processors, starting with the Warrior
1548 family, are based on a MIPS64r6 processor. If you own an older
1549 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1552 bool "MIPS Warrior P5600"
1553 depends on SYS_HAS_CPU_P5600
1554 select CPU_HAS_PREFETCH
1555 select CPU_SUPPORTS_32BIT_KERNEL
1556 select CPU_SUPPORTS_HIGHMEM
1557 select CPU_SUPPORTS_MSA
1558 select CPU_SUPPORTS_CPUFREQ
1559 select CPU_MIPSR2_IRQ_VI
1560 select CPU_MIPSR2_IRQ_EI
1562 select MIPS_O32_FP64_SUPPORT
1564 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1565 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1566 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1567 level features like up to six P5600 calculation cores, CM2 with L2
1568 cache, IOCU/IOMMU (though might be unused depending on the system-
1569 specific IP core configuration), GIC, CPC, virtualisation module,
1574 depends on SYS_HAS_CPU_R3000
1577 select CPU_SUPPORTS_32BIT_KERNEL
1578 select CPU_SUPPORTS_HIGHMEM
1580 Please make sure to pick the right CPU type. Linux/MIPS is not
1581 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1582 *not* work on R4000 machines and vice versa. However, since most
1583 of the supported machines have an R4000 (or similar) CPU, R4x00
1584 might be a safe bet. If the resulting kernel does not work,
1585 try to recompile with R3000.
1589 depends on SYS_HAS_CPU_TX39XX
1590 select CPU_SUPPORTS_32BIT_KERNEL
1595 depends on SYS_HAS_CPU_VR41XX
1596 select CPU_SUPPORTS_32BIT_KERNEL
1597 select CPU_SUPPORTS_64BIT_KERNEL
1599 The options selects support for the NEC VR4100 series of processors.
1600 Only choose this option if you have one of these processors as a
1601 kernel built with this option will not run on any other type of
1602 processor or vice versa.
1606 depends on SYS_HAS_CPU_R4300
1607 select CPU_SUPPORTS_32BIT_KERNEL
1608 select CPU_SUPPORTS_64BIT_KERNEL
1610 MIPS Technologies R4300-series processors.
1614 depends on SYS_HAS_CPU_R4X00
1615 select CPU_SUPPORTS_32BIT_KERNEL
1616 select CPU_SUPPORTS_64BIT_KERNEL
1617 select CPU_SUPPORTS_HUGEPAGES
1619 MIPS Technologies R4000-series processors other than 4300, including
1620 the R4000, R4400, R4600, and 4700.
1624 depends on SYS_HAS_CPU_TX49XX
1625 select CPU_HAS_PREFETCH
1626 select CPU_SUPPORTS_32BIT_KERNEL
1627 select CPU_SUPPORTS_64BIT_KERNEL
1628 select CPU_SUPPORTS_HUGEPAGES
1632 depends on SYS_HAS_CPU_R5000
1633 select CPU_SUPPORTS_32BIT_KERNEL
1634 select CPU_SUPPORTS_64BIT_KERNEL
1635 select CPU_SUPPORTS_HUGEPAGES
1637 MIPS Technologies R5000-series processors other than the Nevada.
1641 depends on SYS_HAS_CPU_R5500
1642 select CPU_SUPPORTS_32BIT_KERNEL
1643 select CPU_SUPPORTS_64BIT_KERNEL
1644 select CPU_SUPPORTS_HUGEPAGES
1646 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1651 depends on SYS_HAS_CPU_NEVADA
1652 select CPU_SUPPORTS_32BIT_KERNEL
1653 select CPU_SUPPORTS_64BIT_KERNEL
1654 select CPU_SUPPORTS_HUGEPAGES
1656 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1660 depends on SYS_HAS_CPU_R10000
1661 select CPU_HAS_PREFETCH
1662 select CPU_SUPPORTS_32BIT_KERNEL
1663 select CPU_SUPPORTS_64BIT_KERNEL
1664 select CPU_SUPPORTS_HIGHMEM
1665 select CPU_SUPPORTS_HUGEPAGES
1667 MIPS Technologies R10000-series processors.
1671 depends on SYS_HAS_CPU_RM7000
1672 select CPU_HAS_PREFETCH
1673 select CPU_SUPPORTS_32BIT_KERNEL
1674 select CPU_SUPPORTS_64BIT_KERNEL
1675 select CPU_SUPPORTS_HIGHMEM
1676 select CPU_SUPPORTS_HUGEPAGES
1680 depends on SYS_HAS_CPU_SB1
1681 select CPU_SUPPORTS_32BIT_KERNEL
1682 select CPU_SUPPORTS_64BIT_KERNEL
1683 select CPU_SUPPORTS_HIGHMEM
1684 select CPU_SUPPORTS_HUGEPAGES
1685 select WEAK_ORDERING
1687 config CPU_CAVIUM_OCTEON
1688 bool "Cavium Octeon processor"
1689 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1690 select CPU_HAS_PREFETCH
1691 select CPU_SUPPORTS_64BIT_KERNEL
1692 select WEAK_ORDERING
1693 select CPU_SUPPORTS_HIGHMEM
1694 select CPU_SUPPORTS_HUGEPAGES
1695 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1696 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1697 select MIPS_L1_CACHE_SHIFT_7
1700 The Cavium Octeon processor is a highly integrated chip containing
1701 many ethernet hardware widgets for networking tasks. The processor
1702 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1703 Full details can be found at http://www.caviumnetworks.com.
1706 bool "Broadcom BMIPS"
1707 depends on SYS_HAS_CPU_BMIPS
1709 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1710 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1711 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1712 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1713 select CPU_SUPPORTS_32BIT_KERNEL
1714 select DMA_NONCOHERENT
1716 select SWAP_IO_SPACE
1717 select WEAK_ORDERING
1718 select CPU_SUPPORTS_HIGHMEM
1719 select CPU_HAS_PREFETCH
1720 select CPU_SUPPORTS_CPUFREQ
1721 select MIPS_EXTERNAL_TIMER
1722 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1724 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1728 config CPU_MIPS32_3_5_FEATURES
1729 bool "MIPS32 Release 3.5 Features"
1730 depends on SYS_HAS_CPU_MIPS32_R3_5
1731 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1734 Choose this option to build a kernel for release 2 or later of the
1735 MIPS32 architecture including features from the 3.5 release such as
1736 support for Enhanced Virtual Addressing (EVA).
1738 config CPU_MIPS32_3_5_EVA
1739 bool "Enhanced Virtual Addressing (EVA)"
1740 depends on CPU_MIPS32_3_5_FEATURES
1744 Choose this option if you want to enable the Enhanced Virtual
1745 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1746 One of its primary benefits is an increase in the maximum size
1747 of lowmem (up to 3GB). If unsure, say 'N' here.
1749 config CPU_MIPS32_R5_FEATURES
1750 bool "MIPS32 Release 5 Features"
1751 depends on SYS_HAS_CPU_MIPS32_R5
1752 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1754 Choose this option to build a kernel for release 2 or later of the
1755 MIPS32 architecture including features from release 5 such as
1756 support for Extended Physical Addressing (XPA).
1758 config CPU_MIPS32_R5_XPA
1759 bool "Extended Physical Addressing (XPA)"
1760 depends on CPU_MIPS32_R5_FEATURES
1762 depends on !PAGE_SIZE_4KB
1763 depends on SYS_SUPPORTS_HIGHMEM
1766 select PHYS_ADDR_T_64BIT
1769 Choose this option if you want to enable the Extended Physical
1770 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1771 benefit is to increase physical addressing equal to or greater
1772 than 40 bits. Note that this has the side effect of turning on
1773 64-bit addressing which in turn makes the PTEs 64-bit in size.
1774 If unsure, say 'N' here.
1777 config CPU_NOP_WORKAROUNDS
1780 config CPU_JUMP_WORKAROUNDS
1783 config CPU_LOONGSON2F_WORKAROUNDS
1784 bool "Loongson 2F Workarounds"
1786 select CPU_NOP_WORKAROUNDS
1787 select CPU_JUMP_WORKAROUNDS
1789 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1790 require workarounds. Without workarounds the system may hang
1791 unexpectedly. For more information please refer to the gas
1792 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1794 Loongson 2F03 and later have fixed these issues and no workarounds
1795 are needed. The workarounds have no significant side effect on them
1796 but may decrease the performance of the system so this option should
1797 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1800 If unsure, please say Y.
1801 endif # CPU_LOONGSON2F
1803 config SYS_SUPPORTS_ZBOOT
1805 select HAVE_KERNEL_GZIP
1806 select HAVE_KERNEL_BZIP2
1807 select HAVE_KERNEL_LZ4
1808 select HAVE_KERNEL_LZMA
1809 select HAVE_KERNEL_LZO
1810 select HAVE_KERNEL_XZ
1811 select HAVE_KERNEL_ZSTD
1813 config SYS_SUPPORTS_ZBOOT_UART16550
1815 select SYS_SUPPORTS_ZBOOT
1817 config SYS_SUPPORTS_ZBOOT_UART_PROM
1819 select SYS_SUPPORTS_ZBOOT
1821 config CPU_LOONGSON2EF
1823 select CPU_SUPPORTS_32BIT_KERNEL
1824 select CPU_SUPPORTS_64BIT_KERNEL
1825 select CPU_SUPPORTS_HIGHMEM
1826 select CPU_SUPPORTS_HUGEPAGES
1827 select ARCH_HAS_PHYS_TO_DMA
1829 config CPU_LOONGSON32
1833 select CPU_HAS_PREFETCH
1834 select CPU_SUPPORTS_32BIT_KERNEL
1835 select CPU_SUPPORTS_HIGHMEM
1836 select CPU_SUPPORTS_CPUFREQ
1838 config CPU_BMIPS32_3300
1839 select SMP_UP if SMP
1842 config CPU_BMIPS4350
1844 select SYS_SUPPORTS_SMP
1845 select SYS_SUPPORTS_HOTPLUG_CPU
1847 config CPU_BMIPS4380
1849 select MIPS_L1_CACHE_SHIFT_6
1850 select SYS_SUPPORTS_SMP
1851 select SYS_SUPPORTS_HOTPLUG_CPU
1854 config CPU_BMIPS5000
1856 select MIPS_CPU_SCACHE
1857 select MIPS_L1_CACHE_SHIFT_7
1858 select SYS_SUPPORTS_SMP
1859 select SYS_SUPPORTS_HOTPLUG_CPU
1862 config SYS_HAS_CPU_LOONGSON64
1864 select CPU_SUPPORTS_CPUFREQ
1867 config SYS_HAS_CPU_LOONGSON2E
1870 config SYS_HAS_CPU_LOONGSON2F
1872 select CPU_SUPPORTS_CPUFREQ
1873 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1875 config SYS_HAS_CPU_LOONGSON1B
1878 config SYS_HAS_CPU_LOONGSON1C
1881 config SYS_HAS_CPU_MIPS32_R1
1884 config SYS_HAS_CPU_MIPS32_R2
1887 config SYS_HAS_CPU_MIPS32_R3_5
1890 config SYS_HAS_CPU_MIPS32_R5
1892 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1894 config SYS_HAS_CPU_MIPS32_R6
1896 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1898 config SYS_HAS_CPU_MIPS64_R1
1901 config SYS_HAS_CPU_MIPS64_R2
1904 config SYS_HAS_CPU_MIPS64_R5
1906 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1908 config SYS_HAS_CPU_MIPS64_R6
1910 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1912 config SYS_HAS_CPU_P5600
1914 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1916 config SYS_HAS_CPU_R3000
1919 config SYS_HAS_CPU_TX39XX
1922 config SYS_HAS_CPU_VR41XX
1925 config SYS_HAS_CPU_R4300
1928 config SYS_HAS_CPU_R4X00
1931 config SYS_HAS_CPU_TX49XX
1934 config SYS_HAS_CPU_R5000
1937 config SYS_HAS_CPU_R5500
1940 config SYS_HAS_CPU_NEVADA
1943 config SYS_HAS_CPU_R10000
1945 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1947 config SYS_HAS_CPU_RM7000
1950 config SYS_HAS_CPU_SB1
1953 config SYS_HAS_CPU_CAVIUM_OCTEON
1956 config SYS_HAS_CPU_BMIPS
1959 config SYS_HAS_CPU_BMIPS32_3300
1961 select SYS_HAS_CPU_BMIPS
1963 config SYS_HAS_CPU_BMIPS4350
1965 select SYS_HAS_CPU_BMIPS
1967 config SYS_HAS_CPU_BMIPS4380
1969 select SYS_HAS_CPU_BMIPS
1971 config SYS_HAS_CPU_BMIPS5000
1973 select SYS_HAS_CPU_BMIPS
1974 select ARCH_HAS_SYNC_DMA_FOR_CPU
1977 # CPU may reorder R->R, R->W, W->R, W->W
1978 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1980 config WEAK_ORDERING
1984 # CPU may reorder reads and writes beyond LL/SC
1985 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1987 config WEAK_REORDERING_BEYOND_LLSC
1992 # These two indicate any level of the MIPS32 and MIPS64 architecture
1996 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1997 CPU_MIPS32_R6 || CPU_P5600
2001 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2002 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2005 # These indicate the revision of the architecture
2009 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2013 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2015 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2020 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2022 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2027 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2029 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2030 select HAVE_ARCH_BITREVERSE
2031 select MIPS_ASID_BITS_VARIABLE
2032 select MIPS_CRC_SUPPORT
2035 config TARGET_ISA_REV
2037 default 1 if CPU_MIPSR1
2038 default 2 if CPU_MIPSR2
2039 default 5 if CPU_MIPSR5
2040 default 6 if CPU_MIPSR6
2043 Reflects the ISA revision being targeted by the kernel build. This
2044 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2052 config SYS_SUPPORTS_32BIT_KERNEL
2054 config SYS_SUPPORTS_64BIT_KERNEL
2056 config CPU_SUPPORTS_32BIT_KERNEL
2058 config CPU_SUPPORTS_64BIT_KERNEL
2060 config CPU_SUPPORTS_CPUFREQ
2062 config CPU_SUPPORTS_ADDRWINCFG
2064 config CPU_SUPPORTS_HUGEPAGES
2066 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2067 config MIPS_PGD_C0_CONTEXT
2070 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2073 # Set to y for ptrace access to watch registers.
2075 config HARDWARE_WATCHPOINTS
2077 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2082 prompt "Kernel code model"
2084 You should only select this option if you have a workload that
2085 actually benefits from 64-bit processing or if your machine has
2086 large memory. You will only be presented a single option in this
2087 menu if your system does not support both 32-bit and 64-bit kernels.
2090 bool "32-bit kernel"
2091 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2094 Select this option if you want to build a 32-bit kernel.
2097 bool "64-bit kernel"
2098 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2100 Select this option if you want to build a 64-bit kernel.
2104 config MIPS_VA_BITS_48
2105 bool "48 bits virtual memory"
2108 Support a maximum at least 48 bits of application virtual
2109 memory. Default is 40 bits or less, depending on the CPU.
2110 For page sizes 16k and above, this option results in a small
2111 memory overhead for page tables. For 4k page size, a fourth
2112 level of page tables is added which imposes both a memory
2113 overhead as well as slower TLB fault handling.
2117 config ZBOOT_LOAD_ADDRESS
2118 hex "Compressed kernel load address"
2119 default 0xffffffff80400000 if BCM47XX
2121 depends on SYS_SUPPORTS_ZBOOT
2123 The address to load compressed kernel, aka vmlinuz.
2125 This is only used if non-zero.
2128 prompt "Kernel page size"
2129 default PAGE_SIZE_4KB
2131 config PAGE_SIZE_4KB
2133 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2135 This option select the standard 4kB Linux page size. On some
2136 R3000-family processors this is the only available page size. Using
2137 4kB page size will minimize memory consumption and is therefore
2138 recommended for low memory systems.
2140 config PAGE_SIZE_8KB
2142 depends on CPU_CAVIUM_OCTEON
2143 depends on !MIPS_VA_BITS_48
2145 Using 8kB page size will result in higher performance kernel at
2146 the price of higher memory consumption. This option is available
2147 only on cnMIPS processors. Note that you will need a suitable Linux
2148 distribution to support this.
2150 config PAGE_SIZE_16KB
2152 depends on !CPU_R3000 && !CPU_TX39XX
2154 Using 16kB page size will result in higher performance kernel at
2155 the price of higher memory consumption. This option is available on
2156 all non-R3000 family processors. Note that you will need a suitable
2157 Linux distribution to support this.
2159 config PAGE_SIZE_32KB
2161 depends on CPU_CAVIUM_OCTEON
2162 depends on !MIPS_VA_BITS_48
2164 Using 32kB page size will result in higher performance kernel at
2165 the price of higher memory consumption. This option is available
2166 only on cnMIPS cores. Note that you will need a suitable Linux
2167 distribution to support this.
2169 config PAGE_SIZE_64KB
2171 depends on !CPU_R3000 && !CPU_TX39XX
2173 Using 64kB page size will result in higher performance kernel at
2174 the price of higher memory consumption. This option is available on
2175 all non-R3000 family processor. Not that at the time of this
2176 writing this option is still high experimental.
2180 config FORCE_MAX_ZONEORDER
2181 int "Maximum zone order"
2182 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2183 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2184 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2185 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2186 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2187 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2191 The kernel memory allocator divides physically contiguous memory
2192 blocks into "zones", where each zone is a power of two number of
2193 pages. This option selects the largest power of two that the kernel
2194 keeps in the memory allocator. If you need to allocate very large
2195 blocks of physically contiguous memory, then you may need to
2196 increase this value.
2198 This config option is actually maximum order plus one. For example,
2199 a value of 11 means that the largest free memory block is 2^10 pages.
2201 The page size is not necessarily 4KB. Keep this in mind
2202 when choosing a value for this option.
2207 config IP22_CPU_SCACHE
2212 # Support for a MIPS32 / MIPS64 style S-caches
2214 config MIPS_CPU_SCACHE
2218 config R5000_CPU_SCACHE
2222 config RM7000_CPU_SCACHE
2226 config SIBYTE_DMA_PAGEOPS
2227 bool "Use DMA to clear/copy pages"
2230 Instead of using the CPU to zero and copy pages, use a Data Mover
2231 channel. These DMA channels are otherwise unused by the standard
2232 SiByte Linux port. Seems to give a small performance benefit.
2234 config CPU_HAS_PREFETCH
2237 config CPU_GENERIC_DUMP_TLB
2239 default y if !(CPU_R3000 || CPU_TX39XX)
2241 config MIPS_FP_SUPPORT
2242 bool "Floating Point support" if EXPERT
2245 Select y to include support for floating point in the kernel
2246 including initialization of FPU hardware, FP context save & restore
2247 and emulation of an FPU where necessary. Without this support any
2248 userland program attempting to use floating point instructions will
2251 If you know that your userland will not attempt to use floating point
2252 instructions then you can say n here to shrink the kernel a little.
2256 config CPU_R2300_FPU
2258 depends on MIPS_FP_SUPPORT
2259 default y if CPU_R3000 || CPU_TX39XX
2266 depends on MIPS_FP_SUPPORT
2267 default y if !CPU_R2300_FPU
2269 config CPU_R4K_CACHE_TLB
2271 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2274 bool "MIPS MT SMP support (1 TC on each available VPE)"
2276 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2277 select CPU_MIPSR2_IRQ_VI
2278 select CPU_MIPSR2_IRQ_EI
2283 select SYS_SUPPORTS_SMP
2284 select SYS_SUPPORTS_SCHED_SMT
2285 select MIPS_PERF_SHARED_TC_COUNTERS
2287 This is a kernel model which is known as SMVP. This is supported
2288 on cores with the MT ASE and uses the available VPEs to implement
2289 virtual processors which supports SMP. This is equivalent to the
2290 Intel Hyperthreading feature. For further information go to
2291 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2297 bool "SMT (multithreading) scheduler support"
2298 depends on SYS_SUPPORTS_SCHED_SMT
2301 SMT scheduler support improves the CPU scheduler's decision making
2302 when dealing with MIPS MT enabled cores at a cost of slightly
2303 increased overhead in some places. If unsure say N here.
2305 config SYS_SUPPORTS_SCHED_SMT
2308 config SYS_SUPPORTS_MULTITHREADING
2311 config MIPS_MT_FPAFF
2312 bool "Dynamic FPU affinity for FP-intensive threads"
2314 depends on MIPS_MT_SMP
2316 config MIPSR2_TO_R6_EMULATOR
2317 bool "MIPS R2-to-R6 emulator"
2318 depends on CPU_MIPSR6
2319 depends on MIPS_FP_SUPPORT
2322 Choose this option if you want to run non-R6 MIPS userland code.
2323 Even if you say 'Y' here, the emulator will still be disabled by
2324 default. You can enable it using the 'mipsr2emu' kernel option.
2325 The only reason this is a build-time option is to save ~14K from the
2328 config SYS_SUPPORTS_VPE_LOADER
2330 depends on SYS_SUPPORTS_MULTITHREADING
2332 Indicates that the platform supports the VPE loader, and provides
2335 config MIPS_VPE_LOADER
2336 bool "VPE loader support."
2337 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2338 select CPU_MIPSR2_IRQ_VI
2339 select CPU_MIPSR2_IRQ_EI
2342 Includes a loader for loading an elf relocatable object
2343 onto another VPE and running it.
2345 config MIPS_VPE_LOADER_CMP
2348 depends on MIPS_VPE_LOADER && MIPS_CMP
2350 config MIPS_VPE_LOADER_MT
2353 depends on MIPS_VPE_LOADER && !MIPS_CMP
2355 config MIPS_VPE_LOADER_TOM
2356 bool "Load VPE program into memory hidden from linux"
2357 depends on MIPS_VPE_LOADER
2360 The loader can use memory that is present but has been hidden from
2361 Linux using the kernel command line option "mem=xxMB". It's up to
2362 you to ensure the amount you put in the option and the space your
2363 program requires is less or equal to the amount physically present.
2365 config MIPS_VPE_APSP_API
2366 bool "Enable support for AP/SP API (RTLX)"
2367 depends on MIPS_VPE_LOADER
2369 config MIPS_VPE_APSP_API_CMP
2372 depends on MIPS_VPE_APSP_API && MIPS_CMP
2374 config MIPS_VPE_APSP_API_MT
2377 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2380 bool "MIPS CMP framework support (DEPRECATED)"
2381 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2384 select SYS_SUPPORTS_SMP
2385 select WEAK_ORDERING
2388 Select this if you are using a bootloader which implements the "CMP
2389 framework" protocol (ie. YAMON) and want your kernel to make use of
2390 its ability to start secondary CPUs.
2392 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2396 bool "MIPS Coherent Processing System support"
2397 depends on SYS_SUPPORTS_MIPS_CPS
2399 select MIPS_CPS_PM if HOTPLUG_CPU
2401 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2402 select SYS_SUPPORTS_HOTPLUG_CPU
2403 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2404 select SYS_SUPPORTS_SMP
2405 select WEAK_ORDERING
2406 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2408 Select this if you wish to run an SMP kernel across multiple cores
2409 within a MIPS Coherent Processing System. When this option is
2410 enabled the kernel will probe for other cores and boot them with
2411 no external assistance. It is safe to enable this when hardware
2412 support is unavailable.
2425 config SB1_PASS_2_WORKAROUNDS
2427 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2430 config SB1_PASS_2_1_WORKAROUNDS
2432 depends on CPU_SB1 && CPU_SB1_PASS_2
2436 prompt "SmartMIPS or microMIPS ASE support"
2438 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2441 Select this if you want neither microMIPS nor SmartMIPS support
2443 config CPU_HAS_SMARTMIPS
2444 depends on SYS_SUPPORTS_SMARTMIPS
2447 SmartMIPS is a extension of the MIPS32 architecture aimed at
2448 increased security at both hardware and software level for
2449 smartcards. Enabling this option will allow proper use of the
2450 SmartMIPS instructions by Linux applications. However a kernel with
2451 this option will not work on a MIPS core without SmartMIPS core. If
2452 you don't know you probably don't have SmartMIPS and should say N
2455 config CPU_MICROMIPS
2456 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2459 When this option is enabled the kernel will be built using the
2465 bool "Support for the MIPS SIMD Architecture"
2466 depends on CPU_SUPPORTS_MSA
2467 depends on MIPS_FP_SUPPORT
2468 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2470 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2471 and a set of SIMD instructions to operate on them. When this option
2472 is enabled the kernel will support allocating & switching MSA
2473 vector register contexts. If you know that your kernel will only be
2474 running on CPUs which do not support MSA or that your userland will
2475 not be making use of it then you may wish to say N here to reduce
2476 the size & complexity of your kernel.
2487 depends on !CPU_DIEI_BROKEN
2490 config CPU_DIEI_BROKEN
2496 config CPU_NO_LOAD_STORE_LR
2499 CPU lacks support for unaligned load and store instructions:
2500 LWL, LWR, SWL, SWR (Load/store word left/right).
2501 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2505 # Vectored interrupt mode is an R2 feature
2507 config CPU_MIPSR2_IRQ_VI
2511 # Extended interrupt mode is an R2 feature
2513 config CPU_MIPSR2_IRQ_EI
2518 depends on !CPU_R3000
2524 config CPU_DADDI_WORKAROUNDS
2527 config CPU_R4000_WORKAROUNDS
2529 select CPU_R4400_WORKAROUNDS
2531 config CPU_R4400_WORKAROUNDS
2534 config CPU_R4X00_BUGS64
2536 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2538 config MIPS_ASID_SHIFT
2540 default 6 if CPU_R3000 || CPU_TX39XX
2543 config MIPS_ASID_BITS
2545 default 0 if MIPS_ASID_BITS_VARIABLE
2546 default 6 if CPU_R3000 || CPU_TX39XX
2549 config MIPS_ASID_BITS_VARIABLE
2552 config MIPS_CRC_SUPPORT
2555 # R4600 erratum. Due to the lack of errata information the exact
2556 # technical details aren't known. I've experimentally found that disabling
2557 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2559 config WAR_R4600_V1_INDEX_ICACHEOP
2562 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2564 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2565 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2566 # executed if there is no other dcache activity. If the dcache is
2567 # accessed for another instruction immediately preceding when these
2568 # cache instructions are executing, it is possible that the dcache
2569 # tag match outputs used by these cache instructions will be
2570 # incorrect. These cache instructions should be preceded by at least
2571 # four instructions that are not any kind of load or store
2574 # This is not allowed: lw
2578 # cache Hit_Writeback_Invalidate_D
2580 # This is allowed: lw
2585 # cache Hit_Writeback_Invalidate_D
2586 config WAR_R4600_V1_HIT_CACHEOP
2589 # Writeback and invalidate the primary cache dcache before DMA.
2591 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2592 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2593 # operate correctly if the internal data cache refill buffer is empty. These
2594 # CACHE instructions should be separated from any potential data cache miss
2595 # by a load instruction to an uncached address to empty the response buffer."
2596 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2598 config WAR_R4600_V2_HIT_CACHEOP
2601 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2602 # the line which this instruction itself exists, the following
2603 # operation is not guaranteed."
2605 # Workaround: do two phase flushing for Index_Invalidate_I
2606 config WAR_TX49XX_ICACHE_INDEX_INV
2609 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2610 # opposes it being called that) where invalid instructions in the same
2611 # I-cache line worth of instructions being fetched may case spurious
2613 config WAR_ICACHE_REFILLS
2616 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2617 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2618 config WAR_R10000_LLSC
2621 # 34K core erratum: "Problems Executing the TLBR Instruction"
2622 config WAR_MIPS34K_MISSED_ITLB
2626 # - Highmem only makes sense for the 32-bit kernel.
2627 # - The current highmem code will only work properly on physically indexed
2628 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2629 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2630 # moment we protect the user and offer the highmem option only on machines
2631 # where it's known to be safe. This will not offer highmem on a few systems
2632 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2633 # indexed CPUs but we're playing safe.
2634 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2635 # know they might have memory configurations that could make use of highmem
2639 bool "High Memory Support"
2640 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2643 config CPU_SUPPORTS_HIGHMEM
2646 config SYS_SUPPORTS_HIGHMEM
2649 config SYS_SUPPORTS_SMARTMIPS
2652 config SYS_SUPPORTS_MICROMIPS
2655 config SYS_SUPPORTS_MIPS16
2658 This option must be set if a kernel might be executed on a MIPS16-
2659 enabled CPU even if MIPS16 is not actually being used. In other
2660 words, it makes the kernel MIPS16-tolerant.
2662 config CPU_SUPPORTS_MSA
2665 config ARCH_FLATMEM_ENABLE
2667 depends on !NUMA && !CPU_LOONGSON2EF
2669 config ARCH_SPARSEMEM_ENABLE
2671 select SPARSEMEM_STATIC if !SGI_IP27
2675 depends on SYS_SUPPORTS_NUMA
2677 select HAVE_SETUP_PER_CPU_AREA
2678 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2680 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2681 Access). This option improves performance on systems with more
2682 than two nodes; on two node systems it is generally better to
2683 leave it disabled; on single node systems leave this option
2686 config SYS_SUPPORTS_NUMA
2690 bool "Relocatable kernel"
2691 depends on SYS_SUPPORTS_RELOCATABLE
2692 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2693 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2694 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2695 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2698 This builds a kernel image that retains relocation information
2699 so it can be loaded someplace besides the default 1MB.
2700 The relocations make the kernel binary about 15% larger,
2701 but are discarded at runtime
2703 config RELOCATION_TABLE_SIZE
2704 hex "Relocation table size"
2705 depends on RELOCATABLE
2706 range 0x0 0x01000000
2707 default "0x00200000" if CPU_LOONGSON64
2708 default "0x00100000"
2710 A table of relocation data will be appended to the kernel binary
2711 and parsed at boot to fix up the relocated kernel.
2713 This option allows the amount of space reserved for the table to be
2714 adjusted, although the default of 1Mb should be ok in most cases.
2716 The build will fail and a valid size suggested if this is too small.
2718 If unsure, leave at the default value.
2720 config RANDOMIZE_BASE
2721 bool "Randomize the address of the kernel image"
2722 depends on RELOCATABLE
2724 Randomizes the physical and virtual address at which the
2725 kernel image is loaded, as a security feature that
2726 deters exploit attempts relying on knowledge of the location
2727 of kernel internals.
2729 Entropy is generated using any coprocessor 0 registers available.
2731 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2735 config RANDOMIZE_BASE_MAX_OFFSET
2736 hex "Maximum kASLR offset" if EXPERT
2737 depends on RANDOMIZE_BASE
2738 range 0x0 0x40000000 if EVA || 64BIT
2739 range 0x0 0x08000000
2740 default "0x01000000"
2742 When kASLR is active, this provides the maximum offset that will
2743 be applied to the kernel image. It should be set according to the
2744 amount of physical RAM available in the target system minus
2745 PHYSICAL_START and must be a power of 2.
2747 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2748 EVA or 64-bit. The default is 16Mb.
2755 config HW_PERF_EVENTS
2756 bool "Enable hardware performance counter support for perf events"
2757 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2760 Enable hardware performance counter support for perf events. If
2761 disabled, perf events will use software events only.
2764 bool "Enable DMI scanning"
2765 depends on MACH_LOONGSON64
2766 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2769 Enabled scanning of DMI to identify machine quirks. Say Y
2770 here unless you have verified that your setup is not
2771 affected by entries in the DMI blacklist. Required by PNP
2775 bool "Multi-Processing support"
2776 depends on SYS_SUPPORTS_SMP
2778 This enables support for systems with more than one CPU. If you have
2779 a system with only one CPU, say N. If you have a system with more
2780 than one CPU, say Y.
2782 If you say N here, the kernel will run on uni- and multiprocessor
2783 machines, but will use only one CPU of a multiprocessor machine. If
2784 you say Y here, the kernel will run on many, but not all,
2785 uniprocessor machines. On a uniprocessor machine, the kernel
2786 will run faster if you say N here.
2788 People using multiprocessor machines who say Y here should also say
2789 Y to "Enhanced Real Time Clock Support", below.
2791 See also the SMP-HOWTO available at
2792 <https://www.tldp.org/docs.html#howto>.
2794 If you don't know what to do here, say N.
2797 bool "Support for hot-pluggable CPUs"
2798 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2800 Say Y here to allow turning CPUs off and on. CPUs can be
2801 controlled through /sys/devices/system/cpu.
2802 (Note: power management support will enable this option
2803 automatically on SMP systems. )
2804 Say N if you want to disable CPU hotplug.
2809 config SYS_SUPPORTS_MIPS_CMP
2812 config SYS_SUPPORTS_MIPS_CPS
2815 config SYS_SUPPORTS_SMP
2818 config NR_CPUS_DEFAULT_4
2821 config NR_CPUS_DEFAULT_8
2824 config NR_CPUS_DEFAULT_16
2827 config NR_CPUS_DEFAULT_32
2830 config NR_CPUS_DEFAULT_64
2834 int "Maximum number of CPUs (2-256)"
2837 default "4" if NR_CPUS_DEFAULT_4
2838 default "8" if NR_CPUS_DEFAULT_8
2839 default "16" if NR_CPUS_DEFAULT_16
2840 default "32" if NR_CPUS_DEFAULT_32
2841 default "64" if NR_CPUS_DEFAULT_64
2843 This allows you to specify the maximum number of CPUs which this
2844 kernel will support. The maximum supported value is 32 for 32-bit
2845 kernel and 64 for 64-bit kernels; the minimum value which makes
2846 sense is 1 for Qemu (useful only for kernel debugging purposes)
2847 and 2 for all others.
2849 This is purely to save memory - each supported CPU adds
2850 approximately eight kilobytes to the kernel image. For best
2851 performance should round up your number of processors to the next
2854 config MIPS_PERF_SHARED_TC_COUNTERS
2857 config MIPS_NR_CPU_NR_MAP_1024
2860 config MIPS_NR_CPU_NR_MAP
2863 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2864 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2867 # Timer Interrupt Frequency Configuration
2871 prompt "Timer frequency"
2874 Allows the configuration of the timer frequency.
2877 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2880 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2883 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2886 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2889 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2892 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2895 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2898 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2902 config SYS_SUPPORTS_24HZ
2905 config SYS_SUPPORTS_48HZ
2908 config SYS_SUPPORTS_100HZ
2911 config SYS_SUPPORTS_128HZ
2914 config SYS_SUPPORTS_250HZ
2917 config SYS_SUPPORTS_256HZ
2920 config SYS_SUPPORTS_1000HZ
2923 config SYS_SUPPORTS_1024HZ
2926 config SYS_SUPPORTS_ARBIT_HZ
2928 default y if !SYS_SUPPORTS_24HZ && \
2929 !SYS_SUPPORTS_48HZ && \
2930 !SYS_SUPPORTS_100HZ && \
2931 !SYS_SUPPORTS_128HZ && \
2932 !SYS_SUPPORTS_250HZ && \
2933 !SYS_SUPPORTS_256HZ && \
2934 !SYS_SUPPORTS_1000HZ && \
2935 !SYS_SUPPORTS_1024HZ
2941 default 100 if HZ_100
2942 default 128 if HZ_128
2943 default 250 if HZ_250
2944 default 256 if HZ_256
2945 default 1000 if HZ_1000
2946 default 1024 if HZ_1024
2949 def_bool HIGH_RES_TIMERS
2952 bool "Kexec system call"
2955 kexec is a system call that implements the ability to shutdown your
2956 current kernel, and to start another kernel. It is like a reboot
2957 but it is independent of the system firmware. And like a reboot
2958 you can start any kernel with it, not just Linux.
2960 The name comes from the similarity to the exec system call.
2962 It is an ongoing process to be certain the hardware in a machine
2963 is properly shutdown, so do not be surprised if this code does not
2964 initially work for you. As of this writing the exact hardware
2965 interface is strongly in flux, so no good recommendation can be
2969 bool "Kernel crash dumps"
2971 Generate crash dump after being started by kexec.
2972 This should be normally only set in special crash dump kernels
2973 which are loaded in the main kernel with kexec-tools into
2974 a specially reserved region and then later executed after
2975 a crash by kdump/kexec. The crash dump kernel must be compiled
2976 to a memory address not used by the main kernel or firmware using
2979 config PHYSICAL_START
2980 hex "Physical address where the kernel is loaded"
2981 default "0xffffffff84000000"
2982 depends on CRASH_DUMP
2984 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2985 If you plan to use kernel for capturing the crash dump change
2986 this value to start of the reserved region (the "X" value as
2987 specified in the "crashkernel=YM@XM" command line boot parameter
2988 passed to the panic-ed kernel).
2990 config MIPS_O32_FP64_SUPPORT
2991 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2992 depends on 32BIT || MIPS32_O32
2994 When this is enabled, the kernel will support use of 64-bit floating
2995 point registers with binaries using the O32 ABI along with the
2996 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2997 32-bit MIPS systems this support is at the cost of increasing the
2998 size and complexity of the compiled FPU emulator. Thus if you are
2999 running a MIPS32 system and know that none of your userland binaries
3000 will require 64-bit floating point, you may wish to reduce the size
3001 of your kernel & potentially improve FP emulation performance by
3004 Although binutils currently supports use of this flag the details
3005 concerning its effect upon the O32 ABI in userland are still being
3006 worked on. In order to avoid userland becoming dependent upon current
3007 behaviour before the details have been finalised, this option should
3008 be considered experimental and only enabled by those working upon
3016 select OF_EARLY_FLATTREE
3026 prompt "Kernel appended dtb support" if USE_OF
3027 default MIPS_NO_APPENDED_DTB
3029 config MIPS_NO_APPENDED_DTB
3032 Do not enable appended dtb support.
3034 config MIPS_ELF_APPENDED_DTB
3037 With this option, the boot code will look for a device tree binary
3038 DTB) included in the vmlinux ELF section .appended_dtb. By default
3039 it is empty and the DTB can be appended using binutils command
3042 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3044 This is meant as a backward compatibility convenience for those
3045 systems with a bootloader that can't be upgraded to accommodate
3046 the documented boot protocol using a device tree.
3048 config MIPS_RAW_APPENDED_DTB
3049 bool "vmlinux.bin or vmlinuz.bin"
3051 With this option, the boot code will look for a device tree binary
3052 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3053 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3055 This is meant as a backward compatibility convenience for those
3056 systems with a bootloader that can't be upgraded to accommodate
3057 the documented boot protocol using a device tree.
3059 Beware that there is very little in terms of protection against
3060 this option being confused by leftover garbage in memory that might
3061 look like a DTB header after a reboot if no actual DTB is appended
3062 to vmlinux.bin. Do not leave this option active in a production kernel
3063 if you don't intend to always append a DTB.
3067 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3068 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3069 !MACH_LOONGSON64 && !MIPS_MALTA && \
3071 default MIPS_CMDLINE_FROM_BOOTLOADER
3073 config MIPS_CMDLINE_FROM_DTB
3075 bool "Dtb kernel arguments if available"
3077 config MIPS_CMDLINE_DTB_EXTEND
3079 bool "Extend dtb kernel arguments with bootloader arguments"
3081 config MIPS_CMDLINE_FROM_BOOTLOADER
3082 bool "Bootloader kernel arguments if available"
3084 config MIPS_CMDLINE_BUILTIN_EXTEND
3085 depends on CMDLINE_BOOL
3086 bool "Extend builtin kernel arguments with bootloader arguments"
3091 config LOCKDEP_SUPPORT
3095 config STACKTRACE_SUPPORT
3099 config PGTABLE_LEVELS
3101 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3102 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3105 config MIPS_AUTO_PFN_OFFSET
3108 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3110 config PCI_DRIVERS_GENERIC
3111 select PCI_DOMAINS_GENERIC if PCI
3114 config PCI_DRIVERS_LEGACY
3115 def_bool !PCI_DRIVERS_GENERIC
3116 select NO_GENERIC_PCI_IOPORT_MAP
3117 select PCI_DOMAINS if PCI
3120 # ISA support is now enabled via select. Too many systems still have the one
3121 # or other ISA chip on the board that users don't know about so don't expect
3122 # users to choose the right thing ...
3128 bool "TURBOchannel support"
3129 depends on MACH_DECSTATION
3131 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3132 processors. TURBOchannel programming specifications are available
3134 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3136 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3137 Linux driver support status is documented at:
3138 <http://www.linux-mips.org/wiki/DECstation>
3144 config ARCH_MMAP_RND_BITS_MIN
3148 config ARCH_MMAP_RND_BITS_MAX
3152 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3155 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3162 select MIPS_EXTERNAL_TIMER
3168 config MIPS32_COMPAT
3174 config SYSVIPC_COMPAT
3178 bool "Kernel support for o32 binaries"
3180 select ARCH_WANT_OLD_COMPAT_IPC
3182 select MIPS32_COMPAT
3183 select SYSVIPC_COMPAT if SYSVIPC
3185 Select this option if you want to run o32 binaries. These are pure
3186 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3187 existing binaries are in this format.
3192 bool "Kernel support for n32 binaries"
3194 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3196 select MIPS32_COMPAT
3197 select SYSVIPC_COMPAT if SYSVIPC
3199 Select this option if you want to run n32 binaries. These are
3200 64-bit binaries using 32-bit quantities for addressing and certain
3201 data that would normally be 64-bit. They are used in special
3206 menu "Power management options"
3208 config ARCH_HIBERNATION_POSSIBLE
3210 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3212 config ARCH_SUSPEND_POSSIBLE
3214 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3216 source "kernel/power/Kconfig"
3220 config MIPS_EXTERNAL_TIMER
3223 menu "CPU Power Management"
3225 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3226 source "drivers/cpufreq/Kconfig"
3229 source "drivers/cpuidle/Kconfig"
3233 source "arch/mips/kvm/Kconfig"
3235 source "arch/mips/vdso/Kconfig"