1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_STRNCPY_FROM_USER
13 select ARCH_HAS_STRNLEN_USER
14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15 select ARCH_HAS_UBSAN_SANITIZE_ALL
16 select ARCH_HAS_GCOV_PROFILE_ALL
17 select ARCH_KEEP_MEMBLOCK
18 select ARCH_SUPPORTS_UPROBES
19 select ARCH_USE_BUILTIN_BSWAP
20 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
21 select ARCH_USE_MEMTEST
22 select ARCH_USE_QUEUED_RWLOCKS
23 select ARCH_USE_QUEUED_SPINLOCKS
24 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
25 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
26 select ARCH_WANT_IPC_PARSE_VERSION
27 select ARCH_WANT_LD_ORPHAN_WARN
28 select BUILDTIME_TABLE_SORT
29 select CLONE_BACKWARDS
30 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
31 select CPU_PM if CPU_IDLE
32 select GENERIC_ATOMIC64 if !64BIT
33 select GENERIC_CMOS_UPDATE
34 select GENERIC_CPU_AUTOPROBE
35 select GENERIC_GETTIMEOFDAY
37 select GENERIC_IRQ_PROBE
38 select GENERIC_IRQ_SHOW
39 select GENERIC_ISA_DMA if EISA
40 select GENERIC_LIB_ASHLDI3
41 select GENERIC_LIB_ASHRDI3
42 select GENERIC_LIB_CMPDI2
43 select GENERIC_LIB_LSHRDI3
44 select GENERIC_LIB_UCMPDI2
45 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
46 select GENERIC_SMP_IDLE_THREAD
47 select GENERIC_TIME_VSYSCALL
48 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
49 select HAVE_ARCH_COMPILER_H
50 select HAVE_ARCH_JUMP_LABEL
51 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
52 select HAVE_ARCH_MMAP_RND_BITS if MMU
53 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
54 select HAVE_ARCH_SECCOMP_FILTER
55 select HAVE_ARCH_TRACEHOOK
56 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
57 select HAVE_ASM_MODVERSIONS
58 select HAVE_CONTEXT_TRACKING
60 select HAVE_C_RECORDMCOUNT
61 select HAVE_DEBUG_KMEMLEAK
62 select HAVE_DEBUG_STACKOVERFLOW
63 select HAVE_DMA_CONTIGUOUS
64 select HAVE_DYNAMIC_FTRACE
65 select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
66 !CPU_DADDI_WORKAROUNDS && \
67 !CPU_R4000_WORKAROUNDS && \
68 !CPU_R4400_WORKAROUNDS
69 select HAVE_EXIT_THREAD
71 select HAVE_FTRACE_MCOUNT_RECORD
72 select HAVE_FUNCTION_GRAPH_TRACER
73 select HAVE_FUNCTION_TRACER
74 select HAVE_GCC_PLUGINS
75 select HAVE_GENERIC_VDSO
76 select HAVE_IOREMAP_PROT
77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
78 select HAVE_IRQ_TIME_ACCOUNTING
80 select HAVE_KRETPROBES
81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
82 select HAVE_MOD_ARCH_SPECIFIC
84 select HAVE_PERF_EVENTS
86 select HAVE_PERF_USER_STACK_DUMP
87 select HAVE_REGS_AND_STACK_ACCESS_API
89 select HAVE_SPARSE_SYSCALL_NR
90 select HAVE_STACKPROTECTOR
91 select HAVE_SYSCALL_TRACEPOINTS
92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
93 select IRQ_FORCED_THREADING
95 select MODULES_USE_ELF_REL if MODULES
96 select MODULES_USE_ELF_RELA if MODULES && 64BIT
97 select PERF_USE_VMALLOC
98 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100 select SYSCTL_EXCEPTION_TRACE
101 select TRACE_IRQFLAGS_SUPPORT
103 select ARCH_HAS_ELFCORE_COMPAT
105 config MIPS_FIXUP_BIGPHYS_ADDR
113 select SYS_SUPPORTS_32BIT_KERNEL
114 select SYS_SUPPORTS_LITTLE_ENDIAN
115 select SYS_SUPPORTS_ZBOOT
116 select DMA_NONCOHERENT
117 select ARCH_HAS_SYNC_DMA_FOR_CPU
122 select GENERIC_IRQ_CHIP
123 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
125 select CPU_SUPPORTS_CPUFREQ
126 select MIPS_EXTERNAL_TIMER
128 menu "Machine selection"
132 default MIPS_GENERIC_KERNEL
134 config MIPS_GENERIC_KERNEL
135 bool "Generic board-agnostic MIPS kernel"
136 select ARCH_HAS_SETUP_DMA_OPS
141 select CLKSRC_MIPS_GIC
143 select CPU_MIPSR2_IRQ_EI
144 select CPU_MIPSR2_IRQ_VI
146 select DMA_NONCOHERENT
149 select MIPS_AUTO_PFN_OFFSET
150 select MIPS_CPU_SCACHE
152 select MIPS_L1_CACHE_SHIFT_7
153 select NO_EXCEPT_FILL
154 select PCI_DRIVERS_GENERIC
157 select SYS_HAS_CPU_MIPS32_R1
158 select SYS_HAS_CPU_MIPS32_R2
159 select SYS_HAS_CPU_MIPS32_R6
160 select SYS_HAS_CPU_MIPS64_R1
161 select SYS_HAS_CPU_MIPS64_R2
162 select SYS_HAS_CPU_MIPS64_R6
163 select SYS_SUPPORTS_32BIT_KERNEL
164 select SYS_SUPPORTS_64BIT_KERNEL
165 select SYS_SUPPORTS_BIG_ENDIAN
166 select SYS_SUPPORTS_HIGHMEM
167 select SYS_SUPPORTS_LITTLE_ENDIAN
168 select SYS_SUPPORTS_MICROMIPS
169 select SYS_SUPPORTS_MIPS16
170 select SYS_SUPPORTS_MIPS_CPS
171 select SYS_SUPPORTS_MULTITHREADING
172 select SYS_SUPPORTS_RELOCATABLE
173 select SYS_SUPPORTS_SMARTMIPS
174 select SYS_SUPPORTS_ZBOOT
176 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
177 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
178 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
179 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
180 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
181 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
184 Select this to build a kernel which aims to support multiple boards,
185 generally using a flattened device tree passed from the bootloader
186 using the boot protocol defined in the UHI (Unified Hosting
187 Interface) specification.
190 bool "Alchemy processor based machines"
191 select PHYS_ADDR_T_64BIT
195 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
196 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
197 select SYS_HAS_CPU_MIPS32_R1
198 select SYS_SUPPORTS_32BIT_KERNEL
199 select SYS_SUPPORTS_APM_EMULATION
201 select SYS_SUPPORTS_ZBOOT
205 bool "Texas Instruments AR7"
208 select DMA_NONCOHERENT
212 select NO_EXCEPT_FILL
214 select SYS_HAS_CPU_MIPS32_R1
215 select SYS_HAS_EARLY_PRINTK
216 select SYS_SUPPORTS_32BIT_KERNEL
217 select SYS_SUPPORTS_LITTLE_ENDIAN
218 select SYS_SUPPORTS_MIPS16
219 select SYS_SUPPORTS_ZBOOT_UART16550
223 Support for the Texas Instruments AR7 System-on-a-Chip
224 family: TNETD7100, 7200 and 7300.
227 bool "Atheros AR231x/AR531x SoC support"
230 select DMA_NONCOHERENT
233 select SYS_HAS_CPU_MIPS32_R1
234 select SYS_SUPPORTS_BIG_ENDIAN
235 select SYS_SUPPORTS_32BIT_KERNEL
236 select SYS_HAS_EARLY_PRINTK
238 Support for Atheros AR231x and Atheros AR531x based boards
241 bool "Atheros AR71XX/AR724X/AR913X based boards"
242 select ARCH_HAS_RESET_CONTROLLER
246 select DMA_NONCOHERENT
251 select SYS_HAS_CPU_MIPS32_R2
252 select SYS_HAS_EARLY_PRINTK
253 select SYS_SUPPORTS_32BIT_KERNEL
254 select SYS_SUPPORTS_BIG_ENDIAN
255 select SYS_SUPPORTS_MIPS16
256 select SYS_SUPPORTS_ZBOOT_UART_PROM
258 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
260 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
263 bool "Broadcom Generic BMIPS kernel"
264 select ARCH_HAS_RESET_CONTROLLER
265 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
267 select NO_EXCEPT_FILL
273 select BCM6345_L1_IRQ
274 select BCM7038_L1_IRQ
275 select BCM7120_L2_IRQ
276 select BRCMSTB_L2_IRQ
278 select DMA_NONCOHERENT
279 select SYS_SUPPORTS_32BIT_KERNEL
280 select SYS_SUPPORTS_LITTLE_ENDIAN
281 select SYS_SUPPORTS_BIG_ENDIAN
282 select SYS_SUPPORTS_HIGHMEM
283 select SYS_HAS_CPU_BMIPS32_3300
284 select SYS_HAS_CPU_BMIPS4350
285 select SYS_HAS_CPU_BMIPS4380
286 select SYS_HAS_CPU_BMIPS5000
288 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
289 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
290 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
291 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
292 select HARDIRQS_SW_RESEND
294 select PCI_DRIVERS_GENERIC
296 Build a generic DT-based kernel image that boots on select
297 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
298 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
299 must be set appropriately for your board.
302 bool "Broadcom BCM47XX based boards"
306 select DMA_NONCOHERENT
309 select SYS_HAS_CPU_MIPS32_R1
310 select NO_EXCEPT_FILL
311 select SYS_SUPPORTS_32BIT_KERNEL
312 select SYS_SUPPORTS_LITTLE_ENDIAN
313 select SYS_SUPPORTS_MIPS16
314 select SYS_SUPPORTS_ZBOOT
315 select SYS_HAS_EARLY_PRINTK
316 select USE_GENERIC_EARLY_PRINTK_8250
318 select LEDS_GPIO_REGISTER
321 select BCM47XX_SSB if !BCM47XX_BCMA
323 Support for BCM47XX based boards
326 bool "Broadcom BCM63XX based boards"
331 select DMA_NONCOHERENT
333 select SYS_SUPPORTS_32BIT_KERNEL
334 select SYS_SUPPORTS_BIG_ENDIAN
335 select SYS_HAS_EARLY_PRINTK
336 select SYS_HAS_CPU_BMIPS32_3300
337 select SYS_HAS_CPU_BMIPS4350
338 select SYS_HAS_CPU_BMIPS4380
341 select MIPS_L1_CACHE_SHIFT_4
342 select HAVE_LEGACY_CLK
344 Support for BCM63XX based boards
351 select DMA_NONCOHERENT
357 select PCI_GT64XXX_PCI0
358 select SYS_HAS_CPU_NEVADA
359 select SYS_HAS_EARLY_PRINTK
360 select SYS_SUPPORTS_32BIT_KERNEL
361 select SYS_SUPPORTS_64BIT_KERNEL
362 select SYS_SUPPORTS_LITTLE_ENDIAN
363 select USE_GENERIC_EARLY_PRINTK_8250
365 config MACH_DECSTATION
369 select CEVT_R4K if CPU_R4X00
371 select CSRC_R4K if CPU_R4X00
372 select CPU_DADDI_WORKAROUNDS if 64BIT
373 select CPU_R4000_WORKAROUNDS if 64BIT
374 select CPU_R4400_WORKAROUNDS if 64BIT
375 select DMA_NONCOHERENT
378 select SYS_HAS_CPU_R3000
379 select SYS_HAS_CPU_R4X00
380 select SYS_SUPPORTS_32BIT_KERNEL
381 select SYS_SUPPORTS_64BIT_KERNEL
382 select SYS_SUPPORTS_LITTLE_ENDIAN
383 select SYS_SUPPORTS_128HZ
384 select SYS_SUPPORTS_256HZ
385 select SYS_SUPPORTS_1024HZ
386 select MIPS_L1_CACHE_SHIFT_4
388 This enables support for DEC's MIPS based workstations. For details
389 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
390 DECstation porting pages on <http://decstation.unix-ag.org/>.
392 If you have one of the following DECstation Models you definitely
393 want to choose R4xx0 for the CPU Type:
400 otherwise choose R3000.
403 bool "Jazz family of machines"
406 select ARCH_MIGHT_HAVE_PC_PARPORT
407 select ARCH_MIGHT_HAVE_PC_SERIO
411 select ARCH_MAY_HAVE_PC_FDC
414 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
415 select GENERIC_ISA_DMA
416 select HAVE_PCSPKR_PLATFORM
421 select SYS_HAS_CPU_R4X00
422 select SYS_SUPPORTS_32BIT_KERNEL
423 select SYS_SUPPORTS_64BIT_KERNEL
424 select SYS_SUPPORTS_100HZ
425 select SYS_SUPPORTS_LITTLE_ENDIAN
427 This a family of machines based on the MIPS R4030 chipset which was
428 used by several vendors to build RISC/os and Windows NT workstations.
429 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
430 Olivetti M700-10 workstations.
432 config MACH_INGENIC_SOC
433 bool "Ingenic SoC based machines"
436 select SYS_SUPPORTS_ZBOOT_UART16550
437 select CPU_SUPPORTS_CPUFREQ
438 select MIPS_EXTERNAL_TIMER
441 bool "Lantiq based platforms"
442 select DMA_NONCOHERENT
446 select SYS_HAS_CPU_MIPS32_R1
447 select SYS_HAS_CPU_MIPS32_R2
448 select SYS_SUPPORTS_BIG_ENDIAN
449 select SYS_SUPPORTS_32BIT_KERNEL
450 select SYS_SUPPORTS_MIPS16
451 select SYS_SUPPORTS_MULTITHREADING
452 select SYS_SUPPORTS_VPE_LOADER
453 select SYS_HAS_EARLY_PRINTK
457 select HAVE_LEGACY_CLK
460 select PINCTRL_LANTIQ
461 select ARCH_HAS_RESET_CONTROLLER
462 select RESET_CONTROLLER
464 config MACH_LOONGSON32
465 bool "Loongson 32-bit family of machines"
466 select SYS_SUPPORTS_ZBOOT
468 This enables support for the Loongson-1 family of machines.
470 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
471 the Institute of Computing Technology (ICT), Chinese Academy of
474 config MACH_LOONGSON2EF
475 bool "Loongson-2E/F family of machines"
476 select SYS_SUPPORTS_ZBOOT
478 This enables the support of early Loongson-2E/F family of machines.
480 config MACH_LOONGSON64
481 bool "Loongson 64-bit family of machines"
482 select ARCH_SPARSEMEM_ENABLE
483 select ARCH_MIGHT_HAVE_PC_PARPORT
484 select ARCH_MIGHT_HAVE_PC_SERIO
485 select GENERIC_ISA_DMA_SUPPORT_BROKEN
495 select NO_EXCEPT_FILL
496 select NR_CPUS_DEFAULT_64
497 select USE_GENERIC_EARLY_PRINTK_8250
498 select PCI_DRIVERS_GENERIC
499 select SYS_HAS_CPU_LOONGSON64
500 select SYS_HAS_EARLY_PRINTK
501 select SYS_SUPPORTS_SMP
502 select SYS_SUPPORTS_HOTPLUG_CPU
503 select SYS_SUPPORTS_NUMA
504 select SYS_SUPPORTS_64BIT_KERNEL
505 select SYS_SUPPORTS_HIGHMEM
506 select SYS_SUPPORTS_LITTLE_ENDIAN
507 select SYS_SUPPORTS_ZBOOT
508 select SYS_SUPPORTS_RELOCATABLE
513 select PCI_HOST_GENERIC
515 This enables the support of Loongson-2/3 family of machines.
517 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
518 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
519 and Loongson-2F which will be removed), developed by the Institute
520 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
523 bool "MIPS Malta board"
524 select ARCH_MAY_HAVE_PC_FDC
525 select ARCH_MIGHT_HAVE_PC_PARPORT
526 select ARCH_MIGHT_HAVE_PC_SERIO
531 select CLKSRC_MIPS_GIC
534 select DMA_NONCOHERENT
535 select GENERIC_ISA_DMA
536 select HAVE_PCSPKR_PLATFORM
542 select MIPS_CPU_SCACHE
544 select MIPS_L1_CACHE_SHIFT_6
546 select PCI_GT64XXX_PCI0
549 select SYS_HAS_CPU_MIPS32_R1
550 select SYS_HAS_CPU_MIPS32_R2
551 select SYS_HAS_CPU_MIPS32_R3_5
552 select SYS_HAS_CPU_MIPS32_R5
553 select SYS_HAS_CPU_MIPS32_R6
554 select SYS_HAS_CPU_MIPS64_R1
555 select SYS_HAS_CPU_MIPS64_R2
556 select SYS_HAS_CPU_MIPS64_R6
557 select SYS_HAS_CPU_NEVADA
558 select SYS_HAS_CPU_RM7000
559 select SYS_SUPPORTS_32BIT_KERNEL
560 select SYS_SUPPORTS_64BIT_KERNEL
561 select SYS_SUPPORTS_BIG_ENDIAN
562 select SYS_SUPPORTS_HIGHMEM
563 select SYS_SUPPORTS_LITTLE_ENDIAN
564 select SYS_SUPPORTS_MICROMIPS
565 select SYS_SUPPORTS_MIPS16
566 select SYS_SUPPORTS_MIPS_CMP
567 select SYS_SUPPORTS_MIPS_CPS
568 select SYS_SUPPORTS_MULTITHREADING
569 select SYS_SUPPORTS_RELOCATABLE
570 select SYS_SUPPORTS_SMARTMIPS
571 select SYS_SUPPORTS_VPE_LOADER
572 select SYS_SUPPORTS_ZBOOT
574 select WAR_ICACHE_REFILLS
575 select ZONE_DMA32 if 64BIT
577 This enables support for the MIPS Technologies Malta evaluation
581 bool "Microchip PIC32 Family"
583 This enables support for the Microchip PIC32 family of platforms.
585 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
589 bool "NEC VR4100 series based machines"
592 select SYS_HAS_CPU_VR41XX
593 select SYS_SUPPORTS_MIPS16
596 config MACH_NINTENDO64
597 bool "Nintendo 64 console"
600 select SYS_HAS_CPU_R4300
601 select SYS_SUPPORTS_BIG_ENDIAN
602 select SYS_SUPPORTS_ZBOOT
603 select SYS_SUPPORTS_32BIT_KERNEL
604 select SYS_SUPPORTS_64BIT_KERNEL
605 select DMA_NONCOHERENT
609 bool "Ralink based machines"
614 select DMA_NONCOHERENT
617 select SYS_HAS_CPU_MIPS32_R1
618 select SYS_HAS_CPU_MIPS32_R2
619 select SYS_SUPPORTS_32BIT_KERNEL
620 select SYS_SUPPORTS_LITTLE_ENDIAN
621 select SYS_SUPPORTS_MIPS16
622 select SYS_SUPPORTS_ZBOOT
623 select SYS_HAS_EARLY_PRINTK
624 select ARCH_HAS_RESET_CONTROLLER
625 select RESET_CONTROLLER
627 config MACH_REALTEK_RTL
628 bool "Realtek RTL838x/RTL839x based machines"
630 select DMA_NONCOHERENT
634 select SYS_HAS_CPU_MIPS32_R1
635 select SYS_HAS_CPU_MIPS32_R2
636 select SYS_SUPPORTS_BIG_ENDIAN
637 select SYS_SUPPORTS_32BIT_KERNEL
638 select SYS_SUPPORTS_MIPS16
639 select SYS_SUPPORTS_MULTITHREADING
640 select SYS_SUPPORTS_VPE_LOADER
646 bool "SGI IP22 (Indy/Indigo2)"
651 select ARCH_MIGHT_HAVE_PC_SERIO
655 select DEFAULT_SGI_PARTITION
656 select DMA_NONCOHERENT
660 select IP22_CPU_SCACHE
662 select GENERIC_ISA_DMA_SUPPORT_BROKEN
664 select SGI_HAS_INDYDOG
670 select SYS_HAS_CPU_R4X00
671 select SYS_HAS_CPU_R5000
672 select SYS_HAS_EARLY_PRINTK
673 select SYS_SUPPORTS_32BIT_KERNEL
674 select SYS_SUPPORTS_64BIT_KERNEL
675 select SYS_SUPPORTS_BIG_ENDIAN
676 select WAR_R4600_V1_INDEX_ICACHEOP
677 select WAR_R4600_V1_HIT_CACHEOP
678 select WAR_R4600_V2_HIT_CACHEOP
679 select MIPS_L1_CACHE_SHIFT_7
681 This are the SGI Indy, Challenge S and Indigo2, as well as certain
682 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
683 that runs on these, say Y here.
686 bool "SGI IP27 (Origin200/2000)"
687 select ARCH_HAS_PHYS_TO_DMA
688 select ARCH_SPARSEMEM_ENABLE
691 select ARC_CMDLINE_ONLY
693 select DEFAULT_SGI_PARTITION
695 select SYS_HAS_EARLY_PRINTK
698 select IRQ_DOMAIN_HIERARCHY
699 select NR_CPUS_DEFAULT_64
700 select PCI_DRIVERS_GENERIC
701 select PCI_XTALK_BRIDGE
702 select SYS_HAS_CPU_R10000
703 select SYS_SUPPORTS_64BIT_KERNEL
704 select SYS_SUPPORTS_BIG_ENDIAN
705 select SYS_SUPPORTS_NUMA
706 select SYS_SUPPORTS_SMP
707 select WAR_R10000_LLSC
708 select MIPS_L1_CACHE_SHIFT_7
711 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
712 workstations. To compile a Linux kernel that runs on these, say Y
716 bool "SGI IP28 (Indigo2 R10k)"
721 select ARCH_MIGHT_HAVE_PC_SERIO
725 select DEFAULT_SGI_PARTITION
726 select DMA_NONCOHERENT
727 select GENERIC_ISA_DMA_SUPPORT_BROKEN
733 select SGI_HAS_INDYDOG
739 select SYS_HAS_CPU_R10000
740 select SYS_HAS_EARLY_PRINTK
741 select SYS_SUPPORTS_64BIT_KERNEL
742 select SYS_SUPPORTS_BIG_ENDIAN
743 select WAR_R10000_LLSC
744 select MIPS_L1_CACHE_SHIFT_7
746 This is the SGI Indigo2 with R10000 processor. To compile a Linux
747 kernel that runs on these, say Y here.
750 bool "SGI IP30 (Octane/Octane2)"
751 select ARCH_HAS_PHYS_TO_DMA
758 select SYNC_R4K if SMP
762 select IRQ_DOMAIN_HIERARCHY
763 select PCI_DRIVERS_GENERIC
764 select PCI_XTALK_BRIDGE
765 select SYS_HAS_EARLY_PRINTK
766 select SYS_HAS_CPU_R10000
767 select SYS_SUPPORTS_64BIT_KERNEL
768 select SYS_SUPPORTS_BIG_ENDIAN
769 select SYS_SUPPORTS_SMP
770 select WAR_R10000_LLSC
771 select MIPS_L1_CACHE_SHIFT_7
774 These are the SGI Octane and Octane2 graphics workstations. To
775 compile a Linux kernel that runs on these, say Y here.
781 select ARCH_HAS_PHYS_TO_DMA
787 select DMA_NONCOHERENT
790 select R5000_CPU_SCACHE
791 select RM7000_CPU_SCACHE
792 select SYS_HAS_CPU_R5000
793 select SYS_HAS_CPU_R10000 if BROKEN
794 select SYS_HAS_CPU_RM7000
795 select SYS_HAS_CPU_NEVADA
796 select SYS_SUPPORTS_64BIT_KERNEL
797 select SYS_SUPPORTS_BIG_ENDIAN
798 select WAR_ICACHE_REFILLS
800 If you want this kernel to run on SGI O2 workstation, say Y here.
803 bool "Sibyte BCM91120C-CRhine"
805 select SIBYTE_BCM1120
807 select SYS_HAS_CPU_SB1
808 select SYS_SUPPORTS_BIG_ENDIAN
809 select SYS_SUPPORTS_LITTLE_ENDIAN
812 bool "Sibyte BCM91120x-Carmel"
814 select SIBYTE_BCM1120
816 select SYS_HAS_CPU_SB1
817 select SYS_SUPPORTS_BIG_ENDIAN
818 select SYS_SUPPORTS_LITTLE_ENDIAN
821 bool "Sibyte BCM91125C-CRhone"
823 select SIBYTE_BCM1125
825 select SYS_HAS_CPU_SB1
826 select SYS_SUPPORTS_BIG_ENDIAN
827 select SYS_SUPPORTS_HIGHMEM
828 select SYS_SUPPORTS_LITTLE_ENDIAN
831 bool "Sibyte BCM91125E-Rhone"
833 select SIBYTE_BCM1125H
835 select SYS_HAS_CPU_SB1
836 select SYS_SUPPORTS_BIG_ENDIAN
837 select SYS_SUPPORTS_LITTLE_ENDIAN
840 bool "Sibyte BCM91250A-SWARM"
842 select HAVE_PATA_PLATFORM
845 select SYS_HAS_CPU_SB1
846 select SYS_SUPPORTS_BIG_ENDIAN
847 select SYS_SUPPORTS_HIGHMEM
848 select SYS_SUPPORTS_LITTLE_ENDIAN
849 select ZONE_DMA32 if 64BIT
850 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
852 config SIBYTE_LITTLESUR
853 bool "Sibyte BCM91250C2-LittleSur"
855 select HAVE_PATA_PLATFORM
858 select SYS_HAS_CPU_SB1
859 select SYS_SUPPORTS_BIG_ENDIAN
860 select SYS_SUPPORTS_HIGHMEM
861 select SYS_SUPPORTS_LITTLE_ENDIAN
862 select ZONE_DMA32 if 64BIT
864 config SIBYTE_SENTOSA
865 bool "Sibyte BCM91250E-Sentosa"
869 select SYS_HAS_CPU_SB1
870 select SYS_SUPPORTS_BIG_ENDIAN
871 select SYS_SUPPORTS_LITTLE_ENDIAN
872 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
875 bool "Sibyte BCM91480B-BigSur"
877 select NR_CPUS_DEFAULT_4
878 select SIBYTE_BCM1x80
880 select SYS_HAS_CPU_SB1
881 select SYS_SUPPORTS_BIG_ENDIAN
882 select SYS_SUPPORTS_HIGHMEM
883 select SYS_SUPPORTS_LITTLE_ENDIAN
884 select ZONE_DMA32 if 64BIT
885 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
888 bool "SNI RM200/300/400"
891 select FW_ARC if CPU_LITTLE_ENDIAN
892 select FW_ARC32 if CPU_LITTLE_ENDIAN
893 select FW_SNIPROM if CPU_BIG_ENDIAN
894 select ARCH_MAY_HAVE_PC_FDC
895 select ARCH_MIGHT_HAVE_PC_PARPORT
896 select ARCH_MIGHT_HAVE_PC_SERIO
900 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
901 select DMA_NONCOHERENT
902 select GENERIC_ISA_DMA
904 select HAVE_PCSPKR_PLATFORM
910 select MIPS_L1_CACHE_SHIFT_6
911 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
912 select SYS_HAS_CPU_R4X00
913 select SYS_HAS_CPU_R5000
914 select SYS_HAS_CPU_R10000
915 select R5000_CPU_SCACHE
916 select SYS_HAS_EARLY_PRINTK
917 select SYS_SUPPORTS_32BIT_KERNEL
918 select SYS_SUPPORTS_64BIT_KERNEL
919 select SYS_SUPPORTS_BIG_ENDIAN
920 select SYS_SUPPORTS_HIGHMEM
921 select SYS_SUPPORTS_LITTLE_ENDIAN
922 select WAR_R4600_V2_HIT_CACHEOP
924 The SNI RM200/300/400 are MIPS-based machines manufactured by
925 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
926 Technology and now in turn merged with Fujitsu. Say Y here to
927 support this machine type.
930 bool "Toshiba TX39 series based machines"
933 bool "Toshiba TX49 series based machines"
934 select WAR_TX49XX_ICACHE_INDEX_INV
936 config MIKROTIK_RB532
937 bool "Mikrotik RB532 boards"
940 select DMA_NONCOHERENT
943 select SYS_HAS_CPU_MIPS32_R1
944 select SYS_SUPPORTS_32BIT_KERNEL
945 select SYS_SUPPORTS_LITTLE_ENDIAN
949 select MIPS_L1_CACHE_SHIFT_4
951 Support the Mikrotik(tm) RouterBoard 532 series,
952 based on the IDT RC32434 SoC.
954 config CAVIUM_OCTEON_SOC
955 bool "Cavium Networks Octeon SoC based boards"
957 select ARCH_HAS_PHYS_TO_DMA
959 select PHYS_ADDR_T_64BIT
960 select SYS_SUPPORTS_64BIT_KERNEL
961 select SYS_SUPPORTS_BIG_ENDIAN
963 select EDAC_ATOMIC_SCRUB
964 select SYS_SUPPORTS_LITTLE_ENDIAN
965 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
966 select SYS_HAS_EARLY_PRINTK
967 select SYS_HAS_CPU_CAVIUM_OCTEON
969 select HAVE_PLAT_DELAY
970 select HAVE_PLAT_FW_INIT_CMDLINE
971 select HAVE_PLAT_MEMCPY
975 select ARCH_SPARSEMEM_ENABLE
976 select SYS_SUPPORTS_SMP
977 select NR_CPUS_DEFAULT_64
978 select MIPS_NR_CPU_NR_MAP_1024
981 select MTD_COMPLEX_MAPPINGS
983 select SYS_SUPPORTS_RELOCATABLE
985 This option supports all of the Octeon reference boards from Cavium
986 Networks. It builds a kernel that dynamically determines the Octeon
987 CPU type and supports all known board reference implementations.
988 Some of the supported boards are:
995 Say Y here for most Octeon reference boards.
999 source "arch/mips/alchemy/Kconfig"
1000 source "arch/mips/ath25/Kconfig"
1001 source "arch/mips/ath79/Kconfig"
1002 source "arch/mips/bcm47xx/Kconfig"
1003 source "arch/mips/bcm63xx/Kconfig"
1004 source "arch/mips/bmips/Kconfig"
1005 source "arch/mips/generic/Kconfig"
1006 source "arch/mips/ingenic/Kconfig"
1007 source "arch/mips/jazz/Kconfig"
1008 source "arch/mips/lantiq/Kconfig"
1009 source "arch/mips/pic32/Kconfig"
1010 source "arch/mips/ralink/Kconfig"
1011 source "arch/mips/sgi-ip27/Kconfig"
1012 source "arch/mips/sibyte/Kconfig"
1013 source "arch/mips/txx9/Kconfig"
1014 source "arch/mips/vr41xx/Kconfig"
1015 source "arch/mips/cavium-octeon/Kconfig"
1016 source "arch/mips/loongson2ef/Kconfig"
1017 source "arch/mips/loongson32/Kconfig"
1018 source "arch/mips/loongson64/Kconfig"
1022 config GENERIC_HWEIGHT
1026 config GENERIC_CALIBRATE_DELAY
1030 config SCHED_OMIT_FRAME_POINTER
1035 # Select some configuration options automatically based on user selections.
1040 config ARCH_MAY_HAVE_PC_FDC
1071 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1077 config MIPS_CLOCK_VSYSCALL
1078 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1087 config ARCH_SUPPORTS_UPROBES
1090 config DMA_PERDEV_COHERENT
1092 select ARCH_HAS_SETUP_DMA_OPS
1093 select DMA_NONCOHERENT
1095 config DMA_NONCOHERENT
1098 # MIPS allows mixing "slightly different" Cacheability and Coherency
1099 # Attribute bits. It is believed that the uncached access through
1100 # KSEG1 and the implementation specific "uncached accelerated" used
1101 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1102 # significant advantages.
1104 select ARCH_HAS_DMA_WRITE_COMBINE
1105 select ARCH_HAS_DMA_PREP_COHERENT
1106 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1107 select ARCH_HAS_DMA_SET_UNCACHED
1108 select DMA_NONCOHERENT_MMAP
1109 select NEED_DMA_MAP_STATE
1111 config SYS_HAS_EARLY_PRINTK
1114 config SYS_SUPPORTS_HOTPLUG_CPU
1117 config MIPS_BONITO64
1126 config NO_IOPORT_MAP
1130 def_bool CPU_NO_LOAD_STORE_LR
1132 config GENERIC_ISA_DMA
1134 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1137 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1139 select GENERIC_ISA_DMA
1141 config HAVE_PLAT_DELAY
1144 config HAVE_PLAT_FW_INIT_CMDLINE
1147 config HAVE_PLAT_MEMCPY
1153 config SYS_SUPPORTS_RELOCATABLE
1156 Selected if the platform supports relocating the kernel.
1157 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1158 to allow access to command line and entropy sources.
1161 # Endianness selection. Sufficiently obscure so many users don't know what to
1162 # answer,so we try hard to limit the available choices. Also the use of a
1163 # choice statement should be more obvious to the user.
1166 prompt "Endianness selection"
1168 Some MIPS machines can be configured for either little or big endian
1169 byte order. These modes require different kernels and a different
1170 Linux distribution. In general there is one preferred byteorder for a
1171 particular system but some systems are just as commonly used in the
1172 one or the other endianness.
1174 config CPU_BIG_ENDIAN
1176 depends on SYS_SUPPORTS_BIG_ENDIAN
1178 config CPU_LITTLE_ENDIAN
1179 bool "Little endian"
1180 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1187 config SYS_SUPPORTS_APM_EMULATION
1190 config SYS_SUPPORTS_BIG_ENDIAN
1193 config SYS_SUPPORTS_LITTLE_ENDIAN
1196 config MIPS_HUGE_TLB_SUPPORT
1197 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1211 config PCI_GT64XXX_PCI0
1214 config PCI_XTALK_BRIDGE
1217 config NO_EXCEPT_FILL
1223 config SWAP_IO_SPACE
1226 config SGI_HAS_INDYDOG
1238 config SGI_HAS_ZILOG
1241 config SGI_HAS_I8042
1244 config DEFAULT_SGI_PARTITION
1256 config MIPS_L1_CACHE_SHIFT_4
1259 config MIPS_L1_CACHE_SHIFT_5
1262 config MIPS_L1_CACHE_SHIFT_6
1265 config MIPS_L1_CACHE_SHIFT_7
1268 config MIPS_L1_CACHE_SHIFT
1270 default "7" if MIPS_L1_CACHE_SHIFT_7
1271 default "6" if MIPS_L1_CACHE_SHIFT_6
1272 default "5" if MIPS_L1_CACHE_SHIFT_5
1273 default "4" if MIPS_L1_CACHE_SHIFT_4
1276 config ARC_CMDLINE_ONLY
1280 bool "ARC console support"
1281 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1295 menu "CPU selection"
1301 config CPU_LOONGSON64
1302 bool "Loongson 64-bit CPU"
1303 depends on SYS_HAS_CPU_LOONGSON64
1304 select ARCH_HAS_PHYS_TO_DMA
1306 select CPU_HAS_PREFETCH
1307 select CPU_SUPPORTS_64BIT_KERNEL
1308 select CPU_SUPPORTS_HIGHMEM
1309 select CPU_SUPPORTS_HUGEPAGES
1310 select CPU_SUPPORTS_MSA
1311 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1312 select CPU_MIPSR2_IRQ_VI
1313 select WEAK_ORDERING
1314 select WEAK_REORDERING_BEYOND_LLSC
1315 select MIPS_ASID_BITS_VARIABLE
1316 select MIPS_PGD_C0_CONTEXT
1317 select MIPS_L1_CACHE_SHIFT_6
1318 select MIPS_FP_SUPPORT
1323 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1324 cores implements the MIPS64R2 instruction set with many extensions,
1325 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1326 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1327 Loongson-2E/2F is not covered here and will be removed in future.
1329 config LOONGSON3_ENHANCEMENT
1330 bool "New Loongson-3 CPU Enhancements"
1332 depends on CPU_LOONGSON64
1334 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1335 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1336 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1337 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1338 Fast TLB refill support, etc.
1340 This option enable those enhancements which are not probed at run
1341 time. If you want a generic kernel to run on all Loongson 3 machines,
1342 please say 'N' here. If you want a high-performance kernel to run on
1343 new Loongson-3 machines only, please say 'Y' here.
1345 config CPU_LOONGSON3_WORKAROUNDS
1346 bool "Old Loongson-3 LLSC Workarounds"
1348 depends on CPU_LOONGSON64
1350 Loongson-3 processors have the llsc issues which require workarounds.
1351 Without workarounds the system may hang unexpectedly.
1353 Newer Loongson-3 will fix these issues and no workarounds are needed.
1354 The workarounds have no significant side effect on them but may
1355 decrease the performance of the system so this option should be
1356 disabled unless the kernel is intended to be run on old systems.
1358 If unsure, please say Y.
1360 config CPU_LOONGSON3_CPUCFG_EMULATION
1361 bool "Emulate the CPUCFG instruction on older Loongson cores"
1363 depends on CPU_LOONGSON64
1365 Loongson-3A R4 and newer have the CPUCFG instruction available for
1366 userland to query CPU capabilities, much like CPUID on x86. This
1367 option provides emulation of the instruction on older Loongson
1368 cores, back to Loongson-3A1000.
1370 If unsure, please say Y.
1372 config CPU_LOONGSON2E
1374 depends on SYS_HAS_CPU_LOONGSON2E
1375 select CPU_LOONGSON2EF
1377 The Loongson 2E processor implements the MIPS III instruction set
1378 with many extensions.
1380 It has an internal FPGA northbridge, which is compatible to
1383 config CPU_LOONGSON2F
1385 depends on SYS_HAS_CPU_LOONGSON2F
1386 select CPU_LOONGSON2EF
1389 The Loongson 2F processor implements the MIPS III instruction set
1390 with many extensions.
1392 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1393 have a similar programming interface with FPGA northbridge used in
1396 config CPU_LOONGSON1B
1398 depends on SYS_HAS_CPU_LOONGSON1B
1399 select CPU_LOONGSON32
1400 select LEDS_GPIO_REGISTER
1402 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1403 Release 1 instruction set and part of the MIPS32 Release 2
1406 config CPU_LOONGSON1C
1408 depends on SYS_HAS_CPU_LOONGSON1C
1409 select CPU_LOONGSON32
1410 select LEDS_GPIO_REGISTER
1412 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1413 Release 1 instruction set and part of the MIPS32 Release 2
1416 config CPU_MIPS32_R1
1417 bool "MIPS32 Release 1"
1418 depends on SYS_HAS_CPU_MIPS32_R1
1419 select CPU_HAS_PREFETCH
1420 select CPU_SUPPORTS_32BIT_KERNEL
1421 select CPU_SUPPORTS_HIGHMEM
1423 Choose this option to build a kernel for release 1 or later of the
1424 MIPS32 architecture. Most modern embedded systems with a 32-bit
1425 MIPS processor are based on a MIPS32 processor. If you know the
1426 specific type of processor in your system, choose those that one
1427 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1428 Release 2 of the MIPS32 architecture is available since several
1429 years so chances are you even have a MIPS32 Release 2 processor
1430 in which case you should choose CPU_MIPS32_R2 instead for better
1433 config CPU_MIPS32_R2
1434 bool "MIPS32 Release 2"
1435 depends on SYS_HAS_CPU_MIPS32_R2
1436 select CPU_HAS_PREFETCH
1437 select CPU_SUPPORTS_32BIT_KERNEL
1438 select CPU_SUPPORTS_HIGHMEM
1439 select CPU_SUPPORTS_MSA
1442 Choose this option to build a kernel for release 2 or later of the
1443 MIPS32 architecture. Most modern embedded systems with a 32-bit
1444 MIPS processor are based on a MIPS32 processor. If you know the
1445 specific type of processor in your system, choose those that one
1446 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1448 config CPU_MIPS32_R5
1449 bool "MIPS32 Release 5"
1450 depends on SYS_HAS_CPU_MIPS32_R5
1451 select CPU_HAS_PREFETCH
1452 select CPU_SUPPORTS_32BIT_KERNEL
1453 select CPU_SUPPORTS_HIGHMEM
1454 select CPU_SUPPORTS_MSA
1456 select MIPS_O32_FP64_SUPPORT
1458 Choose this option to build a kernel for release 5 or later of the
1459 MIPS32 architecture. New MIPS processors, starting with the Warrior
1460 family, are based on a MIPS32r5 processor. If you own an older
1461 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1463 config CPU_MIPS32_R6
1464 bool "MIPS32 Release 6"
1465 depends on SYS_HAS_CPU_MIPS32_R6
1466 select CPU_HAS_PREFETCH
1467 select CPU_NO_LOAD_STORE_LR
1468 select CPU_SUPPORTS_32BIT_KERNEL
1469 select CPU_SUPPORTS_HIGHMEM
1470 select CPU_SUPPORTS_MSA
1472 select MIPS_O32_FP64_SUPPORT
1474 Choose this option to build a kernel for release 6 or later of the
1475 MIPS32 architecture. New MIPS processors, starting with the Warrior
1476 family, are based on a MIPS32r6 processor. If you own an older
1477 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1479 config CPU_MIPS64_R1
1480 bool "MIPS64 Release 1"
1481 depends on SYS_HAS_CPU_MIPS64_R1
1482 select CPU_HAS_PREFETCH
1483 select CPU_SUPPORTS_32BIT_KERNEL
1484 select CPU_SUPPORTS_64BIT_KERNEL
1485 select CPU_SUPPORTS_HIGHMEM
1486 select CPU_SUPPORTS_HUGEPAGES
1488 Choose this option to build a kernel for release 1 or later of the
1489 MIPS64 architecture. Many modern embedded systems with a 64-bit
1490 MIPS processor are based on a MIPS64 processor. If you know the
1491 specific type of processor in your system, choose those that one
1492 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1493 Release 2 of the MIPS64 architecture is available since several
1494 years so chances are you even have a MIPS64 Release 2 processor
1495 in which case you should choose CPU_MIPS64_R2 instead for better
1498 config CPU_MIPS64_R2
1499 bool "MIPS64 Release 2"
1500 depends on SYS_HAS_CPU_MIPS64_R2
1501 select CPU_HAS_PREFETCH
1502 select CPU_SUPPORTS_32BIT_KERNEL
1503 select CPU_SUPPORTS_64BIT_KERNEL
1504 select CPU_SUPPORTS_HIGHMEM
1505 select CPU_SUPPORTS_HUGEPAGES
1506 select CPU_SUPPORTS_MSA
1509 Choose this option to build a kernel for release 2 or later of the
1510 MIPS64 architecture. Many modern embedded systems with a 64-bit
1511 MIPS processor are based on a MIPS64 processor. If you know the
1512 specific type of processor in your system, choose those that one
1513 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1515 config CPU_MIPS64_R5
1516 bool "MIPS64 Release 5"
1517 depends on SYS_HAS_CPU_MIPS64_R5
1518 select CPU_HAS_PREFETCH
1519 select CPU_SUPPORTS_32BIT_KERNEL
1520 select CPU_SUPPORTS_64BIT_KERNEL
1521 select CPU_SUPPORTS_HIGHMEM
1522 select CPU_SUPPORTS_HUGEPAGES
1523 select CPU_SUPPORTS_MSA
1524 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1527 Choose this option to build a kernel for release 5 or later of the
1528 MIPS64 architecture. This is a intermediate MIPS architecture
1529 release partly implementing release 6 features. Though there is no
1530 any hardware known to be based on this release.
1532 config CPU_MIPS64_R6
1533 bool "MIPS64 Release 6"
1534 depends on SYS_HAS_CPU_MIPS64_R6
1535 select CPU_HAS_PREFETCH
1536 select CPU_NO_LOAD_STORE_LR
1537 select CPU_SUPPORTS_32BIT_KERNEL
1538 select CPU_SUPPORTS_64BIT_KERNEL
1539 select CPU_SUPPORTS_HIGHMEM
1540 select CPU_SUPPORTS_HUGEPAGES
1541 select CPU_SUPPORTS_MSA
1542 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1545 Choose this option to build a kernel for release 6 or later of the
1546 MIPS64 architecture. New MIPS processors, starting with the Warrior
1547 family, are based on a MIPS64r6 processor. If you own an older
1548 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1551 bool "MIPS Warrior P5600"
1552 depends on SYS_HAS_CPU_P5600
1553 select CPU_HAS_PREFETCH
1554 select CPU_SUPPORTS_32BIT_KERNEL
1555 select CPU_SUPPORTS_HIGHMEM
1556 select CPU_SUPPORTS_MSA
1557 select CPU_SUPPORTS_CPUFREQ
1558 select CPU_MIPSR2_IRQ_VI
1559 select CPU_MIPSR2_IRQ_EI
1561 select MIPS_O32_FP64_SUPPORT
1563 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1564 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1565 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1566 level features like up to six P5600 calculation cores, CM2 with L2
1567 cache, IOCU/IOMMU (though might be unused depending on the system-
1568 specific IP core configuration), GIC, CPC, virtualisation module,
1573 depends on SYS_HAS_CPU_R3000
1576 select CPU_SUPPORTS_32BIT_KERNEL
1577 select CPU_SUPPORTS_HIGHMEM
1579 Please make sure to pick the right CPU type. Linux/MIPS is not
1580 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1581 *not* work on R4000 machines and vice versa. However, since most
1582 of the supported machines have an R4000 (or similar) CPU, R4x00
1583 might be a safe bet. If the resulting kernel does not work,
1584 try to recompile with R3000.
1588 depends on SYS_HAS_CPU_TX39XX
1589 select CPU_SUPPORTS_32BIT_KERNEL
1594 depends on SYS_HAS_CPU_VR41XX
1595 select CPU_SUPPORTS_32BIT_KERNEL
1596 select CPU_SUPPORTS_64BIT_KERNEL
1598 The options selects support for the NEC VR4100 series of processors.
1599 Only choose this option if you have one of these processors as a
1600 kernel built with this option will not run on any other type of
1601 processor or vice versa.
1605 depends on SYS_HAS_CPU_R4300
1606 select CPU_SUPPORTS_32BIT_KERNEL
1607 select CPU_SUPPORTS_64BIT_KERNEL
1609 MIPS Technologies R4300-series processors.
1613 depends on SYS_HAS_CPU_R4X00
1614 select CPU_SUPPORTS_32BIT_KERNEL
1615 select CPU_SUPPORTS_64BIT_KERNEL
1616 select CPU_SUPPORTS_HUGEPAGES
1618 MIPS Technologies R4000-series processors other than 4300, including
1619 the R4000, R4400, R4600, and 4700.
1623 depends on SYS_HAS_CPU_TX49XX
1624 select CPU_HAS_PREFETCH
1625 select CPU_SUPPORTS_32BIT_KERNEL
1626 select CPU_SUPPORTS_64BIT_KERNEL
1627 select CPU_SUPPORTS_HUGEPAGES
1631 depends on SYS_HAS_CPU_R5000
1632 select CPU_SUPPORTS_32BIT_KERNEL
1633 select CPU_SUPPORTS_64BIT_KERNEL
1634 select CPU_SUPPORTS_HUGEPAGES
1636 MIPS Technologies R5000-series processors other than the Nevada.
1640 depends on SYS_HAS_CPU_R5500
1641 select CPU_SUPPORTS_32BIT_KERNEL
1642 select CPU_SUPPORTS_64BIT_KERNEL
1643 select CPU_SUPPORTS_HUGEPAGES
1645 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1650 depends on SYS_HAS_CPU_NEVADA
1651 select CPU_SUPPORTS_32BIT_KERNEL
1652 select CPU_SUPPORTS_64BIT_KERNEL
1653 select CPU_SUPPORTS_HUGEPAGES
1655 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1659 depends on SYS_HAS_CPU_R10000
1660 select CPU_HAS_PREFETCH
1661 select CPU_SUPPORTS_32BIT_KERNEL
1662 select CPU_SUPPORTS_64BIT_KERNEL
1663 select CPU_SUPPORTS_HIGHMEM
1664 select CPU_SUPPORTS_HUGEPAGES
1666 MIPS Technologies R10000-series processors.
1670 depends on SYS_HAS_CPU_RM7000
1671 select CPU_HAS_PREFETCH
1672 select CPU_SUPPORTS_32BIT_KERNEL
1673 select CPU_SUPPORTS_64BIT_KERNEL
1674 select CPU_SUPPORTS_HIGHMEM
1675 select CPU_SUPPORTS_HUGEPAGES
1679 depends on SYS_HAS_CPU_SB1
1680 select CPU_SUPPORTS_32BIT_KERNEL
1681 select CPU_SUPPORTS_64BIT_KERNEL
1682 select CPU_SUPPORTS_HIGHMEM
1683 select CPU_SUPPORTS_HUGEPAGES
1684 select WEAK_ORDERING
1686 config CPU_CAVIUM_OCTEON
1687 bool "Cavium Octeon processor"
1688 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1689 select CPU_HAS_PREFETCH
1690 select CPU_SUPPORTS_64BIT_KERNEL
1691 select WEAK_ORDERING
1692 select CPU_SUPPORTS_HIGHMEM
1693 select CPU_SUPPORTS_HUGEPAGES
1694 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1695 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1696 select MIPS_L1_CACHE_SHIFT_7
1699 The Cavium Octeon processor is a highly integrated chip containing
1700 many ethernet hardware widgets for networking tasks. The processor
1701 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1702 Full details can be found at http://www.caviumnetworks.com.
1705 bool "Broadcom BMIPS"
1706 depends on SYS_HAS_CPU_BMIPS
1708 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1709 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1710 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1711 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1712 select CPU_SUPPORTS_32BIT_KERNEL
1713 select DMA_NONCOHERENT
1715 select SWAP_IO_SPACE
1716 select WEAK_ORDERING
1717 select CPU_SUPPORTS_HIGHMEM
1718 select CPU_HAS_PREFETCH
1719 select CPU_SUPPORTS_CPUFREQ
1720 select MIPS_EXTERNAL_TIMER
1721 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1723 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1727 config CPU_MIPS32_3_5_FEATURES
1728 bool "MIPS32 Release 3.5 Features"
1729 depends on SYS_HAS_CPU_MIPS32_R3_5
1730 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1733 Choose this option to build a kernel for release 2 or later of the
1734 MIPS32 architecture including features from the 3.5 release such as
1735 support for Enhanced Virtual Addressing (EVA).
1737 config CPU_MIPS32_3_5_EVA
1738 bool "Enhanced Virtual Addressing (EVA)"
1739 depends on CPU_MIPS32_3_5_FEATURES
1743 Choose this option if you want to enable the Enhanced Virtual
1744 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1745 One of its primary benefits is an increase in the maximum size
1746 of lowmem (up to 3GB). If unsure, say 'N' here.
1748 config CPU_MIPS32_R5_FEATURES
1749 bool "MIPS32 Release 5 Features"
1750 depends on SYS_HAS_CPU_MIPS32_R5
1751 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1753 Choose this option to build a kernel for release 2 or later of the
1754 MIPS32 architecture including features from release 5 such as
1755 support for Extended Physical Addressing (XPA).
1757 config CPU_MIPS32_R5_XPA
1758 bool "Extended Physical Addressing (XPA)"
1759 depends on CPU_MIPS32_R5_FEATURES
1761 depends on !PAGE_SIZE_4KB
1762 depends on SYS_SUPPORTS_HIGHMEM
1765 select PHYS_ADDR_T_64BIT
1768 Choose this option if you want to enable the Extended Physical
1769 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1770 benefit is to increase physical addressing equal to or greater
1771 than 40 bits. Note that this has the side effect of turning on
1772 64-bit addressing which in turn makes the PTEs 64-bit in size.
1773 If unsure, say 'N' here.
1776 config CPU_NOP_WORKAROUNDS
1779 config CPU_JUMP_WORKAROUNDS
1782 config CPU_LOONGSON2F_WORKAROUNDS
1783 bool "Loongson 2F Workarounds"
1785 select CPU_NOP_WORKAROUNDS
1786 select CPU_JUMP_WORKAROUNDS
1788 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1789 require workarounds. Without workarounds the system may hang
1790 unexpectedly. For more information please refer to the gas
1791 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1793 Loongson 2F03 and later have fixed these issues and no workarounds
1794 are needed. The workarounds have no significant side effect on them
1795 but may decrease the performance of the system so this option should
1796 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1799 If unsure, please say Y.
1800 endif # CPU_LOONGSON2F
1802 config SYS_SUPPORTS_ZBOOT
1804 select HAVE_KERNEL_GZIP
1805 select HAVE_KERNEL_BZIP2
1806 select HAVE_KERNEL_LZ4
1807 select HAVE_KERNEL_LZMA
1808 select HAVE_KERNEL_LZO
1809 select HAVE_KERNEL_XZ
1810 select HAVE_KERNEL_ZSTD
1812 config SYS_SUPPORTS_ZBOOT_UART16550
1814 select SYS_SUPPORTS_ZBOOT
1816 config SYS_SUPPORTS_ZBOOT_UART_PROM
1818 select SYS_SUPPORTS_ZBOOT
1820 config CPU_LOONGSON2EF
1822 select CPU_SUPPORTS_32BIT_KERNEL
1823 select CPU_SUPPORTS_64BIT_KERNEL
1824 select CPU_SUPPORTS_HIGHMEM
1825 select CPU_SUPPORTS_HUGEPAGES
1826 select ARCH_HAS_PHYS_TO_DMA
1828 config CPU_LOONGSON32
1832 select CPU_HAS_PREFETCH
1833 select CPU_SUPPORTS_32BIT_KERNEL
1834 select CPU_SUPPORTS_HIGHMEM
1835 select CPU_SUPPORTS_CPUFREQ
1837 config CPU_BMIPS32_3300
1838 select SMP_UP if SMP
1841 config CPU_BMIPS4350
1843 select SYS_SUPPORTS_SMP
1844 select SYS_SUPPORTS_HOTPLUG_CPU
1846 config CPU_BMIPS4380
1848 select MIPS_L1_CACHE_SHIFT_6
1849 select SYS_SUPPORTS_SMP
1850 select SYS_SUPPORTS_HOTPLUG_CPU
1853 config CPU_BMIPS5000
1855 select MIPS_CPU_SCACHE
1856 select MIPS_L1_CACHE_SHIFT_7
1857 select SYS_SUPPORTS_SMP
1858 select SYS_SUPPORTS_HOTPLUG_CPU
1861 config SYS_HAS_CPU_LOONGSON64
1863 select CPU_SUPPORTS_CPUFREQ
1866 config SYS_HAS_CPU_LOONGSON2E
1869 config SYS_HAS_CPU_LOONGSON2F
1871 select CPU_SUPPORTS_CPUFREQ
1872 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1874 config SYS_HAS_CPU_LOONGSON1B
1877 config SYS_HAS_CPU_LOONGSON1C
1880 config SYS_HAS_CPU_MIPS32_R1
1883 config SYS_HAS_CPU_MIPS32_R2
1886 config SYS_HAS_CPU_MIPS32_R3_5
1889 config SYS_HAS_CPU_MIPS32_R5
1891 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1893 config SYS_HAS_CPU_MIPS32_R6
1895 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1897 config SYS_HAS_CPU_MIPS64_R1
1900 config SYS_HAS_CPU_MIPS64_R2
1903 config SYS_HAS_CPU_MIPS64_R5
1905 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1907 config SYS_HAS_CPU_MIPS64_R6
1909 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1911 config SYS_HAS_CPU_P5600
1913 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1915 config SYS_HAS_CPU_R3000
1918 config SYS_HAS_CPU_TX39XX
1921 config SYS_HAS_CPU_VR41XX
1924 config SYS_HAS_CPU_R4300
1927 config SYS_HAS_CPU_R4X00
1930 config SYS_HAS_CPU_TX49XX
1933 config SYS_HAS_CPU_R5000
1936 config SYS_HAS_CPU_R5500
1939 config SYS_HAS_CPU_NEVADA
1942 config SYS_HAS_CPU_R10000
1944 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1946 config SYS_HAS_CPU_RM7000
1949 config SYS_HAS_CPU_SB1
1952 config SYS_HAS_CPU_CAVIUM_OCTEON
1955 config SYS_HAS_CPU_BMIPS
1958 config SYS_HAS_CPU_BMIPS32_3300
1960 select SYS_HAS_CPU_BMIPS
1962 config SYS_HAS_CPU_BMIPS4350
1964 select SYS_HAS_CPU_BMIPS
1966 config SYS_HAS_CPU_BMIPS4380
1968 select SYS_HAS_CPU_BMIPS
1970 config SYS_HAS_CPU_BMIPS5000
1972 select SYS_HAS_CPU_BMIPS
1973 select ARCH_HAS_SYNC_DMA_FOR_CPU
1976 # CPU may reorder R->R, R->W, W->R, W->W
1977 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1979 config WEAK_ORDERING
1983 # CPU may reorder reads and writes beyond LL/SC
1984 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1986 config WEAK_REORDERING_BEYOND_LLSC
1991 # These two indicate any level of the MIPS32 and MIPS64 architecture
1995 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1996 CPU_MIPS32_R6 || CPU_P5600
2000 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2001 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2004 # These indicate the revision of the architecture
2008 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2012 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2014 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2019 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2021 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2026 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2028 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2029 select HAVE_ARCH_BITREVERSE
2030 select MIPS_ASID_BITS_VARIABLE
2031 select MIPS_CRC_SUPPORT
2034 config TARGET_ISA_REV
2036 default 1 if CPU_MIPSR1
2037 default 2 if CPU_MIPSR2
2038 default 5 if CPU_MIPSR5
2039 default 6 if CPU_MIPSR6
2042 Reflects the ISA revision being targeted by the kernel build. This
2043 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2051 config SYS_SUPPORTS_32BIT_KERNEL
2053 config SYS_SUPPORTS_64BIT_KERNEL
2055 config CPU_SUPPORTS_32BIT_KERNEL
2057 config CPU_SUPPORTS_64BIT_KERNEL
2059 config CPU_SUPPORTS_CPUFREQ
2061 config CPU_SUPPORTS_ADDRWINCFG
2063 config CPU_SUPPORTS_HUGEPAGES
2065 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2066 config MIPS_PGD_C0_CONTEXT
2069 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2072 # Set to y for ptrace access to watch registers.
2074 config HARDWARE_WATCHPOINTS
2076 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2081 prompt "Kernel code model"
2083 You should only select this option if you have a workload that
2084 actually benefits from 64-bit processing or if your machine has
2085 large memory. You will only be presented a single option in this
2086 menu if your system does not support both 32-bit and 64-bit kernels.
2089 bool "32-bit kernel"
2090 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2093 Select this option if you want to build a 32-bit kernel.
2096 bool "64-bit kernel"
2097 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2099 Select this option if you want to build a 64-bit kernel.
2103 config MIPS_VA_BITS_48
2104 bool "48 bits virtual memory"
2107 Support a maximum at least 48 bits of application virtual
2108 memory. Default is 40 bits or less, depending on the CPU.
2109 For page sizes 16k and above, this option results in a small
2110 memory overhead for page tables. For 4k page size, a fourth
2111 level of page tables is added which imposes both a memory
2112 overhead as well as slower TLB fault handling.
2116 config ZBOOT_LOAD_ADDRESS
2117 hex "Compressed kernel load address"
2118 default 0xffffffff80400000 if BCM47XX
2120 depends on SYS_SUPPORTS_ZBOOT
2122 The address to load compressed kernel, aka vmlinuz.
2124 This is only used if non-zero.
2127 prompt "Kernel page size"
2128 default PAGE_SIZE_4KB
2130 config PAGE_SIZE_4KB
2132 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2134 This option select the standard 4kB Linux page size. On some
2135 R3000-family processors this is the only available page size. Using
2136 4kB page size will minimize memory consumption and is therefore
2137 recommended for low memory systems.
2139 config PAGE_SIZE_8KB
2141 depends on CPU_CAVIUM_OCTEON
2142 depends on !MIPS_VA_BITS_48
2144 Using 8kB page size will result in higher performance kernel at
2145 the price of higher memory consumption. This option is available
2146 only on cnMIPS processors. Note that you will need a suitable Linux
2147 distribution to support this.
2149 config PAGE_SIZE_16KB
2151 depends on !CPU_R3000 && !CPU_TX39XX
2153 Using 16kB page size will result in higher performance kernel at
2154 the price of higher memory consumption. This option is available on
2155 all non-R3000 family processors. Note that you will need a suitable
2156 Linux distribution to support this.
2158 config PAGE_SIZE_32KB
2160 depends on CPU_CAVIUM_OCTEON
2161 depends on !MIPS_VA_BITS_48
2163 Using 32kB page size will result in higher performance kernel at
2164 the price of higher memory consumption. This option is available
2165 only on cnMIPS cores. Note that you will need a suitable Linux
2166 distribution to support this.
2168 config PAGE_SIZE_64KB
2170 depends on !CPU_R3000 && !CPU_TX39XX
2172 Using 64kB page size will result in higher performance kernel at
2173 the price of higher memory consumption. This option is available on
2174 all non-R3000 family processor. Not that at the time of this
2175 writing this option is still high experimental.
2179 config FORCE_MAX_ZONEORDER
2180 int "Maximum zone order"
2181 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2182 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2183 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2184 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2185 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2186 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2190 The kernel memory allocator divides physically contiguous memory
2191 blocks into "zones", where each zone is a power of two number of
2192 pages. This option selects the largest power of two that the kernel
2193 keeps in the memory allocator. If you need to allocate very large
2194 blocks of physically contiguous memory, then you may need to
2195 increase this value.
2197 This config option is actually maximum order plus one. For example,
2198 a value of 11 means that the largest free memory block is 2^10 pages.
2200 The page size is not necessarily 4KB. Keep this in mind
2201 when choosing a value for this option.
2206 config IP22_CPU_SCACHE
2211 # Support for a MIPS32 / MIPS64 style S-caches
2213 config MIPS_CPU_SCACHE
2217 config R5000_CPU_SCACHE
2221 config RM7000_CPU_SCACHE
2225 config SIBYTE_DMA_PAGEOPS
2226 bool "Use DMA to clear/copy pages"
2229 Instead of using the CPU to zero and copy pages, use a Data Mover
2230 channel. These DMA channels are otherwise unused by the standard
2231 SiByte Linux port. Seems to give a small performance benefit.
2233 config CPU_HAS_PREFETCH
2236 config CPU_GENERIC_DUMP_TLB
2238 default y if !(CPU_R3000 || CPU_TX39XX)
2240 config MIPS_FP_SUPPORT
2241 bool "Floating Point support" if EXPERT
2244 Select y to include support for floating point in the kernel
2245 including initialization of FPU hardware, FP context save & restore
2246 and emulation of an FPU where necessary. Without this support any
2247 userland program attempting to use floating point instructions will
2250 If you know that your userland will not attempt to use floating point
2251 instructions then you can say n here to shrink the kernel a little.
2255 config CPU_R2300_FPU
2257 depends on MIPS_FP_SUPPORT
2258 default y if CPU_R3000 || CPU_TX39XX
2265 depends on MIPS_FP_SUPPORT
2266 default y if !CPU_R2300_FPU
2268 config CPU_R4K_CACHE_TLB
2270 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2273 bool "MIPS MT SMP support (1 TC on each available VPE)"
2275 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2276 select CPU_MIPSR2_IRQ_VI
2277 select CPU_MIPSR2_IRQ_EI
2282 select SYS_SUPPORTS_SMP
2283 select SYS_SUPPORTS_SCHED_SMT
2284 select MIPS_PERF_SHARED_TC_COUNTERS
2286 This is a kernel model which is known as SMVP. This is supported
2287 on cores with the MT ASE and uses the available VPEs to implement
2288 virtual processors which supports SMP. This is equivalent to the
2289 Intel Hyperthreading feature. For further information go to
2290 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2296 bool "SMT (multithreading) scheduler support"
2297 depends on SYS_SUPPORTS_SCHED_SMT
2300 SMT scheduler support improves the CPU scheduler's decision making
2301 when dealing with MIPS MT enabled cores at a cost of slightly
2302 increased overhead in some places. If unsure say N here.
2304 config SYS_SUPPORTS_SCHED_SMT
2307 config SYS_SUPPORTS_MULTITHREADING
2310 config MIPS_MT_FPAFF
2311 bool "Dynamic FPU affinity for FP-intensive threads"
2313 depends on MIPS_MT_SMP
2315 config MIPSR2_TO_R6_EMULATOR
2316 bool "MIPS R2-to-R6 emulator"
2317 depends on CPU_MIPSR6
2318 depends on MIPS_FP_SUPPORT
2321 Choose this option if you want to run non-R6 MIPS userland code.
2322 Even if you say 'Y' here, the emulator will still be disabled by
2323 default. You can enable it using the 'mipsr2emu' kernel option.
2324 The only reason this is a build-time option is to save ~14K from the
2327 config SYS_SUPPORTS_VPE_LOADER
2329 depends on SYS_SUPPORTS_MULTITHREADING
2331 Indicates that the platform supports the VPE loader, and provides
2334 config MIPS_VPE_LOADER
2335 bool "VPE loader support."
2336 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2337 select CPU_MIPSR2_IRQ_VI
2338 select CPU_MIPSR2_IRQ_EI
2341 Includes a loader for loading an elf relocatable object
2342 onto another VPE and running it.
2344 config MIPS_VPE_LOADER_CMP
2347 depends on MIPS_VPE_LOADER && MIPS_CMP
2349 config MIPS_VPE_LOADER_MT
2352 depends on MIPS_VPE_LOADER && !MIPS_CMP
2354 config MIPS_VPE_LOADER_TOM
2355 bool "Load VPE program into memory hidden from linux"
2356 depends on MIPS_VPE_LOADER
2359 The loader can use memory that is present but has been hidden from
2360 Linux using the kernel command line option "mem=xxMB". It's up to
2361 you to ensure the amount you put in the option and the space your
2362 program requires is less or equal to the amount physically present.
2364 config MIPS_VPE_APSP_API
2365 bool "Enable support for AP/SP API (RTLX)"
2366 depends on MIPS_VPE_LOADER
2368 config MIPS_VPE_APSP_API_CMP
2371 depends on MIPS_VPE_APSP_API && MIPS_CMP
2373 config MIPS_VPE_APSP_API_MT
2376 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2379 bool "MIPS CMP framework support (DEPRECATED)"
2380 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2383 select SYS_SUPPORTS_SMP
2384 select WEAK_ORDERING
2387 Select this if you are using a bootloader which implements the "CMP
2388 framework" protocol (ie. YAMON) and want your kernel to make use of
2389 its ability to start secondary CPUs.
2391 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2395 bool "MIPS Coherent Processing System support"
2396 depends on SYS_SUPPORTS_MIPS_CPS
2398 select MIPS_CPS_PM if HOTPLUG_CPU
2400 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2401 select SYS_SUPPORTS_HOTPLUG_CPU
2402 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2403 select SYS_SUPPORTS_SMP
2404 select WEAK_ORDERING
2405 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2407 Select this if you wish to run an SMP kernel across multiple cores
2408 within a MIPS Coherent Processing System. When this option is
2409 enabled the kernel will probe for other cores and boot them with
2410 no external assistance. It is safe to enable this when hardware
2411 support is unavailable.
2424 config SB1_PASS_2_WORKAROUNDS
2426 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2429 config SB1_PASS_2_1_WORKAROUNDS
2431 depends on CPU_SB1 && CPU_SB1_PASS_2
2435 prompt "SmartMIPS or microMIPS ASE support"
2437 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2440 Select this if you want neither microMIPS nor SmartMIPS support
2442 config CPU_HAS_SMARTMIPS
2443 depends on SYS_SUPPORTS_SMARTMIPS
2446 SmartMIPS is a extension of the MIPS32 architecture aimed at
2447 increased security at both hardware and software level for
2448 smartcards. Enabling this option will allow proper use of the
2449 SmartMIPS instructions by Linux applications. However a kernel with
2450 this option will not work on a MIPS core without SmartMIPS core. If
2451 you don't know you probably don't have SmartMIPS and should say N
2454 config CPU_MICROMIPS
2455 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2458 When this option is enabled the kernel will be built using the
2464 bool "Support for the MIPS SIMD Architecture"
2465 depends on CPU_SUPPORTS_MSA
2466 depends on MIPS_FP_SUPPORT
2467 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2469 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2470 and a set of SIMD instructions to operate on them. When this option
2471 is enabled the kernel will support allocating & switching MSA
2472 vector register contexts. If you know that your kernel will only be
2473 running on CPUs which do not support MSA or that your userland will
2474 not be making use of it then you may wish to say N here to reduce
2475 the size & complexity of your kernel.
2486 depends on !CPU_DIEI_BROKEN
2489 config CPU_DIEI_BROKEN
2495 config CPU_NO_LOAD_STORE_LR
2498 CPU lacks support for unaligned load and store instructions:
2499 LWL, LWR, SWL, SWR (Load/store word left/right).
2500 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2504 # Vectored interrupt mode is an R2 feature
2506 config CPU_MIPSR2_IRQ_VI
2510 # Extended interrupt mode is an R2 feature
2512 config CPU_MIPSR2_IRQ_EI
2517 depends on !CPU_R3000
2523 config CPU_DADDI_WORKAROUNDS
2526 config CPU_R4000_WORKAROUNDS
2528 select CPU_R4400_WORKAROUNDS
2530 config CPU_R4400_WORKAROUNDS
2533 config CPU_R4X00_BUGS64
2535 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2537 config MIPS_ASID_SHIFT
2539 default 6 if CPU_R3000 || CPU_TX39XX
2542 config MIPS_ASID_BITS
2544 default 0 if MIPS_ASID_BITS_VARIABLE
2545 default 6 if CPU_R3000 || CPU_TX39XX
2548 config MIPS_ASID_BITS_VARIABLE
2551 config MIPS_CRC_SUPPORT
2554 # R4600 erratum. Due to the lack of errata information the exact
2555 # technical details aren't known. I've experimentally found that disabling
2556 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2558 config WAR_R4600_V1_INDEX_ICACHEOP
2561 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2563 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2564 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2565 # executed if there is no other dcache activity. If the dcache is
2566 # accessed for another instruction immediately preceding when these
2567 # cache instructions are executing, it is possible that the dcache
2568 # tag match outputs used by these cache instructions will be
2569 # incorrect. These cache instructions should be preceded by at least
2570 # four instructions that are not any kind of load or store
2573 # This is not allowed: lw
2577 # cache Hit_Writeback_Invalidate_D
2579 # This is allowed: lw
2584 # cache Hit_Writeback_Invalidate_D
2585 config WAR_R4600_V1_HIT_CACHEOP
2588 # Writeback and invalidate the primary cache dcache before DMA.
2590 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2591 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2592 # operate correctly if the internal data cache refill buffer is empty. These
2593 # CACHE instructions should be separated from any potential data cache miss
2594 # by a load instruction to an uncached address to empty the response buffer."
2595 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2597 config WAR_R4600_V2_HIT_CACHEOP
2600 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2601 # the line which this instruction itself exists, the following
2602 # operation is not guaranteed."
2604 # Workaround: do two phase flushing for Index_Invalidate_I
2605 config WAR_TX49XX_ICACHE_INDEX_INV
2608 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2609 # opposes it being called that) where invalid instructions in the same
2610 # I-cache line worth of instructions being fetched may case spurious
2612 config WAR_ICACHE_REFILLS
2615 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2616 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2617 config WAR_R10000_LLSC
2620 # 34K core erratum: "Problems Executing the TLBR Instruction"
2621 config WAR_MIPS34K_MISSED_ITLB
2625 # - Highmem only makes sense for the 32-bit kernel.
2626 # - The current highmem code will only work properly on physically indexed
2627 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2628 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2629 # moment we protect the user and offer the highmem option only on machines
2630 # where it's known to be safe. This will not offer highmem on a few systems
2631 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2632 # indexed CPUs but we're playing safe.
2633 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2634 # know they might have memory configurations that could make use of highmem
2638 bool "High Memory Support"
2639 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2642 config CPU_SUPPORTS_HIGHMEM
2645 config SYS_SUPPORTS_HIGHMEM
2648 config SYS_SUPPORTS_SMARTMIPS
2651 config SYS_SUPPORTS_MICROMIPS
2654 config SYS_SUPPORTS_MIPS16
2657 This option must be set if a kernel might be executed on a MIPS16-
2658 enabled CPU even if MIPS16 is not actually being used. In other
2659 words, it makes the kernel MIPS16-tolerant.
2661 config CPU_SUPPORTS_MSA
2664 config ARCH_FLATMEM_ENABLE
2666 depends on !NUMA && !CPU_LOONGSON2EF
2668 config ARCH_SPARSEMEM_ENABLE
2670 select SPARSEMEM_STATIC if !SGI_IP27
2674 depends on SYS_SUPPORTS_NUMA
2676 select HAVE_SETUP_PER_CPU_AREA
2677 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2679 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2680 Access). This option improves performance on systems with more
2681 than two nodes; on two node systems it is generally better to
2682 leave it disabled; on single node systems leave this option
2685 config SYS_SUPPORTS_NUMA
2689 bool "Relocatable kernel"
2690 depends on SYS_SUPPORTS_RELOCATABLE
2691 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2692 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2693 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2694 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2697 This builds a kernel image that retains relocation information
2698 so it can be loaded someplace besides the default 1MB.
2699 The relocations make the kernel binary about 15% larger,
2700 but are discarded at runtime
2702 config RELOCATION_TABLE_SIZE
2703 hex "Relocation table size"
2704 depends on RELOCATABLE
2705 range 0x0 0x01000000
2706 default "0x00200000" if CPU_LOONGSON64
2707 default "0x00100000"
2709 A table of relocation data will be appended to the kernel binary
2710 and parsed at boot to fix up the relocated kernel.
2712 This option allows the amount of space reserved for the table to be
2713 adjusted, although the default of 1Mb should be ok in most cases.
2715 The build will fail and a valid size suggested if this is too small.
2717 If unsure, leave at the default value.
2719 config RANDOMIZE_BASE
2720 bool "Randomize the address of the kernel image"
2721 depends on RELOCATABLE
2723 Randomizes the physical and virtual address at which the
2724 kernel image is loaded, as a security feature that
2725 deters exploit attempts relying on knowledge of the location
2726 of kernel internals.
2728 Entropy is generated using any coprocessor 0 registers available.
2730 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2734 config RANDOMIZE_BASE_MAX_OFFSET
2735 hex "Maximum kASLR offset" if EXPERT
2736 depends on RANDOMIZE_BASE
2737 range 0x0 0x40000000 if EVA || 64BIT
2738 range 0x0 0x08000000
2739 default "0x01000000"
2741 When kASLR is active, this provides the maximum offset that will
2742 be applied to the kernel image. It should be set according to the
2743 amount of physical RAM available in the target system minus
2744 PHYSICAL_START and must be a power of 2.
2746 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2747 EVA or 64-bit. The default is 16Mb.
2754 config HW_PERF_EVENTS
2755 bool "Enable hardware performance counter support for perf events"
2756 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2759 Enable hardware performance counter support for perf events. If
2760 disabled, perf events will use software events only.
2763 bool "Enable DMI scanning"
2764 depends on MACH_LOONGSON64
2765 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2768 Enabled scanning of DMI to identify machine quirks. Say Y
2769 here unless you have verified that your setup is not
2770 affected by entries in the DMI blacklist. Required by PNP
2774 bool "Multi-Processing support"
2775 depends on SYS_SUPPORTS_SMP
2777 This enables support for systems with more than one CPU. If you have
2778 a system with only one CPU, say N. If you have a system with more
2779 than one CPU, say Y.
2781 If you say N here, the kernel will run on uni- and multiprocessor
2782 machines, but will use only one CPU of a multiprocessor machine. If
2783 you say Y here, the kernel will run on many, but not all,
2784 uniprocessor machines. On a uniprocessor machine, the kernel
2785 will run faster if you say N here.
2787 People using multiprocessor machines who say Y here should also say
2788 Y to "Enhanced Real Time Clock Support", below.
2790 See also the SMP-HOWTO available at
2791 <https://www.tldp.org/docs.html#howto>.
2793 If you don't know what to do here, say N.
2796 bool "Support for hot-pluggable CPUs"
2797 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2799 Say Y here to allow turning CPUs off and on. CPUs can be
2800 controlled through /sys/devices/system/cpu.
2801 (Note: power management support will enable this option
2802 automatically on SMP systems. )
2803 Say N if you want to disable CPU hotplug.
2808 config SYS_SUPPORTS_MIPS_CMP
2811 config SYS_SUPPORTS_MIPS_CPS
2814 config SYS_SUPPORTS_SMP
2817 config NR_CPUS_DEFAULT_4
2820 config NR_CPUS_DEFAULT_8
2823 config NR_CPUS_DEFAULT_16
2826 config NR_CPUS_DEFAULT_32
2829 config NR_CPUS_DEFAULT_64
2833 int "Maximum number of CPUs (2-256)"
2836 default "4" if NR_CPUS_DEFAULT_4
2837 default "8" if NR_CPUS_DEFAULT_8
2838 default "16" if NR_CPUS_DEFAULT_16
2839 default "32" if NR_CPUS_DEFAULT_32
2840 default "64" if NR_CPUS_DEFAULT_64
2842 This allows you to specify the maximum number of CPUs which this
2843 kernel will support. The maximum supported value is 32 for 32-bit
2844 kernel and 64 for 64-bit kernels; the minimum value which makes
2845 sense is 1 for Qemu (useful only for kernel debugging purposes)
2846 and 2 for all others.
2848 This is purely to save memory - each supported CPU adds
2849 approximately eight kilobytes to the kernel image. For best
2850 performance should round up your number of processors to the next
2853 config MIPS_PERF_SHARED_TC_COUNTERS
2856 config MIPS_NR_CPU_NR_MAP_1024
2859 config MIPS_NR_CPU_NR_MAP
2862 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2863 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2866 # Timer Interrupt Frequency Configuration
2870 prompt "Timer frequency"
2873 Allows the configuration of the timer frequency.
2876 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2879 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2882 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2885 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2888 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2891 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2894 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2897 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2901 config SYS_SUPPORTS_24HZ
2904 config SYS_SUPPORTS_48HZ
2907 config SYS_SUPPORTS_100HZ
2910 config SYS_SUPPORTS_128HZ
2913 config SYS_SUPPORTS_250HZ
2916 config SYS_SUPPORTS_256HZ
2919 config SYS_SUPPORTS_1000HZ
2922 config SYS_SUPPORTS_1024HZ
2925 config SYS_SUPPORTS_ARBIT_HZ
2927 default y if !SYS_SUPPORTS_24HZ && \
2928 !SYS_SUPPORTS_48HZ && \
2929 !SYS_SUPPORTS_100HZ && \
2930 !SYS_SUPPORTS_128HZ && \
2931 !SYS_SUPPORTS_250HZ && \
2932 !SYS_SUPPORTS_256HZ && \
2933 !SYS_SUPPORTS_1000HZ && \
2934 !SYS_SUPPORTS_1024HZ
2940 default 100 if HZ_100
2941 default 128 if HZ_128
2942 default 250 if HZ_250
2943 default 256 if HZ_256
2944 default 1000 if HZ_1000
2945 default 1024 if HZ_1024
2948 def_bool HIGH_RES_TIMERS
2951 bool "Kexec system call"
2954 kexec is a system call that implements the ability to shutdown your
2955 current kernel, and to start another kernel. It is like a reboot
2956 but it is independent of the system firmware. And like a reboot
2957 you can start any kernel with it, not just Linux.
2959 The name comes from the similarity to the exec system call.
2961 It is an ongoing process to be certain the hardware in a machine
2962 is properly shutdown, so do not be surprised if this code does not
2963 initially work for you. As of this writing the exact hardware
2964 interface is strongly in flux, so no good recommendation can be
2968 bool "Kernel crash dumps"
2970 Generate crash dump after being started by kexec.
2971 This should be normally only set in special crash dump kernels
2972 which are loaded in the main kernel with kexec-tools into
2973 a specially reserved region and then later executed after
2974 a crash by kdump/kexec. The crash dump kernel must be compiled
2975 to a memory address not used by the main kernel or firmware using
2978 config PHYSICAL_START
2979 hex "Physical address where the kernel is loaded"
2980 default "0xffffffff84000000"
2981 depends on CRASH_DUMP
2983 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2984 If you plan to use kernel for capturing the crash dump change
2985 this value to start of the reserved region (the "X" value as
2986 specified in the "crashkernel=YM@XM" command line boot parameter
2987 passed to the panic-ed kernel).
2989 config MIPS_O32_FP64_SUPPORT
2990 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2991 depends on 32BIT || MIPS32_O32
2993 When this is enabled, the kernel will support use of 64-bit floating
2994 point registers with binaries using the O32 ABI along with the
2995 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2996 32-bit MIPS systems this support is at the cost of increasing the
2997 size and complexity of the compiled FPU emulator. Thus if you are
2998 running a MIPS32 system and know that none of your userland binaries
2999 will require 64-bit floating point, you may wish to reduce the size
3000 of your kernel & potentially improve FP emulation performance by
3003 Although binutils currently supports use of this flag the details
3004 concerning its effect upon the O32 ABI in userland are still being
3005 worked on. In order to avoid userland becoming dependent upon current
3006 behaviour before the details have been finalised, this option should
3007 be considered experimental and only enabled by those working upon
3015 select OF_EARLY_FLATTREE
3025 prompt "Kernel appended dtb support" if USE_OF
3026 default MIPS_NO_APPENDED_DTB
3028 config MIPS_NO_APPENDED_DTB
3031 Do not enable appended dtb support.
3033 config MIPS_ELF_APPENDED_DTB
3036 With this option, the boot code will look for a device tree binary
3037 DTB) included in the vmlinux ELF section .appended_dtb. By default
3038 it is empty and the DTB can be appended using binutils command
3041 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3043 This is meant as a backward compatibility convenience for those
3044 systems with a bootloader that can't be upgraded to accommodate
3045 the documented boot protocol using a device tree.
3047 config MIPS_RAW_APPENDED_DTB
3048 bool "vmlinux.bin or vmlinuz.bin"
3050 With this option, the boot code will look for a device tree binary
3051 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3052 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3054 This is meant as a backward compatibility convenience for those
3055 systems with a bootloader that can't be upgraded to accommodate
3056 the documented boot protocol using a device tree.
3058 Beware that there is very little in terms of protection against
3059 this option being confused by leftover garbage in memory that might
3060 look like a DTB header after a reboot if no actual DTB is appended
3061 to vmlinux.bin. Do not leave this option active in a production kernel
3062 if you don't intend to always append a DTB.
3066 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3067 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3068 !MACH_LOONGSON64 && !MIPS_MALTA && \
3070 default MIPS_CMDLINE_FROM_BOOTLOADER
3072 config MIPS_CMDLINE_FROM_DTB
3074 bool "Dtb kernel arguments if available"
3076 config MIPS_CMDLINE_DTB_EXTEND
3078 bool "Extend dtb kernel arguments with bootloader arguments"
3080 config MIPS_CMDLINE_FROM_BOOTLOADER
3081 bool "Bootloader kernel arguments if available"
3083 config MIPS_CMDLINE_BUILTIN_EXTEND
3084 depends on CMDLINE_BOOL
3085 bool "Extend builtin kernel arguments with bootloader arguments"
3090 config LOCKDEP_SUPPORT
3094 config STACKTRACE_SUPPORT
3098 config PGTABLE_LEVELS
3100 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3101 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3104 config MIPS_AUTO_PFN_OFFSET
3107 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3109 config PCI_DRIVERS_GENERIC
3110 select PCI_DOMAINS_GENERIC if PCI
3113 config PCI_DRIVERS_LEGACY
3114 def_bool !PCI_DRIVERS_GENERIC
3115 select NO_GENERIC_PCI_IOPORT_MAP
3116 select PCI_DOMAINS if PCI
3119 # ISA support is now enabled via select. Too many systems still have the one
3120 # or other ISA chip on the board that users don't know about so don't expect
3121 # users to choose the right thing ...
3127 bool "TURBOchannel support"
3128 depends on MACH_DECSTATION
3130 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3131 processors. TURBOchannel programming specifications are available
3133 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3135 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3136 Linux driver support status is documented at:
3137 <http://www.linux-mips.org/wiki/DECstation>
3143 config ARCH_MMAP_RND_BITS_MIN
3147 config ARCH_MMAP_RND_BITS_MAX
3151 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3154 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3161 select MIPS_EXTERNAL_TIMER
3167 config MIPS32_COMPAT
3173 config SYSVIPC_COMPAT
3177 bool "Kernel support for o32 binaries"
3179 select ARCH_WANT_OLD_COMPAT_IPC
3181 select MIPS32_COMPAT
3182 select SYSVIPC_COMPAT if SYSVIPC
3184 Select this option if you want to run o32 binaries. These are pure
3185 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3186 existing binaries are in this format.
3191 bool "Kernel support for n32 binaries"
3193 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3195 select MIPS32_COMPAT
3196 select SYSVIPC_COMPAT if SYSVIPC
3198 Select this option if you want to run n32 binaries. These are
3199 64-bit binaries using 32-bit quantities for addressing and certain
3200 data that would normally be 64-bit. They are used in special
3205 menu "Power management options"
3207 config ARCH_HIBERNATION_POSSIBLE
3209 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3211 config ARCH_SUSPEND_POSSIBLE
3213 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3215 source "kernel/power/Kconfig"
3219 config MIPS_EXTERNAL_TIMER
3222 menu "CPU Power Management"
3224 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3225 source "drivers/cpufreq/Kconfig"
3228 source "drivers/cpuidle/Kconfig"
3232 source "arch/mips/kvm/Kconfig"
3234 source "arch/mips/vdso/Kconfig"