1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
8 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
9 select ARCH_HAS_FORTIFY_SOURCE
11 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
12 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
13 select ARCH_HAS_STRNCPY_FROM_USER
14 select ARCH_HAS_STRNLEN_USER
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HAS_UBSAN_SANITIZE_ALL
17 select ARCH_HAS_GCOV_PROFILE_ALL
18 select ARCH_KEEP_MEMBLOCK
19 select ARCH_USE_BUILTIN_BSWAP
20 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
21 select ARCH_USE_MEMTEST
22 select ARCH_USE_QUEUED_RWLOCKS
23 select ARCH_USE_QUEUED_SPINLOCKS
24 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
25 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
26 select ARCH_WANT_IPC_PARSE_VERSION
27 select ARCH_WANT_LD_ORPHAN_WARN
28 select BUILDTIME_TABLE_SORT
29 select CLONE_BACKWARDS
30 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
31 select CPU_PM if CPU_IDLE
32 select GENERIC_ATOMIC64 if !64BIT
33 select GENERIC_CMOS_UPDATE
34 select GENERIC_CPU_AUTOPROBE
35 select GENERIC_GETTIMEOFDAY
37 select GENERIC_IRQ_PROBE
38 select GENERIC_IRQ_SHOW
39 select GENERIC_ISA_DMA if EISA
40 select GENERIC_LIB_ASHLDI3
41 select GENERIC_LIB_ASHRDI3
42 select GENERIC_LIB_CMPDI2
43 select GENERIC_LIB_LSHRDI3
44 select GENERIC_LIB_UCMPDI2
45 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
46 select GENERIC_SMP_IDLE_THREAD
47 select GENERIC_TIME_VSYSCALL
48 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
49 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
50 select HAVE_ARCH_COMPILER_H
51 select HAVE_ARCH_JUMP_LABEL
52 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
53 select HAVE_ARCH_MMAP_RND_BITS if MMU
54 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
55 select HAVE_ARCH_SECCOMP_FILTER
56 select HAVE_ARCH_TRACEHOOK
57 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
58 select HAVE_ASM_MODVERSIONS
59 select HAVE_CONTEXT_TRACKING_USER
61 select HAVE_C_RECORDMCOUNT
62 select HAVE_DEBUG_KMEMLEAK
63 select HAVE_DEBUG_STACKOVERFLOW
64 select HAVE_DMA_CONTIGUOUS
65 select HAVE_DYNAMIC_FTRACE
66 select HAVE_EBPF_JIT if !CPU_MICROMIPS
67 select HAVE_EXIT_THREAD
69 select HAVE_FTRACE_MCOUNT_RECORD
70 select HAVE_FUNCTION_GRAPH_TRACER
71 select HAVE_FUNCTION_TRACER
72 select HAVE_GCC_PLUGINS
73 select HAVE_GENERIC_VDSO
74 select HAVE_IOREMAP_PROT
75 select HAVE_IRQ_EXIT_ON_IRQ_STACK
76 select HAVE_IRQ_TIME_ACCOUNTING
78 select HAVE_KRETPROBES
79 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
80 select HAVE_MOD_ARCH_SPECIFIC
82 select HAVE_PERF_EVENTS
84 select HAVE_PERF_USER_STACK_DUMP
85 select HAVE_REGS_AND_STACK_ACCESS_API
87 select HAVE_SPARSE_SYSCALL_NR
88 select HAVE_STACKPROTECTOR
89 select HAVE_SYSCALL_TRACEPOINTS
90 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
91 select IRQ_FORCED_THREADING
93 select MODULES_USE_ELF_REL if MODULES
94 select MODULES_USE_ELF_RELA if MODULES && 64BIT
95 select PERF_USE_VMALLOC
96 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
98 select SYSCTL_EXCEPTION_TRACE
99 select TRACE_IRQFLAGS_SUPPORT
100 select ARCH_HAS_ELFCORE_COMPAT
101 select HAVE_ARCH_KCSAN if 64BIT
103 config MIPS_FIXUP_BIGPHYS_ADDR
111 select SYS_SUPPORTS_32BIT_KERNEL
112 select SYS_SUPPORTS_LITTLE_ENDIAN
113 select SYS_SUPPORTS_ZBOOT
114 select DMA_NONCOHERENT
119 select GENERIC_IRQ_CHIP
120 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
122 select CPU_SUPPORTS_CPUFREQ
123 select MIPS_EXTERNAL_TIMER
125 menu "Machine selection"
129 default MIPS_GENERIC_KERNEL
131 config MIPS_GENERIC_KERNEL
132 bool "Generic board-agnostic MIPS kernel"
137 select CLKSRC_MIPS_GIC
139 select CPU_MIPSR2_IRQ_EI
140 select CPU_MIPSR2_IRQ_VI
142 select DMA_NONCOHERENT
145 select MIPS_AUTO_PFN_OFFSET
146 select MIPS_CPU_SCACHE
148 select MIPS_L1_CACHE_SHIFT_7
149 select NO_EXCEPT_FILL
150 select PCI_DRIVERS_GENERIC
153 select SYS_HAS_CPU_MIPS32_R1
154 select SYS_HAS_CPU_MIPS32_R2
155 select SYS_HAS_CPU_MIPS32_R6
156 select SYS_HAS_CPU_MIPS64_R1
157 select SYS_HAS_CPU_MIPS64_R2
158 select SYS_HAS_CPU_MIPS64_R6
159 select SYS_SUPPORTS_32BIT_KERNEL
160 select SYS_SUPPORTS_64BIT_KERNEL
161 select SYS_SUPPORTS_BIG_ENDIAN
162 select SYS_SUPPORTS_HIGHMEM
163 select SYS_SUPPORTS_LITTLE_ENDIAN
164 select SYS_SUPPORTS_MICROMIPS
165 select SYS_SUPPORTS_MIPS16
166 select SYS_SUPPORTS_MIPS_CPS
167 select SYS_SUPPORTS_MULTITHREADING
168 select SYS_SUPPORTS_RELOCATABLE
169 select SYS_SUPPORTS_SMARTMIPS
170 select SYS_SUPPORTS_ZBOOT
172 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
173 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
174 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
175 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
176 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
177 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
180 Select this to build a kernel which aims to support multiple boards,
181 generally using a flattened device tree passed from the bootloader
182 using the boot protocol defined in the UHI (Unified Hosting
183 Interface) specification.
186 bool "Alchemy processor based machines"
187 select PHYS_ADDR_T_64BIT
191 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
192 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
193 select SYS_HAS_CPU_MIPS32_R1
194 select SYS_SUPPORTS_32BIT_KERNEL
195 select SYS_SUPPORTS_APM_EMULATION
197 select SYS_SUPPORTS_ZBOOT
201 bool "Texas Instruments AR7"
204 select DMA_NONCOHERENT
208 select NO_EXCEPT_FILL
210 select SYS_HAS_CPU_MIPS32_R1
211 select SYS_HAS_EARLY_PRINTK
212 select SYS_SUPPORTS_32BIT_KERNEL
213 select SYS_SUPPORTS_LITTLE_ENDIAN
214 select SYS_SUPPORTS_MIPS16
215 select SYS_SUPPORTS_ZBOOT_UART16550
219 Support for the Texas Instruments AR7 System-on-a-Chip
220 family: TNETD7100, 7200 and 7300.
223 bool "Atheros AR231x/AR531x SoC support"
226 select DMA_NONCOHERENT
229 select SYS_HAS_CPU_MIPS32_R1
230 select SYS_SUPPORTS_BIG_ENDIAN
231 select SYS_SUPPORTS_32BIT_KERNEL
232 select SYS_HAS_EARLY_PRINTK
234 Support for Atheros AR231x and Atheros AR531x based boards
237 bool "Atheros AR71XX/AR724X/AR913X based boards"
238 select ARCH_HAS_RESET_CONTROLLER
242 select DMA_NONCOHERENT
247 select SYS_HAS_CPU_MIPS32_R2
248 select SYS_HAS_EARLY_PRINTK
249 select SYS_SUPPORTS_32BIT_KERNEL
250 select SYS_SUPPORTS_BIG_ENDIAN
251 select SYS_SUPPORTS_MIPS16
252 select SYS_SUPPORTS_ZBOOT_UART_PROM
254 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
256 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
259 bool "Broadcom Generic BMIPS kernel"
260 select ARCH_HAS_RESET_CONTROLLER
261 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
263 select NO_EXCEPT_FILL
269 select BCM6345_L1_IRQ
270 select BCM7038_L1_IRQ
271 select BCM7120_L2_IRQ
272 select BRCMSTB_L2_IRQ
274 select DMA_NONCOHERENT
275 select SYS_SUPPORTS_32BIT_KERNEL
276 select SYS_SUPPORTS_LITTLE_ENDIAN
277 select SYS_SUPPORTS_BIG_ENDIAN
278 select SYS_SUPPORTS_HIGHMEM
279 select SYS_HAS_CPU_BMIPS32_3300
280 select SYS_HAS_CPU_BMIPS4350
281 select SYS_HAS_CPU_BMIPS4380
282 select SYS_HAS_CPU_BMIPS5000
284 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
285 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
286 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
287 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
288 select HARDIRQS_SW_RESEND
290 select PCI_DRIVERS_GENERIC
293 Build a generic DT-based kernel image that boots on select
294 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
295 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
296 must be set appropriately for your board.
299 bool "Broadcom BCM47XX based boards"
303 select DMA_NONCOHERENT
306 select SYS_HAS_CPU_MIPS32_R1
307 select NO_EXCEPT_FILL
308 select SYS_SUPPORTS_32BIT_KERNEL
309 select SYS_SUPPORTS_LITTLE_ENDIAN
310 select SYS_SUPPORTS_MIPS16
311 select SYS_SUPPORTS_ZBOOT
312 select SYS_HAS_EARLY_PRINTK
313 select USE_GENERIC_EARLY_PRINTK_8250
315 select LEDS_GPIO_REGISTER
318 select BCM47XX_SSB if !BCM47XX_BCMA
320 Support for BCM47XX based boards
323 bool "Broadcom BCM63XX based boards"
328 select DMA_NONCOHERENT
330 select SYS_SUPPORTS_32BIT_KERNEL
331 select SYS_SUPPORTS_BIG_ENDIAN
332 select SYS_HAS_EARLY_PRINTK
333 select SYS_HAS_CPU_BMIPS32_3300
334 select SYS_HAS_CPU_BMIPS4350
335 select SYS_HAS_CPU_BMIPS4380
338 select MIPS_L1_CACHE_SHIFT_4
339 select HAVE_LEGACY_CLK
341 Support for BCM63XX based boards
348 select DMA_NONCOHERENT
354 select PCI_GT64XXX_PCI0
355 select SYS_HAS_CPU_NEVADA
356 select SYS_HAS_EARLY_PRINTK
357 select SYS_SUPPORTS_32BIT_KERNEL
358 select SYS_SUPPORTS_64BIT_KERNEL
359 select SYS_SUPPORTS_LITTLE_ENDIAN
360 select USE_GENERIC_EARLY_PRINTK_8250
362 config MACH_DECSTATION
366 select CEVT_R4K if CPU_R4X00
368 select CSRC_R4K if CPU_R4X00
369 select CPU_DADDI_WORKAROUNDS if 64BIT
370 select CPU_R4000_WORKAROUNDS if 64BIT
371 select CPU_R4400_WORKAROUNDS if 64BIT
372 select DMA_NONCOHERENT
375 select SYS_HAS_CPU_R3000
376 select SYS_HAS_CPU_R4X00
377 select SYS_SUPPORTS_32BIT_KERNEL
378 select SYS_SUPPORTS_64BIT_KERNEL
379 select SYS_SUPPORTS_LITTLE_ENDIAN
380 select SYS_SUPPORTS_128HZ
381 select SYS_SUPPORTS_256HZ
382 select SYS_SUPPORTS_1024HZ
383 select MIPS_L1_CACHE_SHIFT_4
385 This enables support for DEC's MIPS based workstations. For details
386 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
387 DECstation porting pages on <http://decstation.unix-ag.org/>.
389 If you have one of the following DECstation Models you definitely
390 want to choose R4xx0 for the CPU Type:
397 otherwise choose R3000.
400 bool "Jazz family of machines"
403 select ARCH_MIGHT_HAVE_PC_PARPORT
404 select ARCH_MIGHT_HAVE_PC_SERIO
408 select ARCH_MAY_HAVE_PC_FDC
411 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
412 select GENERIC_ISA_DMA
413 select HAVE_PCSPKR_PLATFORM
418 select SYS_HAS_CPU_R4X00
419 select SYS_SUPPORTS_32BIT_KERNEL
420 select SYS_SUPPORTS_64BIT_KERNEL
421 select SYS_SUPPORTS_100HZ
422 select SYS_SUPPORTS_LITTLE_ENDIAN
424 This a family of machines based on the MIPS R4030 chipset which was
425 used by several vendors to build RISC/os and Windows NT workstations.
426 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
427 Olivetti M700-10 workstations.
429 config MACH_INGENIC_SOC
430 bool "Ingenic SoC based machines"
433 select SYS_SUPPORTS_ZBOOT_UART16550
434 select CPU_SUPPORTS_CPUFREQ
435 select MIPS_EXTERNAL_TIMER
438 bool "Lantiq based platforms"
439 select DMA_NONCOHERENT
443 select NO_EXCEPT_FILL
444 select SYS_HAS_CPU_MIPS32_R1
445 select SYS_HAS_CPU_MIPS32_R2
446 select SYS_SUPPORTS_BIG_ENDIAN
447 select SYS_SUPPORTS_32BIT_KERNEL
448 select SYS_SUPPORTS_MIPS16
449 select SYS_SUPPORTS_MULTITHREADING
450 select SYS_SUPPORTS_VPE_LOADER
451 select SYS_HAS_EARLY_PRINTK
455 select HAVE_LEGACY_CLK
458 select PINCTRL_LANTIQ
459 select ARCH_HAS_RESET_CONTROLLER
460 select RESET_CONTROLLER
462 config MACH_LOONGSON32
463 bool "Loongson 32-bit family of machines"
464 select SYS_SUPPORTS_ZBOOT
466 This enables support for the Loongson-1 family of machines.
468 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
469 the Institute of Computing Technology (ICT), Chinese Academy of
472 config MACH_LOONGSON2EF
473 bool "Loongson-2E/F family of machines"
474 select SYS_SUPPORTS_ZBOOT
476 This enables the support of early Loongson-2E/F family of machines.
478 config MACH_LOONGSON64
479 bool "Loongson 64-bit family of machines"
480 select ARCH_SPARSEMEM_ENABLE
481 select ARCH_MIGHT_HAVE_PC_PARPORT
482 select ARCH_MIGHT_HAVE_PC_SERIO
483 select GENERIC_ISA_DMA_SUPPORT_BROKEN
492 select NO_EXCEPT_FILL
493 select NR_CPUS_DEFAULT_64
494 select USE_GENERIC_EARLY_PRINTK_8250
495 select PCI_DRIVERS_GENERIC
496 select SYS_HAS_CPU_LOONGSON64
497 select SYS_HAS_EARLY_PRINTK
498 select SYS_SUPPORTS_SMP
499 select SYS_SUPPORTS_HOTPLUG_CPU
500 select SYS_SUPPORTS_NUMA
501 select SYS_SUPPORTS_64BIT_KERNEL
502 select SYS_SUPPORTS_HIGHMEM
503 select SYS_SUPPORTS_LITTLE_ENDIAN
504 select SYS_SUPPORTS_ZBOOT
505 select SYS_SUPPORTS_RELOCATABLE
510 select PCI_HOST_GENERIC
511 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
513 This enables the support of Loongson-2/3 family of machines.
515 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
516 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
517 and Loongson-2F which will be removed), developed by the Institute
518 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
521 bool "MIPS Malta board"
522 select ARCH_MAY_HAVE_PC_FDC
523 select ARCH_MIGHT_HAVE_PC_PARPORT
524 select ARCH_MIGHT_HAVE_PC_SERIO
529 select CLKSRC_MIPS_GIC
532 select DMA_NONCOHERENT
533 select GENERIC_ISA_DMA
534 select HAVE_PCSPKR_PLATFORM
540 select MIPS_CPU_SCACHE
542 select MIPS_L1_CACHE_SHIFT_6
544 select PCI_GT64XXX_PCI0
547 select SYS_HAS_CPU_MIPS32_R1
548 select SYS_HAS_CPU_MIPS32_R2
549 select SYS_HAS_CPU_MIPS32_R3_5
550 select SYS_HAS_CPU_MIPS32_R5
551 select SYS_HAS_CPU_MIPS32_R6
552 select SYS_HAS_CPU_MIPS64_R1
553 select SYS_HAS_CPU_MIPS64_R2
554 select SYS_HAS_CPU_MIPS64_R6
555 select SYS_HAS_CPU_NEVADA
556 select SYS_HAS_CPU_RM7000
557 select SYS_SUPPORTS_32BIT_KERNEL
558 select SYS_SUPPORTS_64BIT_KERNEL
559 select SYS_SUPPORTS_BIG_ENDIAN
560 select SYS_SUPPORTS_HIGHMEM
561 select SYS_SUPPORTS_LITTLE_ENDIAN
562 select SYS_SUPPORTS_MICROMIPS
563 select SYS_SUPPORTS_MIPS16
564 select SYS_SUPPORTS_MIPS_CPS
565 select SYS_SUPPORTS_MULTITHREADING
566 select SYS_SUPPORTS_RELOCATABLE
567 select SYS_SUPPORTS_SMARTMIPS
568 select SYS_SUPPORTS_VPE_LOADER
569 select SYS_SUPPORTS_ZBOOT
571 select WAR_ICACHE_REFILLS
572 select ZONE_DMA32 if 64BIT
574 This enables support for the MIPS Technologies Malta evaluation
578 bool "Microchip PIC32 Family"
580 This enables support for the Microchip PIC32 family of platforms.
582 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
585 config MACH_NINTENDO64
586 bool "Nintendo 64 console"
589 select SYS_HAS_CPU_R4300
590 select SYS_SUPPORTS_BIG_ENDIAN
591 select SYS_SUPPORTS_ZBOOT
592 select SYS_SUPPORTS_32BIT_KERNEL
593 select SYS_SUPPORTS_64BIT_KERNEL
594 select DMA_NONCOHERENT
598 bool "Ralink based machines"
603 select DMA_NONCOHERENT
606 select SYS_HAS_CPU_MIPS32_R2
607 select SYS_SUPPORTS_32BIT_KERNEL
608 select SYS_SUPPORTS_LITTLE_ENDIAN
609 select SYS_SUPPORTS_MIPS16
610 select SYS_SUPPORTS_ZBOOT
611 select SYS_HAS_EARLY_PRINTK
612 select ARCH_HAS_RESET_CONTROLLER
613 select RESET_CONTROLLER
615 config MACH_REALTEK_RTL
616 bool "Realtek RTL838x/RTL839x based machines"
618 select DMA_NONCOHERENT
622 select SYS_HAS_CPU_MIPS32_R1
623 select SYS_HAS_CPU_MIPS32_R2
624 select SYS_SUPPORTS_BIG_ENDIAN
625 select SYS_SUPPORTS_32BIT_KERNEL
626 select SYS_SUPPORTS_MIPS16
627 select SYS_SUPPORTS_MULTITHREADING
628 select SYS_SUPPORTS_VPE_LOADER
634 bool "SGI IP22 (Indy/Indigo2)"
639 select ARCH_MIGHT_HAVE_PC_SERIO
643 select DEFAULT_SGI_PARTITION
644 select DMA_NONCOHERENT
648 select IP22_CPU_SCACHE
650 select GENERIC_ISA_DMA_SUPPORT_BROKEN
652 select SGI_HAS_INDYDOG
658 select SYS_HAS_CPU_R4X00
659 select SYS_HAS_CPU_R5000
660 select SYS_HAS_EARLY_PRINTK
661 select SYS_SUPPORTS_32BIT_KERNEL
662 select SYS_SUPPORTS_64BIT_KERNEL
663 select SYS_SUPPORTS_BIG_ENDIAN
664 select WAR_R4600_V1_INDEX_ICACHEOP
665 select WAR_R4600_V1_HIT_CACHEOP
666 select WAR_R4600_V2_HIT_CACHEOP
667 select MIPS_L1_CACHE_SHIFT_7
669 This are the SGI Indy, Challenge S and Indigo2, as well as certain
670 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
671 that runs on these, say Y here.
674 bool "SGI IP27 (Origin200/2000)"
675 select ARCH_HAS_PHYS_TO_DMA
676 select ARCH_SPARSEMEM_ENABLE
679 select ARC_CMDLINE_ONLY
681 select DEFAULT_SGI_PARTITION
683 select SYS_HAS_EARLY_PRINTK
686 select IRQ_DOMAIN_HIERARCHY
687 select NR_CPUS_DEFAULT_64
688 select PCI_DRIVERS_GENERIC
689 select PCI_XTALK_BRIDGE
690 select SYS_HAS_CPU_R10000
691 select SYS_SUPPORTS_64BIT_KERNEL
692 select SYS_SUPPORTS_BIG_ENDIAN
693 select SYS_SUPPORTS_NUMA
694 select SYS_SUPPORTS_SMP
695 select WAR_R10000_LLSC
696 select MIPS_L1_CACHE_SHIFT_7
698 select HAVE_ARCH_NODEDATA_EXTENSION
700 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
701 workstations. To compile a Linux kernel that runs on these, say Y
705 bool "SGI IP28 (Indigo2 R10k)"
710 select ARCH_MIGHT_HAVE_PC_SERIO
714 select DEFAULT_SGI_PARTITION
715 select DMA_NONCOHERENT
716 select GENERIC_ISA_DMA_SUPPORT_BROKEN
722 select SGI_HAS_INDYDOG
728 select SYS_HAS_CPU_R10000
729 select SYS_HAS_EARLY_PRINTK
730 select SYS_SUPPORTS_64BIT_KERNEL
731 select SYS_SUPPORTS_BIG_ENDIAN
732 select WAR_R10000_LLSC
733 select MIPS_L1_CACHE_SHIFT_7
735 This is the SGI Indigo2 with R10000 processor. To compile a Linux
736 kernel that runs on these, say Y here.
739 bool "SGI IP30 (Octane/Octane2)"
740 select ARCH_HAS_PHYS_TO_DMA
747 select SYNC_R4K if SMP
751 select IRQ_DOMAIN_HIERARCHY
752 select PCI_DRIVERS_GENERIC
753 select PCI_XTALK_BRIDGE
754 select SYS_HAS_EARLY_PRINTK
755 select SYS_HAS_CPU_R10000
756 select SYS_SUPPORTS_64BIT_KERNEL
757 select SYS_SUPPORTS_BIG_ENDIAN
758 select SYS_SUPPORTS_SMP
759 select WAR_R10000_LLSC
760 select MIPS_L1_CACHE_SHIFT_7
763 These are the SGI Octane and Octane2 graphics workstations. To
764 compile a Linux kernel that runs on these, say Y here.
770 select ARCH_HAS_PHYS_TO_DMA
776 select DMA_NONCOHERENT
779 select R5000_CPU_SCACHE
780 select RM7000_CPU_SCACHE
781 select SYS_HAS_CPU_R5000
782 select SYS_HAS_CPU_R10000 if BROKEN
783 select SYS_HAS_CPU_RM7000
784 select SYS_HAS_CPU_NEVADA
785 select SYS_SUPPORTS_64BIT_KERNEL
786 select SYS_SUPPORTS_BIG_ENDIAN
787 select WAR_ICACHE_REFILLS
789 If you want this kernel to run on SGI O2 workstation, say Y here.
792 bool "Sibyte BCM91125C-CRhone"
794 select SIBYTE_BCM1125
796 select SYS_HAS_CPU_SB1
797 select SYS_SUPPORTS_BIG_ENDIAN
798 select SYS_SUPPORTS_HIGHMEM
799 select SYS_SUPPORTS_LITTLE_ENDIAN
802 bool "Sibyte BCM91125E-Rhone"
806 select SYS_HAS_CPU_SB1
807 select SYS_SUPPORTS_BIG_ENDIAN
808 select SYS_SUPPORTS_LITTLE_ENDIAN
811 bool "Sibyte BCM91250A-SWARM"
813 select HAVE_PATA_PLATFORM
816 select SYS_HAS_CPU_SB1
817 select SYS_SUPPORTS_BIG_ENDIAN
818 select SYS_SUPPORTS_HIGHMEM
819 select SYS_SUPPORTS_LITTLE_ENDIAN
820 select ZONE_DMA32 if 64BIT
821 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
823 config SIBYTE_LITTLESUR
824 bool "Sibyte BCM91250C2-LittleSur"
826 select HAVE_PATA_PLATFORM
829 select SYS_HAS_CPU_SB1
830 select SYS_SUPPORTS_BIG_ENDIAN
831 select SYS_SUPPORTS_HIGHMEM
832 select SYS_SUPPORTS_LITTLE_ENDIAN
833 select ZONE_DMA32 if 64BIT
835 config SIBYTE_SENTOSA
836 bool "Sibyte BCM91250E-Sentosa"
840 select SYS_HAS_CPU_SB1
841 select SYS_SUPPORTS_BIG_ENDIAN
842 select SYS_SUPPORTS_LITTLE_ENDIAN
843 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
846 bool "Sibyte BCM91480B-BigSur"
848 select NR_CPUS_DEFAULT_4
849 select SIBYTE_BCM1x80
851 select SYS_HAS_CPU_SB1
852 select SYS_SUPPORTS_BIG_ENDIAN
853 select SYS_SUPPORTS_HIGHMEM
854 select SYS_SUPPORTS_LITTLE_ENDIAN
855 select ZONE_DMA32 if 64BIT
856 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
859 bool "SNI RM200/300/400"
862 select FW_ARC if CPU_LITTLE_ENDIAN
863 select FW_ARC32 if CPU_LITTLE_ENDIAN
864 select FW_SNIPROM if CPU_BIG_ENDIAN
865 select ARCH_MAY_HAVE_PC_FDC
866 select ARCH_MIGHT_HAVE_PC_PARPORT
867 select ARCH_MIGHT_HAVE_PC_SERIO
871 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
872 select DMA_NONCOHERENT
873 select GENERIC_ISA_DMA
875 select HAVE_PCSPKR_PLATFORM
881 select MIPS_L1_CACHE_SHIFT_6
882 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
883 select SYS_HAS_CPU_R4X00
884 select SYS_HAS_CPU_R5000
885 select SYS_HAS_CPU_R10000
886 select R5000_CPU_SCACHE
887 select SYS_HAS_EARLY_PRINTK
888 select SYS_SUPPORTS_32BIT_KERNEL
889 select SYS_SUPPORTS_64BIT_KERNEL
890 select SYS_SUPPORTS_BIG_ENDIAN
891 select SYS_SUPPORTS_HIGHMEM
892 select SYS_SUPPORTS_LITTLE_ENDIAN
893 select WAR_R4600_V2_HIT_CACHEOP
895 The SNI RM200/300/400 are MIPS-based machines manufactured by
896 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
897 Technology and now in turn merged with Fujitsu. Say Y here to
898 support this machine type.
901 bool "Toshiba TX49 series based machines"
902 select WAR_TX49XX_ICACHE_INDEX_INV
904 config MIKROTIK_RB532
905 bool "Mikrotik RB532 boards"
908 select DMA_NONCOHERENT
911 select SYS_HAS_CPU_MIPS32_R1
912 select SYS_SUPPORTS_32BIT_KERNEL
913 select SYS_SUPPORTS_LITTLE_ENDIAN
917 select MIPS_L1_CACHE_SHIFT_4
919 Support the Mikrotik(tm) RouterBoard 532 series,
920 based on the IDT RC32434 SoC.
922 config CAVIUM_OCTEON_SOC
923 bool "Cavium Networks Octeon SoC based boards"
925 select ARCH_HAS_PHYS_TO_DMA
927 select PHYS_ADDR_T_64BIT
928 select SYS_SUPPORTS_64BIT_KERNEL
929 select SYS_SUPPORTS_BIG_ENDIAN
931 select EDAC_ATOMIC_SCRUB
932 select SYS_SUPPORTS_LITTLE_ENDIAN
933 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
934 select SYS_HAS_EARLY_PRINTK
935 select SYS_HAS_CPU_CAVIUM_OCTEON
937 select HAVE_PLAT_DELAY
938 select HAVE_PLAT_FW_INIT_CMDLINE
939 select HAVE_PLAT_MEMCPY
943 select ARCH_SPARSEMEM_ENABLE
944 select SYS_SUPPORTS_SMP
945 select NR_CPUS_DEFAULT_64
946 select MIPS_NR_CPU_NR_MAP_1024
949 select MTD_COMPLEX_MAPPINGS
951 select SYS_SUPPORTS_RELOCATABLE
953 This option supports all of the Octeon reference boards from Cavium
954 Networks. It builds a kernel that dynamically determines the Octeon
955 CPU type and supports all known board reference implementations.
956 Some of the supported boards are:
963 Say Y here for most Octeon reference boards.
967 source "arch/mips/alchemy/Kconfig"
968 source "arch/mips/ath25/Kconfig"
969 source "arch/mips/ath79/Kconfig"
970 source "arch/mips/bcm47xx/Kconfig"
971 source "arch/mips/bcm63xx/Kconfig"
972 source "arch/mips/bmips/Kconfig"
973 source "arch/mips/generic/Kconfig"
974 source "arch/mips/ingenic/Kconfig"
975 source "arch/mips/jazz/Kconfig"
976 source "arch/mips/lantiq/Kconfig"
977 source "arch/mips/pic32/Kconfig"
978 source "arch/mips/ralink/Kconfig"
979 source "arch/mips/sgi-ip27/Kconfig"
980 source "arch/mips/sibyte/Kconfig"
981 source "arch/mips/txx9/Kconfig"
982 source "arch/mips/cavium-octeon/Kconfig"
983 source "arch/mips/loongson2ef/Kconfig"
984 source "arch/mips/loongson32/Kconfig"
985 source "arch/mips/loongson64/Kconfig"
989 config GENERIC_HWEIGHT
993 config GENERIC_CALIBRATE_DELAY
997 config SCHED_OMIT_FRAME_POINTER
1002 # Select some configuration options automatically based on user selections.
1007 config ARCH_MAY_HAVE_PC_FDC
1038 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1044 config MIPS_CLOCK_VSYSCALL
1045 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1054 config ARCH_SUPPORTS_UPROBES
1057 config DMA_NONCOHERENT
1060 # MIPS allows mixing "slightly different" Cacheability and Coherency
1061 # Attribute bits. It is believed that the uncached access through
1062 # KSEG1 and the implementation specific "uncached accelerated" used
1063 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1064 # significant advantages.
1066 select ARCH_HAS_SETUP_DMA_OPS
1067 select ARCH_HAS_DMA_WRITE_COMBINE
1068 select ARCH_HAS_DMA_PREP_COHERENT
1069 select ARCH_HAS_SYNC_DMA_FOR_CPU
1070 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1071 select ARCH_HAS_DMA_SET_UNCACHED
1072 select DMA_NONCOHERENT_MMAP
1073 select NEED_DMA_MAP_STATE
1075 config SYS_HAS_EARLY_PRINTK
1078 config SYS_SUPPORTS_HOTPLUG_CPU
1081 config MIPS_BONITO64
1090 config NO_IOPORT_MAP
1094 def_bool CPU_NO_LOAD_STORE_LR
1096 config GENERIC_ISA_DMA
1098 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1101 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1103 select GENERIC_ISA_DMA
1105 config HAVE_PLAT_DELAY
1108 config HAVE_PLAT_FW_INIT_CMDLINE
1111 config HAVE_PLAT_MEMCPY
1117 config SYS_SUPPORTS_RELOCATABLE
1120 Selected if the platform supports relocating the kernel.
1121 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1122 to allow access to command line and entropy sources.
1125 # Endianness selection. Sufficiently obscure so many users don't know what to
1126 # answer,so we try hard to limit the available choices. Also the use of a
1127 # choice statement should be more obvious to the user.
1130 prompt "Endianness selection"
1132 Some MIPS machines can be configured for either little or big endian
1133 byte order. These modes require different kernels and a different
1134 Linux distribution. In general there is one preferred byteorder for a
1135 particular system but some systems are just as commonly used in the
1136 one or the other endianness.
1138 config CPU_BIG_ENDIAN
1140 depends on SYS_SUPPORTS_BIG_ENDIAN
1142 config CPU_LITTLE_ENDIAN
1143 bool "Little endian"
1144 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1151 config SYS_SUPPORTS_APM_EMULATION
1154 config SYS_SUPPORTS_BIG_ENDIAN
1157 config SYS_SUPPORTS_LITTLE_ENDIAN
1160 config MIPS_HUGE_TLB_SUPPORT
1161 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1169 config PCI_GT64XXX_PCI0
1172 config PCI_XTALK_BRIDGE
1175 config NO_EXCEPT_FILL
1181 config SWAP_IO_SPACE
1184 config SGI_HAS_INDYDOG
1196 config SGI_HAS_ZILOG
1199 config SGI_HAS_I8042
1202 config DEFAULT_SGI_PARTITION
1214 config MIPS_L1_CACHE_SHIFT_4
1217 config MIPS_L1_CACHE_SHIFT_5
1220 config MIPS_L1_CACHE_SHIFT_6
1223 config MIPS_L1_CACHE_SHIFT_7
1226 config MIPS_L1_CACHE_SHIFT
1228 default "7" if MIPS_L1_CACHE_SHIFT_7
1229 default "6" if MIPS_L1_CACHE_SHIFT_6
1230 default "5" if MIPS_L1_CACHE_SHIFT_5
1231 default "4" if MIPS_L1_CACHE_SHIFT_4
1234 config ARC_CMDLINE_ONLY
1238 bool "ARC console support"
1239 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1253 menu "CPU selection"
1259 config CPU_LOONGSON64
1260 bool "Loongson 64-bit CPU"
1261 depends on SYS_HAS_CPU_LOONGSON64
1262 select ARCH_HAS_PHYS_TO_DMA
1264 select CPU_HAS_PREFETCH
1265 select CPU_SUPPORTS_64BIT_KERNEL
1266 select CPU_SUPPORTS_HIGHMEM
1267 select CPU_SUPPORTS_HUGEPAGES
1268 select CPU_SUPPORTS_MSA
1269 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1270 select CPU_MIPSR2_IRQ_VI
1271 select WEAK_ORDERING
1272 select WEAK_REORDERING_BEYOND_LLSC
1273 select MIPS_ASID_BITS_VARIABLE
1274 select MIPS_PGD_C0_CONTEXT
1275 select MIPS_L1_CACHE_SHIFT_6
1276 select MIPS_FP_SUPPORT
1281 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1282 cores implements the MIPS64R2 instruction set with many extensions,
1283 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1284 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1285 Loongson-2E/2F is not covered here and will be removed in future.
1287 config LOONGSON3_ENHANCEMENT
1288 bool "New Loongson-3 CPU Enhancements"
1290 depends on CPU_LOONGSON64
1292 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1293 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1294 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1295 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1296 Fast TLB refill support, etc.
1298 This option enable those enhancements which are not probed at run
1299 time. If you want a generic kernel to run on all Loongson 3 machines,
1300 please say 'N' here. If you want a high-performance kernel to run on
1301 new Loongson-3 machines only, please say 'Y' here.
1303 config CPU_LOONGSON3_WORKAROUNDS
1304 bool "Loongson-3 LLSC Workarounds"
1306 depends on CPU_LOONGSON64
1308 Loongson-3 processors have the llsc issues which require workarounds.
1309 Without workarounds the system may hang unexpectedly.
1311 Say Y, unless you know what you are doing.
1313 config CPU_LOONGSON3_CPUCFG_EMULATION
1314 bool "Emulate the CPUCFG instruction on older Loongson cores"
1316 depends on CPU_LOONGSON64
1318 Loongson-3A R4 and newer have the CPUCFG instruction available for
1319 userland to query CPU capabilities, much like CPUID on x86. This
1320 option provides emulation of the instruction on older Loongson
1321 cores, back to Loongson-3A1000.
1323 If unsure, please say Y.
1325 config CPU_LOONGSON2E
1327 depends on SYS_HAS_CPU_LOONGSON2E
1328 select CPU_LOONGSON2EF
1330 The Loongson 2E processor implements the MIPS III instruction set
1331 with many extensions.
1333 It has an internal FPGA northbridge, which is compatible to
1336 config CPU_LOONGSON2F
1338 depends on SYS_HAS_CPU_LOONGSON2F
1339 select CPU_LOONGSON2EF
1341 The Loongson 2F processor implements the MIPS III instruction set
1342 with many extensions.
1344 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1345 have a similar programming interface with FPGA northbridge used in
1348 config CPU_LOONGSON1B
1350 depends on SYS_HAS_CPU_LOONGSON1B
1351 select CPU_LOONGSON32
1352 select LEDS_GPIO_REGISTER
1354 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1355 Release 1 instruction set and part of the MIPS32 Release 2
1358 config CPU_LOONGSON1C
1360 depends on SYS_HAS_CPU_LOONGSON1C
1361 select CPU_LOONGSON32
1362 select LEDS_GPIO_REGISTER
1364 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1365 Release 1 instruction set and part of the MIPS32 Release 2
1368 config CPU_MIPS32_R1
1369 bool "MIPS32 Release 1"
1370 depends on SYS_HAS_CPU_MIPS32_R1
1371 select CPU_HAS_PREFETCH
1372 select CPU_SUPPORTS_32BIT_KERNEL
1373 select CPU_SUPPORTS_HIGHMEM
1375 Choose this option to build a kernel for release 1 or later of the
1376 MIPS32 architecture. Most modern embedded systems with a 32-bit
1377 MIPS processor are based on a MIPS32 processor. If you know the
1378 specific type of processor in your system, choose those that one
1379 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1380 Release 2 of the MIPS32 architecture is available since several
1381 years so chances are you even have a MIPS32 Release 2 processor
1382 in which case you should choose CPU_MIPS32_R2 instead for better
1385 config CPU_MIPS32_R2
1386 bool "MIPS32 Release 2"
1387 depends on SYS_HAS_CPU_MIPS32_R2
1388 select CPU_HAS_PREFETCH
1389 select CPU_SUPPORTS_32BIT_KERNEL
1390 select CPU_SUPPORTS_HIGHMEM
1391 select CPU_SUPPORTS_MSA
1394 Choose this option to build a kernel for release 2 or later of the
1395 MIPS32 architecture. Most modern embedded systems with a 32-bit
1396 MIPS processor are based on a MIPS32 processor. If you know the
1397 specific type of processor in your system, choose those that one
1398 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1400 config CPU_MIPS32_R5
1401 bool "MIPS32 Release 5"
1402 depends on SYS_HAS_CPU_MIPS32_R5
1403 select CPU_HAS_PREFETCH
1404 select CPU_SUPPORTS_32BIT_KERNEL
1405 select CPU_SUPPORTS_HIGHMEM
1406 select CPU_SUPPORTS_MSA
1408 select MIPS_O32_FP64_SUPPORT
1410 Choose this option to build a kernel for release 5 or later of the
1411 MIPS32 architecture. New MIPS processors, starting with the Warrior
1412 family, are based on a MIPS32r5 processor. If you own an older
1413 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1415 config CPU_MIPS32_R6
1416 bool "MIPS32 Release 6"
1417 depends on SYS_HAS_CPU_MIPS32_R6
1418 select CPU_HAS_PREFETCH
1419 select CPU_NO_LOAD_STORE_LR
1420 select CPU_SUPPORTS_32BIT_KERNEL
1421 select CPU_SUPPORTS_HIGHMEM
1422 select CPU_SUPPORTS_MSA
1424 select MIPS_O32_FP64_SUPPORT
1426 Choose this option to build a kernel for release 6 or later of the
1427 MIPS32 architecture. New MIPS processors, starting with the Warrior
1428 family, are based on a MIPS32r6 processor. If you own an older
1429 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1431 config CPU_MIPS64_R1
1432 bool "MIPS64 Release 1"
1433 depends on SYS_HAS_CPU_MIPS64_R1
1434 select CPU_HAS_PREFETCH
1435 select CPU_SUPPORTS_32BIT_KERNEL
1436 select CPU_SUPPORTS_64BIT_KERNEL
1437 select CPU_SUPPORTS_HIGHMEM
1438 select CPU_SUPPORTS_HUGEPAGES
1440 Choose this option to build a kernel for release 1 or later of the
1441 MIPS64 architecture. Many modern embedded systems with a 64-bit
1442 MIPS processor are based on a MIPS64 processor. If you know the
1443 specific type of processor in your system, choose those that one
1444 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1445 Release 2 of the MIPS64 architecture is available since several
1446 years so chances are you even have a MIPS64 Release 2 processor
1447 in which case you should choose CPU_MIPS64_R2 instead for better
1450 config CPU_MIPS64_R2
1451 bool "MIPS64 Release 2"
1452 depends on SYS_HAS_CPU_MIPS64_R2
1453 select CPU_HAS_PREFETCH
1454 select CPU_SUPPORTS_32BIT_KERNEL
1455 select CPU_SUPPORTS_64BIT_KERNEL
1456 select CPU_SUPPORTS_HIGHMEM
1457 select CPU_SUPPORTS_HUGEPAGES
1458 select CPU_SUPPORTS_MSA
1461 Choose this option to build a kernel for release 2 or later of the
1462 MIPS64 architecture. Many modern embedded systems with a 64-bit
1463 MIPS processor are based on a MIPS64 processor. If you know the
1464 specific type of processor in your system, choose those that one
1465 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1467 config CPU_MIPS64_R5
1468 bool "MIPS64 Release 5"
1469 depends on SYS_HAS_CPU_MIPS64_R5
1470 select CPU_HAS_PREFETCH
1471 select CPU_SUPPORTS_32BIT_KERNEL
1472 select CPU_SUPPORTS_64BIT_KERNEL
1473 select CPU_SUPPORTS_HIGHMEM
1474 select CPU_SUPPORTS_HUGEPAGES
1475 select CPU_SUPPORTS_MSA
1476 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1479 Choose this option to build a kernel for release 5 or later of the
1480 MIPS64 architecture. This is a intermediate MIPS architecture
1481 release partly implementing release 6 features. Though there is no
1482 any hardware known to be based on this release.
1484 config CPU_MIPS64_R6
1485 bool "MIPS64 Release 6"
1486 depends on SYS_HAS_CPU_MIPS64_R6
1487 select CPU_HAS_PREFETCH
1488 select CPU_NO_LOAD_STORE_LR
1489 select CPU_SUPPORTS_32BIT_KERNEL
1490 select CPU_SUPPORTS_64BIT_KERNEL
1491 select CPU_SUPPORTS_HIGHMEM
1492 select CPU_SUPPORTS_HUGEPAGES
1493 select CPU_SUPPORTS_MSA
1494 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1497 Choose this option to build a kernel for release 6 or later of the
1498 MIPS64 architecture. New MIPS processors, starting with the Warrior
1499 family, are based on a MIPS64r6 processor. If you own an older
1500 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1503 bool "MIPS Warrior P5600"
1504 depends on SYS_HAS_CPU_P5600
1505 select CPU_HAS_PREFETCH
1506 select CPU_SUPPORTS_32BIT_KERNEL
1507 select CPU_SUPPORTS_HIGHMEM
1508 select CPU_SUPPORTS_MSA
1509 select CPU_SUPPORTS_CPUFREQ
1510 select CPU_MIPSR2_IRQ_VI
1511 select CPU_MIPSR2_IRQ_EI
1513 select MIPS_O32_FP64_SUPPORT
1515 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1516 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1517 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1518 level features like up to six P5600 calculation cores, CM2 with L2
1519 cache, IOCU/IOMMU (though might be unused depending on the system-
1520 specific IP core configuration), GIC, CPC, virtualisation module,
1525 depends on SYS_HAS_CPU_R3000
1528 select CPU_SUPPORTS_32BIT_KERNEL
1529 select CPU_SUPPORTS_HIGHMEM
1531 Please make sure to pick the right CPU type. Linux/MIPS is not
1532 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1533 *not* work on R4000 machines and vice versa. However, since most
1534 of the supported machines have an R4000 (or similar) CPU, R4x00
1535 might be a safe bet. If the resulting kernel does not work,
1536 try to recompile with R3000.
1540 depends on SYS_HAS_CPU_R4300
1541 select CPU_SUPPORTS_32BIT_KERNEL
1542 select CPU_SUPPORTS_64BIT_KERNEL
1544 MIPS Technologies R4300-series processors.
1548 depends on SYS_HAS_CPU_R4X00
1549 select CPU_SUPPORTS_32BIT_KERNEL
1550 select CPU_SUPPORTS_64BIT_KERNEL
1551 select CPU_SUPPORTS_HUGEPAGES
1553 MIPS Technologies R4000-series processors other than 4300, including
1554 the R4000, R4400, R4600, and 4700.
1558 depends on SYS_HAS_CPU_TX49XX
1559 select CPU_HAS_PREFETCH
1560 select CPU_SUPPORTS_32BIT_KERNEL
1561 select CPU_SUPPORTS_64BIT_KERNEL
1562 select CPU_SUPPORTS_HUGEPAGES
1566 depends on SYS_HAS_CPU_R5000
1567 select CPU_SUPPORTS_32BIT_KERNEL
1568 select CPU_SUPPORTS_64BIT_KERNEL
1569 select CPU_SUPPORTS_HUGEPAGES
1571 MIPS Technologies R5000-series processors other than the Nevada.
1575 depends on SYS_HAS_CPU_R5500
1576 select CPU_SUPPORTS_32BIT_KERNEL
1577 select CPU_SUPPORTS_64BIT_KERNEL
1578 select CPU_SUPPORTS_HUGEPAGES
1580 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1585 depends on SYS_HAS_CPU_NEVADA
1586 select CPU_SUPPORTS_32BIT_KERNEL
1587 select CPU_SUPPORTS_64BIT_KERNEL
1588 select CPU_SUPPORTS_HUGEPAGES
1590 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1594 depends on SYS_HAS_CPU_R10000
1595 select CPU_HAS_PREFETCH
1596 select CPU_SUPPORTS_32BIT_KERNEL
1597 select CPU_SUPPORTS_64BIT_KERNEL
1598 select CPU_SUPPORTS_HIGHMEM
1599 select CPU_SUPPORTS_HUGEPAGES
1601 MIPS Technologies R10000-series processors.
1605 depends on SYS_HAS_CPU_RM7000
1606 select CPU_HAS_PREFETCH
1607 select CPU_SUPPORTS_32BIT_KERNEL
1608 select CPU_SUPPORTS_64BIT_KERNEL
1609 select CPU_SUPPORTS_HIGHMEM
1610 select CPU_SUPPORTS_HUGEPAGES
1614 depends on SYS_HAS_CPU_SB1
1615 select CPU_SUPPORTS_32BIT_KERNEL
1616 select CPU_SUPPORTS_64BIT_KERNEL
1617 select CPU_SUPPORTS_HIGHMEM
1618 select CPU_SUPPORTS_HUGEPAGES
1619 select WEAK_ORDERING
1621 config CPU_CAVIUM_OCTEON
1622 bool "Cavium Octeon processor"
1623 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1624 select CPU_HAS_PREFETCH
1625 select CPU_SUPPORTS_64BIT_KERNEL
1626 select WEAK_ORDERING
1627 select CPU_SUPPORTS_HIGHMEM
1628 select CPU_SUPPORTS_HUGEPAGES
1629 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1630 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1631 select MIPS_L1_CACHE_SHIFT_7
1634 The Cavium Octeon processor is a highly integrated chip containing
1635 many ethernet hardware widgets for networking tasks. The processor
1636 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1637 Full details can be found at http://www.caviumnetworks.com.
1640 bool "Broadcom BMIPS"
1641 depends on SYS_HAS_CPU_BMIPS
1643 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1644 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1645 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1646 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1647 select CPU_SUPPORTS_32BIT_KERNEL
1648 select DMA_NONCOHERENT
1650 select SWAP_IO_SPACE
1651 select WEAK_ORDERING
1652 select CPU_SUPPORTS_HIGHMEM
1653 select CPU_HAS_PREFETCH
1654 select CPU_SUPPORTS_CPUFREQ
1655 select MIPS_EXTERNAL_TIMER
1656 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1658 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1662 config CPU_MIPS32_3_5_FEATURES
1663 bool "MIPS32 Release 3.5 Features"
1664 depends on SYS_HAS_CPU_MIPS32_R3_5
1665 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1668 Choose this option to build a kernel for release 2 or later of the
1669 MIPS32 architecture including features from the 3.5 release such as
1670 support for Enhanced Virtual Addressing (EVA).
1672 config CPU_MIPS32_3_5_EVA
1673 bool "Enhanced Virtual Addressing (EVA)"
1674 depends on CPU_MIPS32_3_5_FEATURES
1678 Choose this option if you want to enable the Enhanced Virtual
1679 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1680 One of its primary benefits is an increase in the maximum size
1681 of lowmem (up to 3GB). If unsure, say 'N' here.
1683 config CPU_MIPS32_R5_FEATURES
1684 bool "MIPS32 Release 5 Features"
1685 depends on SYS_HAS_CPU_MIPS32_R5
1686 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1688 Choose this option to build a kernel for release 2 or later of the
1689 MIPS32 architecture including features from release 5 such as
1690 support for Extended Physical Addressing (XPA).
1692 config CPU_MIPS32_R5_XPA
1693 bool "Extended Physical Addressing (XPA)"
1694 depends on CPU_MIPS32_R5_FEATURES
1696 depends on !PAGE_SIZE_4KB
1697 depends on SYS_SUPPORTS_HIGHMEM
1700 select PHYS_ADDR_T_64BIT
1703 Choose this option if you want to enable the Extended Physical
1704 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1705 benefit is to increase physical addressing equal to or greater
1706 than 40 bits. Note that this has the side effect of turning on
1707 64-bit addressing which in turn makes the PTEs 64-bit in size.
1708 If unsure, say 'N' here.
1711 config CPU_NOP_WORKAROUNDS
1714 config CPU_JUMP_WORKAROUNDS
1717 config CPU_LOONGSON2F_WORKAROUNDS
1718 bool "Loongson 2F Workarounds"
1720 select CPU_NOP_WORKAROUNDS
1721 select CPU_JUMP_WORKAROUNDS
1723 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1724 require workarounds. Without workarounds the system may hang
1725 unexpectedly. For more information please refer to the gas
1726 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1728 Loongson 2F03 and later have fixed these issues and no workarounds
1729 are needed. The workarounds have no significant side effect on them
1730 but may decrease the performance of the system so this option should
1731 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1734 If unsure, please say Y.
1735 endif # CPU_LOONGSON2F
1737 config SYS_SUPPORTS_ZBOOT
1739 select HAVE_KERNEL_GZIP
1740 select HAVE_KERNEL_BZIP2
1741 select HAVE_KERNEL_LZ4
1742 select HAVE_KERNEL_LZMA
1743 select HAVE_KERNEL_LZO
1744 select HAVE_KERNEL_XZ
1745 select HAVE_KERNEL_ZSTD
1747 config SYS_SUPPORTS_ZBOOT_UART16550
1749 select SYS_SUPPORTS_ZBOOT
1751 config SYS_SUPPORTS_ZBOOT_UART_PROM
1753 select SYS_SUPPORTS_ZBOOT
1755 config CPU_LOONGSON2EF
1757 select CPU_SUPPORTS_32BIT_KERNEL
1758 select CPU_SUPPORTS_64BIT_KERNEL
1759 select CPU_SUPPORTS_HIGHMEM
1760 select CPU_SUPPORTS_HUGEPAGES
1762 config CPU_LOONGSON32
1766 select CPU_HAS_PREFETCH
1767 select CPU_SUPPORTS_32BIT_KERNEL
1768 select CPU_SUPPORTS_HIGHMEM
1769 select CPU_SUPPORTS_CPUFREQ
1771 config CPU_BMIPS32_3300
1772 select SMP_UP if SMP
1775 config CPU_BMIPS4350
1777 select SYS_SUPPORTS_SMP
1778 select SYS_SUPPORTS_HOTPLUG_CPU
1780 config CPU_BMIPS4380
1782 select MIPS_L1_CACHE_SHIFT_6
1783 select SYS_SUPPORTS_SMP
1784 select SYS_SUPPORTS_HOTPLUG_CPU
1787 config CPU_BMIPS5000
1789 select MIPS_CPU_SCACHE
1790 select MIPS_L1_CACHE_SHIFT_7
1791 select SYS_SUPPORTS_SMP
1792 select SYS_SUPPORTS_HOTPLUG_CPU
1795 config SYS_HAS_CPU_LOONGSON64
1797 select CPU_SUPPORTS_CPUFREQ
1800 config SYS_HAS_CPU_LOONGSON2E
1803 config SYS_HAS_CPU_LOONGSON2F
1805 select CPU_SUPPORTS_CPUFREQ
1806 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1808 config SYS_HAS_CPU_LOONGSON1B
1811 config SYS_HAS_CPU_LOONGSON1C
1814 config SYS_HAS_CPU_MIPS32_R1
1817 config SYS_HAS_CPU_MIPS32_R2
1820 config SYS_HAS_CPU_MIPS32_R3_5
1823 config SYS_HAS_CPU_MIPS32_R5
1826 config SYS_HAS_CPU_MIPS32_R6
1829 config SYS_HAS_CPU_MIPS64_R1
1832 config SYS_HAS_CPU_MIPS64_R2
1835 config SYS_HAS_CPU_MIPS64_R5
1838 config SYS_HAS_CPU_MIPS64_R6
1841 config SYS_HAS_CPU_P5600
1844 config SYS_HAS_CPU_R3000
1847 config SYS_HAS_CPU_R4300
1850 config SYS_HAS_CPU_R4X00
1853 config SYS_HAS_CPU_TX49XX
1856 config SYS_HAS_CPU_R5000
1859 config SYS_HAS_CPU_R5500
1862 config SYS_HAS_CPU_NEVADA
1865 config SYS_HAS_CPU_R10000
1868 config SYS_HAS_CPU_RM7000
1871 config SYS_HAS_CPU_SB1
1874 config SYS_HAS_CPU_CAVIUM_OCTEON
1877 config SYS_HAS_CPU_BMIPS
1880 config SYS_HAS_CPU_BMIPS32_3300
1882 select SYS_HAS_CPU_BMIPS
1884 config SYS_HAS_CPU_BMIPS4350
1886 select SYS_HAS_CPU_BMIPS
1888 config SYS_HAS_CPU_BMIPS4380
1890 select SYS_HAS_CPU_BMIPS
1892 config SYS_HAS_CPU_BMIPS5000
1894 select SYS_HAS_CPU_BMIPS
1897 # CPU may reorder R->R, R->W, W->R, W->W
1898 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1900 config WEAK_ORDERING
1904 # CPU may reorder reads and writes beyond LL/SC
1905 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1907 config WEAK_REORDERING_BEYOND_LLSC
1912 # These two indicate any level of the MIPS32 and MIPS64 architecture
1916 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1917 CPU_MIPS32_R6 || CPU_P5600
1921 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1922 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1925 # These indicate the revision of the architecture
1929 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1933 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1935 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1940 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1942 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1947 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1949 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1950 select HAVE_ARCH_BITREVERSE
1951 select MIPS_ASID_BITS_VARIABLE
1952 select MIPS_CRC_SUPPORT
1955 config TARGET_ISA_REV
1957 default 1 if CPU_MIPSR1
1958 default 2 if CPU_MIPSR2
1959 default 5 if CPU_MIPSR5
1960 default 6 if CPU_MIPSR6
1963 Reflects the ISA revision being targeted by the kernel build. This
1964 is effectively the Kconfig equivalent of MIPS_ISA_REV.
1972 config SYS_SUPPORTS_32BIT_KERNEL
1974 config SYS_SUPPORTS_64BIT_KERNEL
1976 config CPU_SUPPORTS_32BIT_KERNEL
1978 config CPU_SUPPORTS_64BIT_KERNEL
1980 config CPU_SUPPORTS_CPUFREQ
1982 config CPU_SUPPORTS_ADDRWINCFG
1984 config CPU_SUPPORTS_HUGEPAGES
1986 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
1987 config MIPS_PGD_C0_CONTEXT
1990 default y if (CPU_MIPSR2 || CPU_MIPSR6)
1993 # Set to y for ptrace access to watch registers.
1995 config HARDWARE_WATCHPOINTS
1997 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2002 prompt "Kernel code model"
2004 You should only select this option if you have a workload that
2005 actually benefits from 64-bit processing or if your machine has
2006 large memory. You will only be presented a single option in this
2007 menu if your system does not support both 32-bit and 64-bit kernels.
2010 bool "32-bit kernel"
2011 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2014 Select this option if you want to build a 32-bit kernel.
2017 bool "64-bit kernel"
2018 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2020 Select this option if you want to build a 64-bit kernel.
2024 config MIPS_VA_BITS_48
2025 bool "48 bits virtual memory"
2028 Support a maximum at least 48 bits of application virtual
2029 memory. Default is 40 bits or less, depending on the CPU.
2030 For page sizes 16k and above, this option results in a small
2031 memory overhead for page tables. For 4k page size, a fourth
2032 level of page tables is added which imposes both a memory
2033 overhead as well as slower TLB fault handling.
2037 config ZBOOT_LOAD_ADDRESS
2038 hex "Compressed kernel load address"
2039 default 0xffffffff80400000 if BCM47XX
2041 depends on SYS_SUPPORTS_ZBOOT
2043 The address to load compressed kernel, aka vmlinuz.
2045 This is only used if non-zero.
2048 prompt "Kernel page size"
2049 default PAGE_SIZE_4KB
2051 config PAGE_SIZE_4KB
2053 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2055 This option select the standard 4kB Linux page size. On some
2056 R3000-family processors this is the only available page size. Using
2057 4kB page size will minimize memory consumption and is therefore
2058 recommended for low memory systems.
2060 config PAGE_SIZE_8KB
2062 depends on CPU_CAVIUM_OCTEON
2063 depends on !MIPS_VA_BITS_48
2065 Using 8kB page size will result in higher performance kernel at
2066 the price of higher memory consumption. This option is available
2067 only on cnMIPS processors. Note that you will need a suitable Linux
2068 distribution to support this.
2070 config PAGE_SIZE_16KB
2072 depends on !CPU_R3000
2074 Using 16kB page size will result in higher performance kernel at
2075 the price of higher memory consumption. This option is available on
2076 all non-R3000 family processors. Note that you will need a suitable
2077 Linux distribution to support this.
2079 config PAGE_SIZE_32KB
2081 depends on CPU_CAVIUM_OCTEON
2082 depends on !MIPS_VA_BITS_48
2084 Using 32kB page size will result in higher performance kernel at
2085 the price of higher memory consumption. This option is available
2086 only on cnMIPS cores. Note that you will need a suitable Linux
2087 distribution to support this.
2089 config PAGE_SIZE_64KB
2091 depends on !CPU_R3000
2093 Using 64kB page size will result in higher performance kernel at
2094 the price of higher memory consumption. This option is available on
2095 all non-R3000 family processor. Not that at the time of this
2096 writing this option is still high experimental.
2100 config ARCH_FORCE_MAX_ORDER
2101 int "Maximum zone order"
2102 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2103 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2104 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2107 The kernel memory allocator divides physically contiguous memory
2108 blocks into "zones", where each zone is a power of two number of
2109 pages. This option selects the largest power of two that the kernel
2110 keeps in the memory allocator. If you need to allocate very large
2111 blocks of physically contiguous memory, then you may need to
2112 increase this value.
2114 The page size is not necessarily 4KB. Keep this in mind
2115 when choosing a value for this option.
2120 config IP22_CPU_SCACHE
2125 # Support for a MIPS32 / MIPS64 style S-caches
2127 config MIPS_CPU_SCACHE
2131 config R5000_CPU_SCACHE
2135 config RM7000_CPU_SCACHE
2139 config SIBYTE_DMA_PAGEOPS
2140 bool "Use DMA to clear/copy pages"
2143 Instead of using the CPU to zero and copy pages, use a Data Mover
2144 channel. These DMA channels are otherwise unused by the standard
2145 SiByte Linux port. Seems to give a small performance benefit.
2147 config CPU_HAS_PREFETCH
2150 config CPU_GENERIC_DUMP_TLB
2152 default y if !CPU_R3000
2154 config MIPS_FP_SUPPORT
2155 bool "Floating Point support" if EXPERT
2158 Select y to include support for floating point in the kernel
2159 including initialization of FPU hardware, FP context save & restore
2160 and emulation of an FPU where necessary. Without this support any
2161 userland program attempting to use floating point instructions will
2164 If you know that your userland will not attempt to use floating point
2165 instructions then you can say n here to shrink the kernel a little.
2169 config CPU_R2300_FPU
2171 depends on MIPS_FP_SUPPORT
2172 default y if CPU_R3000
2179 depends on MIPS_FP_SUPPORT
2180 default y if !CPU_R2300_FPU
2182 config CPU_R4K_CACHE_TLB
2184 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2187 bool "MIPS MT SMP support (1 TC on each available VPE)"
2189 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2190 select CPU_MIPSR2_IRQ_VI
2191 select CPU_MIPSR2_IRQ_EI
2196 select SYS_SUPPORTS_SMP
2197 select SYS_SUPPORTS_SCHED_SMT
2198 select MIPS_PERF_SHARED_TC_COUNTERS
2200 This is a kernel model which is known as SMVP. This is supported
2201 on cores with the MT ASE and uses the available VPEs to implement
2202 virtual processors which supports SMP. This is equivalent to the
2203 Intel Hyperthreading feature. For further information go to
2204 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2210 bool "SMT (multithreading) scheduler support"
2211 depends on SYS_SUPPORTS_SCHED_SMT
2214 SMT scheduler support improves the CPU scheduler's decision making
2215 when dealing with MIPS MT enabled cores at a cost of slightly
2216 increased overhead in some places. If unsure say N here.
2218 config SYS_SUPPORTS_SCHED_SMT
2221 config SYS_SUPPORTS_MULTITHREADING
2224 config MIPS_MT_FPAFF
2225 bool "Dynamic FPU affinity for FP-intensive threads"
2227 depends on MIPS_MT_SMP
2229 config MIPSR2_TO_R6_EMULATOR
2230 bool "MIPS R2-to-R6 emulator"
2231 depends on CPU_MIPSR6
2232 depends on MIPS_FP_SUPPORT
2235 Choose this option if you want to run non-R6 MIPS userland code.
2236 Even if you say 'Y' here, the emulator will still be disabled by
2237 default. You can enable it using the 'mipsr2emu' kernel option.
2238 The only reason this is a build-time option is to save ~14K from the
2241 config SYS_SUPPORTS_VPE_LOADER
2243 depends on SYS_SUPPORTS_MULTITHREADING
2245 Indicates that the platform supports the VPE loader, and provides
2248 config MIPS_VPE_LOADER
2249 bool "VPE loader support."
2250 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2251 select CPU_MIPSR2_IRQ_VI
2252 select CPU_MIPSR2_IRQ_EI
2255 Includes a loader for loading an elf relocatable object
2256 onto another VPE and running it.
2258 config MIPS_VPE_LOADER_MT
2261 depends on MIPS_VPE_LOADER
2263 config MIPS_VPE_LOADER_TOM
2264 bool "Load VPE program into memory hidden from linux"
2265 depends on MIPS_VPE_LOADER
2268 The loader can use memory that is present but has been hidden from
2269 Linux using the kernel command line option "mem=xxMB". It's up to
2270 you to ensure the amount you put in the option and the space your
2271 program requires is less or equal to the amount physically present.
2273 config MIPS_VPE_APSP_API
2274 bool "Enable support for AP/SP API (RTLX)"
2275 depends on MIPS_VPE_LOADER
2277 config MIPS_VPE_APSP_API_MT
2280 depends on MIPS_VPE_APSP_API
2283 bool "MIPS Coherent Processing System support"
2284 depends on SYS_SUPPORTS_MIPS_CPS
2286 select MIPS_CPS_PM if HOTPLUG_CPU
2288 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2289 select SYS_SUPPORTS_HOTPLUG_CPU
2290 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2291 select SYS_SUPPORTS_SMP
2292 select WEAK_ORDERING
2293 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2295 Select this if you wish to run an SMP kernel across multiple cores
2296 within a MIPS Coherent Processing System. When this option is
2297 enabled the kernel will probe for other cores and boot them with
2298 no external assistance. It is safe to enable this when hardware
2299 support is unavailable.
2312 config SB1_PASS_2_WORKAROUNDS
2314 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2317 config SB1_PASS_2_1_WORKAROUNDS
2319 depends on CPU_SB1 && CPU_SB1_PASS_2
2323 prompt "SmartMIPS or microMIPS ASE support"
2325 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2328 Select this if you want neither microMIPS nor SmartMIPS support
2330 config CPU_HAS_SMARTMIPS
2331 depends on SYS_SUPPORTS_SMARTMIPS
2334 SmartMIPS is a extension of the MIPS32 architecture aimed at
2335 increased security at both hardware and software level for
2336 smartcards. Enabling this option will allow proper use of the
2337 SmartMIPS instructions by Linux applications. However a kernel with
2338 this option will not work on a MIPS core without SmartMIPS core. If
2339 you don't know you probably don't have SmartMIPS and should say N
2342 config CPU_MICROMIPS
2343 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2346 When this option is enabled the kernel will be built using the
2352 bool "Support for the MIPS SIMD Architecture"
2353 depends on CPU_SUPPORTS_MSA
2354 depends on MIPS_FP_SUPPORT
2355 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2357 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2358 and a set of SIMD instructions to operate on them. When this option
2359 is enabled the kernel will support allocating & switching MSA
2360 vector register contexts. If you know that your kernel will only be
2361 running on CPUs which do not support MSA or that your userland will
2362 not be making use of it then you may wish to say N here to reduce
2363 the size & complexity of your kernel.
2374 depends on !CPU_DIEI_BROKEN
2377 config CPU_DIEI_BROKEN
2383 config CPU_NO_LOAD_STORE_LR
2386 CPU lacks support for unaligned load and store instructions:
2387 LWL, LWR, SWL, SWR (Load/store word left/right).
2388 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2392 # Vectored interrupt mode is an R2 feature
2394 config CPU_MIPSR2_IRQ_VI
2398 # Extended interrupt mode is an R2 feature
2400 config CPU_MIPSR2_IRQ_EI
2405 depends on !CPU_R3000
2412 # Work around the "daddi" and "daddiu" CPU errata:
2414 # - The `daddi' instruction fails to trap on overflow.
2415 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2418 # - The `daddiu' instruction can produce an incorrect result.
2419 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2421 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2423 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2424 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2425 config CPU_DADDI_WORKAROUNDS
2428 # Work around certain R4000 CPU errata (as implemented by GCC):
2430 # - A double-word or a variable shift may give an incorrect result
2431 # if executed immediately after starting an integer division:
2432 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2434 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2437 # - A double-word or a variable shift may give an incorrect result
2438 # if executed while an integer multiplication is in progress:
2439 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2442 # - An integer division may give an incorrect result if started in
2443 # a delay slot of a taken branch or a jump:
2444 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2446 config CPU_R4000_WORKAROUNDS
2448 select CPU_R4400_WORKAROUNDS
2450 # Work around certain R4400 CPU errata (as implemented by GCC):
2452 # - A double-word or a variable shift may give an incorrect result
2453 # if executed immediately after starting an integer division:
2454 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2455 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2456 config CPU_R4400_WORKAROUNDS
2459 config CPU_R4X00_BUGS64
2461 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2463 config MIPS_ASID_SHIFT
2465 default 6 if CPU_R3000
2468 config MIPS_ASID_BITS
2470 default 0 if MIPS_ASID_BITS_VARIABLE
2471 default 6 if CPU_R3000
2474 config MIPS_ASID_BITS_VARIABLE
2477 config MIPS_CRC_SUPPORT
2480 # R4600 erratum. Due to the lack of errata information the exact
2481 # technical details aren't known. I've experimentally found that disabling
2482 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2484 config WAR_R4600_V1_INDEX_ICACHEOP
2487 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2489 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2490 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2491 # executed if there is no other dcache activity. If the dcache is
2492 # accessed for another instruction immediately preceding when these
2493 # cache instructions are executing, it is possible that the dcache
2494 # tag match outputs used by these cache instructions will be
2495 # incorrect. These cache instructions should be preceded by at least
2496 # four instructions that are not any kind of load or store
2499 # This is not allowed: lw
2503 # cache Hit_Writeback_Invalidate_D
2505 # This is allowed: lw
2510 # cache Hit_Writeback_Invalidate_D
2511 config WAR_R4600_V1_HIT_CACHEOP
2514 # Writeback and invalidate the primary cache dcache before DMA.
2516 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2517 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2518 # operate correctly if the internal data cache refill buffer is empty. These
2519 # CACHE instructions should be separated from any potential data cache miss
2520 # by a load instruction to an uncached address to empty the response buffer."
2521 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2523 config WAR_R4600_V2_HIT_CACHEOP
2526 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2527 # the line which this instruction itself exists, the following
2528 # operation is not guaranteed."
2530 # Workaround: do two phase flushing for Index_Invalidate_I
2531 config WAR_TX49XX_ICACHE_INDEX_INV
2534 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2535 # opposes it being called that) where invalid instructions in the same
2536 # I-cache line worth of instructions being fetched may case spurious
2538 config WAR_ICACHE_REFILLS
2541 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2542 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2543 config WAR_R10000_LLSC
2546 # 34K core erratum: "Problems Executing the TLBR Instruction"
2547 config WAR_MIPS34K_MISSED_ITLB
2551 # - Highmem only makes sense for the 32-bit kernel.
2552 # - The current highmem code will only work properly on physically indexed
2553 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2554 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2555 # moment we protect the user and offer the highmem option only on machines
2556 # where it's known to be safe. This will not offer highmem on a few systems
2557 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2558 # indexed CPUs but we're playing safe.
2559 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2560 # know they might have memory configurations that could make use of highmem
2564 bool "High Memory Support"
2565 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2568 config CPU_SUPPORTS_HIGHMEM
2571 config SYS_SUPPORTS_HIGHMEM
2574 config SYS_SUPPORTS_SMARTMIPS
2577 config SYS_SUPPORTS_MICROMIPS
2580 config SYS_SUPPORTS_MIPS16
2583 This option must be set if a kernel might be executed on a MIPS16-
2584 enabled CPU even if MIPS16 is not actually being used. In other
2585 words, it makes the kernel MIPS16-tolerant.
2587 config CPU_SUPPORTS_MSA
2590 config ARCH_FLATMEM_ENABLE
2592 depends on !NUMA && !CPU_LOONGSON2EF
2594 config ARCH_SPARSEMEM_ENABLE
2599 depends on SYS_SUPPORTS_NUMA
2601 select HAVE_SETUP_PER_CPU_AREA
2602 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2604 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2605 Access). This option improves performance on systems with more
2606 than two nodes; on two node systems it is generally better to
2607 leave it disabled; on single node systems leave this option
2610 config SYS_SUPPORTS_NUMA
2613 config HAVE_ARCH_NODEDATA_EXTENSION
2617 bool "Relocatable kernel"
2618 depends on SYS_SUPPORTS_RELOCATABLE
2619 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2620 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2621 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2622 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2625 This builds a kernel image that retains relocation information
2626 so it can be loaded someplace besides the default 1MB.
2627 The relocations make the kernel binary about 15% larger,
2628 but are discarded at runtime
2630 config RELOCATION_TABLE_SIZE
2631 hex "Relocation table size"
2632 depends on RELOCATABLE
2633 range 0x0 0x01000000
2634 default "0x00200000" if CPU_LOONGSON64
2635 default "0x00100000"
2637 A table of relocation data will be appended to the kernel binary
2638 and parsed at boot to fix up the relocated kernel.
2640 This option allows the amount of space reserved for the table to be
2641 adjusted, although the default of 1Mb should be ok in most cases.
2643 The build will fail and a valid size suggested if this is too small.
2645 If unsure, leave at the default value.
2647 config RANDOMIZE_BASE
2648 bool "Randomize the address of the kernel image"
2649 depends on RELOCATABLE
2651 Randomizes the physical and virtual address at which the
2652 kernel image is loaded, as a security feature that
2653 deters exploit attempts relying on knowledge of the location
2654 of kernel internals.
2656 Entropy is generated using any coprocessor 0 registers available.
2658 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2662 config RANDOMIZE_BASE_MAX_OFFSET
2663 hex "Maximum kASLR offset" if EXPERT
2664 depends on RANDOMIZE_BASE
2665 range 0x0 0x40000000 if EVA || 64BIT
2666 range 0x0 0x08000000
2667 default "0x01000000"
2669 When kASLR is active, this provides the maximum offset that will
2670 be applied to the kernel image. It should be set according to the
2671 amount of physical RAM available in the target system minus
2672 PHYSICAL_START and must be a power of 2.
2674 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2675 EVA or 64-bit. The default is 16Mb.
2682 config HW_PERF_EVENTS
2683 bool "Enable hardware performance counter support for perf events"
2684 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2687 Enable hardware performance counter support for perf events. If
2688 disabled, perf events will use software events only.
2691 bool "Enable DMI scanning"
2692 depends on MACH_LOONGSON64
2693 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2696 Enabled scanning of DMI to identify machine quirks. Say Y
2697 here unless you have verified that your setup is not
2698 affected by entries in the DMI blacklist. Required by PNP
2702 bool "Multi-Processing support"
2703 depends on SYS_SUPPORTS_SMP
2705 This enables support for systems with more than one CPU. If you have
2706 a system with only one CPU, say N. If you have a system with more
2707 than one CPU, say Y.
2709 If you say N here, the kernel will run on uni- and multiprocessor
2710 machines, but will use only one CPU of a multiprocessor machine. If
2711 you say Y here, the kernel will run on many, but not all,
2712 uniprocessor machines. On a uniprocessor machine, the kernel
2713 will run faster if you say N here.
2715 People using multiprocessor machines who say Y here should also say
2716 Y to "Enhanced Real Time Clock Support", below.
2718 See also the SMP-HOWTO available at
2719 <https://www.tldp.org/docs.html#howto>.
2721 If you don't know what to do here, say N.
2724 bool "Support for hot-pluggable CPUs"
2725 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2727 Say Y here to allow turning CPUs off and on. CPUs can be
2728 controlled through /sys/devices/system/cpu.
2729 (Note: power management support will enable this option
2730 automatically on SMP systems. )
2731 Say N if you want to disable CPU hotplug.
2736 config SYS_SUPPORTS_MIPS_CPS
2739 config SYS_SUPPORTS_SMP
2742 config NR_CPUS_DEFAULT_4
2745 config NR_CPUS_DEFAULT_8
2748 config NR_CPUS_DEFAULT_16
2751 config NR_CPUS_DEFAULT_32
2754 config NR_CPUS_DEFAULT_64
2758 int "Maximum number of CPUs (2-256)"
2761 default "4" if NR_CPUS_DEFAULT_4
2762 default "8" if NR_CPUS_DEFAULT_8
2763 default "16" if NR_CPUS_DEFAULT_16
2764 default "32" if NR_CPUS_DEFAULT_32
2765 default "64" if NR_CPUS_DEFAULT_64
2767 This allows you to specify the maximum number of CPUs which this
2768 kernel will support. The maximum supported value is 32 for 32-bit
2769 kernel and 64 for 64-bit kernels; the minimum value which makes
2770 sense is 1 for Qemu (useful only for kernel debugging purposes)
2771 and 2 for all others.
2773 This is purely to save memory - each supported CPU adds
2774 approximately eight kilobytes to the kernel image. For best
2775 performance should round up your number of processors to the next
2778 config MIPS_PERF_SHARED_TC_COUNTERS
2781 config MIPS_NR_CPU_NR_MAP_1024
2784 config MIPS_NR_CPU_NR_MAP
2787 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2788 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2791 # Timer Interrupt Frequency Configuration
2795 prompt "Timer frequency"
2798 Allows the configuration of the timer frequency.
2801 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2804 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2807 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2810 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2813 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2816 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2819 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2822 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2826 config SYS_SUPPORTS_24HZ
2829 config SYS_SUPPORTS_48HZ
2832 config SYS_SUPPORTS_100HZ
2835 config SYS_SUPPORTS_128HZ
2838 config SYS_SUPPORTS_250HZ
2841 config SYS_SUPPORTS_256HZ
2844 config SYS_SUPPORTS_1000HZ
2847 config SYS_SUPPORTS_1024HZ
2850 config SYS_SUPPORTS_ARBIT_HZ
2852 default y if !SYS_SUPPORTS_24HZ && \
2853 !SYS_SUPPORTS_48HZ && \
2854 !SYS_SUPPORTS_100HZ && \
2855 !SYS_SUPPORTS_128HZ && \
2856 !SYS_SUPPORTS_250HZ && \
2857 !SYS_SUPPORTS_256HZ && \
2858 !SYS_SUPPORTS_1000HZ && \
2859 !SYS_SUPPORTS_1024HZ
2865 default 100 if HZ_100
2866 default 128 if HZ_128
2867 default 250 if HZ_250
2868 default 256 if HZ_256
2869 default 1000 if HZ_1000
2870 default 1024 if HZ_1024
2873 def_bool HIGH_RES_TIMERS
2876 bool "Kexec system call"
2879 kexec is a system call that implements the ability to shutdown your
2880 current kernel, and to start another kernel. It is like a reboot
2881 but it is independent of the system firmware. And like a reboot
2882 you can start any kernel with it, not just Linux.
2884 The name comes from the similarity to the exec system call.
2886 It is an ongoing process to be certain the hardware in a machine
2887 is properly shutdown, so do not be surprised if this code does not
2888 initially work for you. As of this writing the exact hardware
2889 interface is strongly in flux, so no good recommendation can be
2893 bool "Kernel crash dumps"
2895 Generate crash dump after being started by kexec.
2896 This should be normally only set in special crash dump kernels
2897 which are loaded in the main kernel with kexec-tools into
2898 a specially reserved region and then later executed after
2899 a crash by kdump/kexec. The crash dump kernel must be compiled
2900 to a memory address not used by the main kernel or firmware using
2903 config PHYSICAL_START
2904 hex "Physical address where the kernel is loaded"
2905 default "0xffffffff84000000"
2906 depends on CRASH_DUMP
2908 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2909 If you plan to use kernel for capturing the crash dump change
2910 this value to start of the reserved region (the "X" value as
2911 specified in the "crashkernel=YM@XM" command line boot parameter
2912 passed to the panic-ed kernel).
2914 config MIPS_O32_FP64_SUPPORT
2915 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2916 depends on 32BIT || MIPS32_O32
2918 When this is enabled, the kernel will support use of 64-bit floating
2919 point registers with binaries using the O32 ABI along with the
2920 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2921 32-bit MIPS systems this support is at the cost of increasing the
2922 size and complexity of the compiled FPU emulator. Thus if you are
2923 running a MIPS32 system and know that none of your userland binaries
2924 will require 64-bit floating point, you may wish to reduce the size
2925 of your kernel & potentially improve FP emulation performance by
2928 Although binutils currently supports use of this flag the details
2929 concerning its effect upon the O32 ABI in userland are still being
2930 worked on. In order to avoid userland becoming dependent upon current
2931 behaviour before the details have been finalised, this option should
2932 be considered experimental and only enabled by those working upon
2940 select OF_EARLY_FLATTREE
2950 prompt "Kernel appended dtb support" if USE_OF
2951 default MIPS_NO_APPENDED_DTB
2953 config MIPS_NO_APPENDED_DTB
2956 Do not enable appended dtb support.
2958 config MIPS_ELF_APPENDED_DTB
2961 With this option, the boot code will look for a device tree binary
2962 DTB) included in the vmlinux ELF section .appended_dtb. By default
2963 it is empty and the DTB can be appended using binutils command
2966 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2968 This is meant as a backward compatibility convenience for those
2969 systems with a bootloader that can't be upgraded to accommodate
2970 the documented boot protocol using a device tree.
2972 config MIPS_RAW_APPENDED_DTB
2973 bool "vmlinux.bin or vmlinuz.bin"
2975 With this option, the boot code will look for a device tree binary
2976 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
2977 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2979 This is meant as a backward compatibility convenience for those
2980 systems with a bootloader that can't be upgraded to accommodate
2981 the documented boot protocol using a device tree.
2983 Beware that there is very little in terms of protection against
2984 this option being confused by leftover garbage in memory that might
2985 look like a DTB header after a reboot if no actual DTB is appended
2986 to vmlinux.bin. Do not leave this option active in a production kernel
2987 if you don't intend to always append a DTB.
2991 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2992 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2993 !MACH_LOONGSON64 && !MIPS_MALTA && \
2995 default MIPS_CMDLINE_FROM_BOOTLOADER
2997 config MIPS_CMDLINE_FROM_DTB
2999 bool "Dtb kernel arguments if available"
3001 config MIPS_CMDLINE_DTB_EXTEND
3003 bool "Extend dtb kernel arguments with bootloader arguments"
3005 config MIPS_CMDLINE_FROM_BOOTLOADER
3006 bool "Bootloader kernel arguments if available"
3008 config MIPS_CMDLINE_BUILTIN_EXTEND
3009 depends on CMDLINE_BOOL
3010 bool "Extend builtin kernel arguments with bootloader arguments"
3015 config LOCKDEP_SUPPORT
3019 config STACKTRACE_SUPPORT
3023 config PGTABLE_LEVELS
3025 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3026 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3029 config MIPS_AUTO_PFN_OFFSET
3032 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3034 config PCI_DRIVERS_GENERIC
3035 select PCI_DOMAINS_GENERIC if PCI
3038 config PCI_DRIVERS_LEGACY
3039 def_bool !PCI_DRIVERS_GENERIC
3040 select NO_GENERIC_PCI_IOPORT_MAP
3041 select PCI_DOMAINS if PCI
3044 # ISA support is now enabled via select. Too many systems still have the one
3045 # or other ISA chip on the board that users don't know about so don't expect
3046 # users to choose the right thing ...
3052 bool "TURBOchannel support"
3053 depends on MACH_DECSTATION
3055 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3056 processors. TURBOchannel programming specifications are available
3058 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3060 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3061 Linux driver support status is documented at:
3062 <http://www.linux-mips.org/wiki/DECstation>
3068 config ARCH_MMAP_RND_BITS_MIN
3072 config ARCH_MMAP_RND_BITS_MAX
3076 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3079 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3086 select MIPS_EXTERNAL_TIMER
3092 config MIPS32_COMPAT
3099 bool "Kernel support for o32 binaries"
3101 select ARCH_WANT_OLD_COMPAT_IPC
3103 select MIPS32_COMPAT
3105 Select this option if you want to run o32 binaries. These are pure
3106 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3107 existing binaries are in this format.
3112 bool "Kernel support for n32 binaries"
3114 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3116 select MIPS32_COMPAT
3118 Select this option if you want to run n32 binaries. These are
3119 64-bit binaries using 32-bit quantities for addressing and certain
3120 data that would normally be 64-bit. They are used in special
3125 config CC_HAS_MNO_BRANCH_LIKELY
3127 depends on $(cc-option,-mno-branch-likely)
3129 # https://github.com/llvm/llvm-project/issues/61045
3130 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3131 def_bool y if CC_IS_CLANG
3133 menu "Power management options"
3135 config ARCH_HIBERNATION_POSSIBLE
3137 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3139 config ARCH_SUSPEND_POSSIBLE
3141 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3143 source "kernel/power/Kconfig"
3147 config MIPS_EXTERNAL_TIMER
3150 menu "CPU Power Management"
3152 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3153 source "drivers/cpufreq/Kconfig"
3154 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3156 source "drivers/cpuidle/Kconfig"
3160 source "arch/mips/kvm/Kconfig"
3162 source "arch/mips/vdso/Kconfig"