1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_FORTIFY_SOURCE
9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
11 select ARCH_HAS_UBSAN_SANITIZE_ALL
12 select ARCH_SUPPORTS_UPROBES
13 select ARCH_USE_BUILTIN_BSWAP
14 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
15 select ARCH_USE_QUEUED_RWLOCKS
16 select ARCH_USE_QUEUED_SPINLOCKS
17 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
18 select ARCH_WANT_IPC_PARSE_VERSION
19 select BUILDTIME_TABLE_SORT
20 select CLONE_BACKWARDS
21 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
22 select CPU_PM if CPU_IDLE
23 select GENERIC_ATOMIC64 if !64BIT
24 select GENERIC_CMOS_UPDATE
25 select GENERIC_CPU_AUTOPROBE
26 select GENERIC_GETTIMEOFDAY
28 select GENERIC_IRQ_PROBE
29 select GENERIC_IRQ_SHOW
30 select GENERIC_ISA_DMA if EISA
31 select GENERIC_LIB_ASHLDI3
32 select GENERIC_LIB_ASHRDI3
33 select GENERIC_LIB_CMPDI2
34 select GENERIC_LIB_LSHRDI3
35 select GENERIC_LIB_UCMPDI2
36 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
37 select GENERIC_SMP_IDLE_THREAD
38 select GENERIC_TIME_VSYSCALL
39 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
40 select HANDLE_DOMAIN_IRQ
41 select HAVE_ARCH_COMPILER_H
42 select HAVE_ARCH_JUMP_LABEL
44 select HAVE_ARCH_MMAP_RND_BITS if MMU
45 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
46 select HAVE_ARCH_SECCOMP_FILTER
47 select HAVE_ARCH_TRACEHOOK
48 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
49 select HAVE_ASM_MODVERSIONS
50 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
51 select HAVE_CONTEXT_TRACKING
53 select HAVE_C_RECORDMCOUNT
54 select HAVE_DEBUG_KMEMLEAK
55 select HAVE_DEBUG_STACKOVERFLOW
56 select HAVE_DMA_CONTIGUOUS
57 select HAVE_DYNAMIC_FTRACE
58 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
59 select HAVE_EXIT_THREAD
61 select HAVE_FTRACE_MCOUNT_RECORD
62 select HAVE_FUNCTION_GRAPH_TRACER
63 select HAVE_FUNCTION_TRACER
64 select HAVE_GCC_PLUGINS
65 select HAVE_GENERIC_VDSO
67 select HAVE_IOREMAP_PROT
68 select HAVE_IRQ_EXIT_ON_IRQ_STACK
69 select HAVE_IRQ_TIME_ACCOUNTING
71 select HAVE_KRETPROBES
72 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
73 select HAVE_MOD_ARCH_SPECIFIC
76 select HAVE_PERF_EVENTS
77 select HAVE_REGS_AND_STACK_ACCESS_API
79 select HAVE_SPARSE_SYSCALL_NR
80 select HAVE_STACKPROTECTOR
81 select HAVE_SYSCALL_TRACEPOINTS
82 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
83 select IRQ_FORCED_THREADING
85 select MODULES_USE_ELF_REL if MODULES
86 select MODULES_USE_ELF_RELA if MODULES && 64BIT
87 select PERF_USE_VMALLOC
88 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
91 select SYSCTL_EXCEPTION_TRACE
94 config MIPS_FIXUP_BIGPHYS_ADDR
102 select SYS_SUPPORTS_32BIT_KERNEL
103 select SYS_SUPPORTS_LITTLE_ENDIAN
104 select SYS_SUPPORTS_ZBOOT
105 select DMA_NONCOHERENT
110 select GENERIC_IRQ_CHIP
111 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
113 select CPU_SUPPORTS_CPUFREQ
114 select MIPS_EXTERNAL_TIMER
116 menu "Machine selection"
120 default MIPS_GENERIC_KERNEL
122 config MIPS_GENERIC_KERNEL
123 bool "Generic board-agnostic MIPS kernel"
128 select CLKSRC_MIPS_GIC
130 select CPU_MIPSR2_IRQ_EI
131 select CPU_MIPSR2_IRQ_VI
133 select DMA_PERDEV_COHERENT
136 select MIPS_AUTO_PFN_OFFSET
137 select MIPS_CPU_SCACHE
139 select MIPS_L1_CACHE_SHIFT_7
140 select NO_EXCEPT_FILL
141 select PCI_DRIVERS_GENERIC
144 select SYS_HAS_CPU_MIPS32_R1
145 select SYS_HAS_CPU_MIPS32_R2
146 select SYS_HAS_CPU_MIPS32_R6
147 select SYS_HAS_CPU_MIPS64_R1
148 select SYS_HAS_CPU_MIPS64_R2
149 select SYS_HAS_CPU_MIPS64_R6
150 select SYS_SUPPORTS_32BIT_KERNEL
151 select SYS_SUPPORTS_64BIT_KERNEL
152 select SYS_SUPPORTS_BIG_ENDIAN
153 select SYS_SUPPORTS_HIGHMEM
154 select SYS_SUPPORTS_LITTLE_ENDIAN
155 select SYS_SUPPORTS_MICROMIPS
156 select SYS_SUPPORTS_MIPS16
157 select SYS_SUPPORTS_MIPS_CPS
158 select SYS_SUPPORTS_MULTITHREADING
159 select SYS_SUPPORTS_RELOCATABLE
160 select SYS_SUPPORTS_SMARTMIPS
161 select SYS_SUPPORTS_ZBOOT
163 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
164 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
165 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
166 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
167 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
168 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
171 Select this to build a kernel which aims to support multiple boards,
172 generally using a flattened device tree passed from the bootloader
173 using the boot protocol defined in the UHI (Unified Hosting
174 Interface) specification.
177 bool "Alchemy processor based machines"
178 select PHYS_ADDR_T_64BIT
182 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
183 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
184 select SYS_HAS_CPU_MIPS32_R1
185 select SYS_SUPPORTS_32BIT_KERNEL
186 select SYS_SUPPORTS_APM_EMULATION
188 select SYS_SUPPORTS_ZBOOT
192 bool "Texas Instruments AR7"
194 select DMA_NONCOHERENT
198 select NO_EXCEPT_FILL
200 select SYS_HAS_CPU_MIPS32_R1
201 select SYS_HAS_EARLY_PRINTK
202 select SYS_SUPPORTS_32BIT_KERNEL
203 select SYS_SUPPORTS_LITTLE_ENDIAN
204 select SYS_SUPPORTS_MIPS16
205 select SYS_SUPPORTS_ZBOOT_UART16550
208 select HAVE_LEGACY_CLK
210 Support for the Texas Instruments AR7 System-on-a-Chip
211 family: TNETD7100, 7200 and 7300.
214 bool "Atheros AR231x/AR531x SoC support"
217 select DMA_NONCOHERENT
220 select SYS_HAS_CPU_MIPS32_R1
221 select SYS_SUPPORTS_BIG_ENDIAN
222 select SYS_SUPPORTS_32BIT_KERNEL
223 select SYS_HAS_EARLY_PRINTK
225 Support for Atheros AR231x and Atheros AR531x based boards
228 bool "Atheros AR71XX/AR724X/AR913X based boards"
229 select ARCH_HAS_RESET_CONTROLLER
233 select DMA_NONCOHERENT
238 select SYS_HAS_CPU_MIPS32_R2
239 select SYS_HAS_EARLY_PRINTK
240 select SYS_SUPPORTS_32BIT_KERNEL
241 select SYS_SUPPORTS_BIG_ENDIAN
242 select SYS_SUPPORTS_MIPS16
243 select SYS_SUPPORTS_ZBOOT_UART_PROM
245 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
247 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
250 bool "Broadcom Generic BMIPS kernel"
251 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
252 select ARCH_HAS_PHYS_TO_DMA
254 select NO_EXCEPT_FILL
260 select BCM6345_L1_IRQ
261 select BCM7038_L1_IRQ
262 select BCM7120_L2_IRQ
263 select BRCMSTB_L2_IRQ
265 select DMA_NONCOHERENT
266 select SYS_SUPPORTS_32BIT_KERNEL
267 select SYS_SUPPORTS_LITTLE_ENDIAN
268 select SYS_SUPPORTS_BIG_ENDIAN
269 select SYS_SUPPORTS_HIGHMEM
270 select SYS_HAS_CPU_BMIPS32_3300
271 select SYS_HAS_CPU_BMIPS4350
272 select SYS_HAS_CPU_BMIPS4380
273 select SYS_HAS_CPU_BMIPS5000
275 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
276 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
277 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
278 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
279 select HARDIRQS_SW_RESEND
281 Build a generic DT-based kernel image that boots on select
282 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
283 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
284 must be set appropriately for your board.
287 bool "Broadcom BCM47XX based boards"
291 select DMA_NONCOHERENT
294 select SYS_HAS_CPU_MIPS32_R1
295 select NO_EXCEPT_FILL
296 select SYS_SUPPORTS_32BIT_KERNEL
297 select SYS_SUPPORTS_LITTLE_ENDIAN
298 select SYS_SUPPORTS_MIPS16
299 select SYS_SUPPORTS_ZBOOT
300 select SYS_HAS_EARLY_PRINTK
301 select USE_GENERIC_EARLY_PRINTK_8250
303 select LEDS_GPIO_REGISTER
306 select BCM47XX_SSB if !BCM47XX_BCMA
308 Support for BCM47XX based boards
311 bool "Broadcom BCM63XX based boards"
316 select DMA_NONCOHERENT
318 select SYS_SUPPORTS_32BIT_KERNEL
319 select SYS_SUPPORTS_BIG_ENDIAN
320 select SYS_HAS_EARLY_PRINTK
323 select MIPS_L1_CACHE_SHIFT_4
325 select HAVE_LEGACY_CLK
327 Support for BCM63XX based boards
334 select DMA_NONCOHERENT
340 select PCI_GT64XXX_PCI0
341 select SYS_HAS_CPU_NEVADA
342 select SYS_HAS_EARLY_PRINTK
343 select SYS_SUPPORTS_32BIT_KERNEL
344 select SYS_SUPPORTS_64BIT_KERNEL
345 select SYS_SUPPORTS_LITTLE_ENDIAN
346 select USE_GENERIC_EARLY_PRINTK_8250
348 config MACH_DECSTATION
352 select CEVT_R4K if CPU_R4X00
354 select CSRC_R4K if CPU_R4X00
355 select CPU_DADDI_WORKAROUNDS if 64BIT
356 select CPU_R4000_WORKAROUNDS if 64BIT
357 select CPU_R4400_WORKAROUNDS if 64BIT
358 select DMA_NONCOHERENT
361 select SYS_HAS_CPU_R3000
362 select SYS_HAS_CPU_R4X00
363 select SYS_SUPPORTS_32BIT_KERNEL
364 select SYS_SUPPORTS_64BIT_KERNEL
365 select SYS_SUPPORTS_LITTLE_ENDIAN
366 select SYS_SUPPORTS_128HZ
367 select SYS_SUPPORTS_256HZ
368 select SYS_SUPPORTS_1024HZ
369 select MIPS_L1_CACHE_SHIFT_4
371 This enables support for DEC's MIPS based workstations. For details
372 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
373 DECstation porting pages on <http://decstation.unix-ag.org/>.
375 If you have one of the following DECstation Models you definitely
376 want to choose R4xx0 for the CPU Type:
383 otherwise choose R3000.
386 bool "Jazz family of machines"
389 select ARCH_MIGHT_HAVE_PC_PARPORT
390 select ARCH_MIGHT_HAVE_PC_SERIO
394 select ARCH_MAY_HAVE_PC_FDC
397 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
398 select GENERIC_ISA_DMA
399 select HAVE_PCSPKR_PLATFORM
404 select SYS_HAS_CPU_R4X00
405 select SYS_SUPPORTS_32BIT_KERNEL
406 select SYS_SUPPORTS_64BIT_KERNEL
407 select SYS_SUPPORTS_100HZ
409 This a family of machines based on the MIPS R4030 chipset which was
410 used by several vendors to build RISC/os and Windows NT workstations.
411 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
412 Olivetti M700-10 workstations.
414 config MACH_INGENIC_SOC
415 bool "Ingenic SoC based machines"
418 select SYS_SUPPORTS_ZBOOT_UART16550
421 bool "Lantiq based platforms"
422 select DMA_NONCOHERENT
426 select SYS_HAS_CPU_MIPS32_R1
427 select SYS_HAS_CPU_MIPS32_R2
428 select SYS_SUPPORTS_BIG_ENDIAN
429 select SYS_SUPPORTS_32BIT_KERNEL
430 select SYS_SUPPORTS_MIPS16
431 select SYS_SUPPORTS_MULTITHREADING
432 select SYS_SUPPORTS_VPE_LOADER
433 select SYS_HAS_EARLY_PRINTK
438 select HAVE_LEGACY_CLK
441 select PINCTRL_LANTIQ
442 select ARCH_HAS_RESET_CONTROLLER
443 select RESET_CONTROLLER
445 config MACH_LOONGSON32
446 bool "Loongson 32-bit family of machines"
447 select SYS_SUPPORTS_ZBOOT
449 This enables support for the Loongson-1 family of machines.
451 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
452 the Institute of Computing Technology (ICT), Chinese Academy of
455 config MACH_LOONGSON2EF
456 bool "Loongson-2E/F family of machines"
457 select SYS_SUPPORTS_ZBOOT
459 This enables the support of early Loongson-2E/F family of machines.
461 config MACH_LOONGSON64
462 bool "Loongson 64-bit family of machines"
463 select ARCH_SPARSEMEM_ENABLE
464 select ARCH_MIGHT_HAVE_PC_PARPORT
465 select ARCH_MIGHT_HAVE_PC_SERIO
466 select GENERIC_ISA_DMA_SUPPORT_BROKEN
476 select NO_EXCEPT_FILL
477 select NR_CPUS_DEFAULT_64
478 select USE_GENERIC_EARLY_PRINTK_8250
479 select PCI_DRIVERS_GENERIC
480 select SYS_HAS_CPU_LOONGSON64
481 select SYS_HAS_EARLY_PRINTK
482 select SYS_SUPPORTS_SMP
483 select SYS_SUPPORTS_HOTPLUG_CPU
484 select SYS_SUPPORTS_NUMA
485 select SYS_SUPPORTS_64BIT_KERNEL
486 select SYS_SUPPORTS_HIGHMEM
487 select SYS_SUPPORTS_LITTLE_ENDIAN
488 select SYS_SUPPORTS_ZBOOT
495 select PCI_HOST_GENERIC
497 This enables the support of Loongson-2/3 family of machines.
499 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
500 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
501 and Loongson-2F which will be removed), developed by the Institute
502 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
504 config MACH_PISTACHIO
505 bool "IMG Pistachio SoC based boards"
509 select CLKSRC_MIPS_GIC
512 select DMA_NONCOHERENT
516 select MIPS_CPU_SCACHE
520 select SYS_HAS_CPU_MIPS32_R2
521 select SYS_SUPPORTS_32BIT_KERNEL
522 select SYS_SUPPORTS_LITTLE_ENDIAN
523 select SYS_SUPPORTS_MIPS_CPS
524 select SYS_SUPPORTS_MULTITHREADING
525 select SYS_SUPPORTS_RELOCATABLE
526 select SYS_SUPPORTS_ZBOOT
527 select SYS_HAS_EARLY_PRINTK
528 select USE_GENERIC_EARLY_PRINTK_8250
531 This enables support for the IMG Pistachio SoC platform.
534 bool "MIPS Malta board"
535 select ARCH_MAY_HAVE_PC_FDC
536 select ARCH_MIGHT_HAVE_PC_PARPORT
537 select ARCH_MIGHT_HAVE_PC_SERIO
542 select CLKSRC_MIPS_GIC
545 select DMA_MAYBE_COHERENT
546 select GENERIC_ISA_DMA
547 select HAVE_PCSPKR_PLATFORM
553 select MIPS_CPU_SCACHE
555 select MIPS_L1_CACHE_SHIFT_6
557 select PCI_GT64XXX_PCI0
560 select SYS_HAS_CPU_MIPS32_R1
561 select SYS_HAS_CPU_MIPS32_R2
562 select SYS_HAS_CPU_MIPS32_R3_5
563 select SYS_HAS_CPU_MIPS32_R5
564 select SYS_HAS_CPU_MIPS32_R6
565 select SYS_HAS_CPU_MIPS64_R1
566 select SYS_HAS_CPU_MIPS64_R2
567 select SYS_HAS_CPU_MIPS64_R6
568 select SYS_HAS_CPU_NEVADA
569 select SYS_HAS_CPU_RM7000
570 select SYS_SUPPORTS_32BIT_KERNEL
571 select SYS_SUPPORTS_64BIT_KERNEL
572 select SYS_SUPPORTS_BIG_ENDIAN
573 select SYS_SUPPORTS_HIGHMEM
574 select SYS_SUPPORTS_LITTLE_ENDIAN
575 select SYS_SUPPORTS_MICROMIPS
576 select SYS_SUPPORTS_MIPS16
577 select SYS_SUPPORTS_MIPS_CMP
578 select SYS_SUPPORTS_MIPS_CPS
579 select SYS_SUPPORTS_MULTITHREADING
580 select SYS_SUPPORTS_RELOCATABLE
581 select SYS_SUPPORTS_SMARTMIPS
582 select SYS_SUPPORTS_VPE_LOADER
583 select SYS_SUPPORTS_ZBOOT
585 select WAR_ICACHE_REFILLS
586 select ZONE_DMA32 if 64BIT
588 This enables support for the MIPS Technologies Malta evaluation
592 bool "Microchip PIC32 Family"
594 This enables support for the Microchip PIC32 family of platforms.
596 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
600 bool "NEC VR4100 series based machines"
603 select SYS_HAS_CPU_VR41XX
604 select SYS_SUPPORTS_MIPS16
608 bool "Ralink based machines"
612 select DMA_NONCOHERENT
615 select SYS_HAS_CPU_MIPS32_R1
616 select SYS_HAS_CPU_MIPS32_R2
617 select SYS_SUPPORTS_32BIT_KERNEL
618 select SYS_SUPPORTS_LITTLE_ENDIAN
619 select SYS_SUPPORTS_MIPS16
620 select SYS_SUPPORTS_ZBOOT
621 select SYS_HAS_EARLY_PRINTK
623 select ARCH_HAS_RESET_CONTROLLER
624 select RESET_CONTROLLER
627 bool "SGI IP22 (Indy/Indigo2)"
632 select ARCH_MIGHT_HAVE_PC_SERIO
636 select DEFAULT_SGI_PARTITION
637 select DMA_NONCOHERENT
641 select IP22_CPU_SCACHE
643 select GENERIC_ISA_DMA_SUPPORT_BROKEN
645 select SGI_HAS_INDYDOG
651 select SYS_HAS_CPU_R4X00
652 select SYS_HAS_CPU_R5000
653 select SYS_HAS_EARLY_PRINTK
654 select SYS_SUPPORTS_32BIT_KERNEL
655 select SYS_SUPPORTS_64BIT_KERNEL
656 select SYS_SUPPORTS_BIG_ENDIAN
657 select WAR_R4600_V1_INDEX_ICACHEOP
658 select WAR_R4600_V1_HIT_CACHEOP
659 select WAR_R4600_V2_HIT_CACHEOP
660 select MIPS_L1_CACHE_SHIFT_7
662 This are the SGI Indy, Challenge S and Indigo2, as well as certain
663 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
664 that runs on these, say Y here.
667 bool "SGI IP27 (Origin200/2000)"
668 select ARCH_HAS_PHYS_TO_DMA
669 select ARCH_SPARSEMEM_ENABLE
672 select ARC_CMDLINE_ONLY
674 select DEFAULT_SGI_PARTITION
675 select SYS_HAS_EARLY_PRINTK
678 select IRQ_DOMAIN_HIERARCHY
679 select NR_CPUS_DEFAULT_64
680 select PCI_DRIVERS_GENERIC
681 select PCI_XTALK_BRIDGE
682 select SYS_HAS_CPU_R10000
683 select SYS_SUPPORTS_64BIT_KERNEL
684 select SYS_SUPPORTS_BIG_ENDIAN
685 select SYS_SUPPORTS_NUMA
686 select SYS_SUPPORTS_SMP
687 select WAR_R10000_LLSC
688 select MIPS_L1_CACHE_SHIFT_7
691 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
692 workstations. To compile a Linux kernel that runs on these, say Y
696 bool "SGI IP28 (Indigo2 R10k)"
701 select ARCH_MIGHT_HAVE_PC_SERIO
705 select DEFAULT_SGI_PARTITION
706 select DMA_NONCOHERENT
707 select GENERIC_ISA_DMA_SUPPORT_BROKEN
713 select SGI_HAS_INDYDOG
719 select SYS_HAS_CPU_R10000
720 select SYS_HAS_EARLY_PRINTK
721 select SYS_SUPPORTS_64BIT_KERNEL
722 select SYS_SUPPORTS_BIG_ENDIAN
723 select WAR_R10000_LLSC
724 select MIPS_L1_CACHE_SHIFT_7
726 This is the SGI Indigo2 with R10000 processor. To compile a Linux
727 kernel that runs on these, say Y here.
730 bool "SGI IP30 (Octane/Octane2)"
731 select ARCH_HAS_PHYS_TO_DMA
737 select SYNC_R4K if SMP
741 select IRQ_DOMAIN_HIERARCHY
742 select NR_CPUS_DEFAULT_2
743 select PCI_DRIVERS_GENERIC
744 select PCI_XTALK_BRIDGE
745 select SYS_HAS_EARLY_PRINTK
746 select SYS_HAS_CPU_R10000
747 select SYS_SUPPORTS_64BIT_KERNEL
748 select SYS_SUPPORTS_BIG_ENDIAN
749 select SYS_SUPPORTS_SMP
750 select WAR_R10000_LLSC
751 select MIPS_L1_CACHE_SHIFT_7
754 These are the SGI Octane and Octane2 graphics workstations. To
755 compile a Linux kernel that runs on these, say Y here.
761 select ARCH_HAS_PHYS_TO_DMA
767 select DMA_NONCOHERENT
770 select R5000_CPU_SCACHE
771 select RM7000_CPU_SCACHE
772 select SYS_HAS_CPU_R5000
773 select SYS_HAS_CPU_R10000 if BROKEN
774 select SYS_HAS_CPU_RM7000
775 select SYS_HAS_CPU_NEVADA
776 select SYS_SUPPORTS_64BIT_KERNEL
777 select SYS_SUPPORTS_BIG_ENDIAN
778 select WAR_ICACHE_REFILLS
780 If you want this kernel to run on SGI O2 workstation, say Y here.
783 bool "Sibyte BCM91120C-CRhine"
785 select SIBYTE_BCM1120
787 select SYS_HAS_CPU_SB1
788 select SYS_SUPPORTS_BIG_ENDIAN
789 select SYS_SUPPORTS_LITTLE_ENDIAN
792 bool "Sibyte BCM91120x-Carmel"
794 select SIBYTE_BCM1120
796 select SYS_HAS_CPU_SB1
797 select SYS_SUPPORTS_BIG_ENDIAN
798 select SYS_SUPPORTS_LITTLE_ENDIAN
801 bool "Sibyte BCM91125C-CRhone"
803 select SIBYTE_BCM1125
805 select SYS_HAS_CPU_SB1
806 select SYS_SUPPORTS_BIG_ENDIAN
807 select SYS_SUPPORTS_HIGHMEM
808 select SYS_SUPPORTS_LITTLE_ENDIAN
811 bool "Sibyte BCM91125E-Rhone"
813 select SIBYTE_BCM1125H
815 select SYS_HAS_CPU_SB1
816 select SYS_SUPPORTS_BIG_ENDIAN
817 select SYS_SUPPORTS_LITTLE_ENDIAN
820 bool "Sibyte BCM91250A-SWARM"
822 select HAVE_PATA_PLATFORM
825 select SYS_HAS_CPU_SB1
826 select SYS_SUPPORTS_BIG_ENDIAN
827 select SYS_SUPPORTS_HIGHMEM
828 select SYS_SUPPORTS_LITTLE_ENDIAN
829 select ZONE_DMA32 if 64BIT
830 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
832 config SIBYTE_LITTLESUR
833 bool "Sibyte BCM91250C2-LittleSur"
835 select HAVE_PATA_PLATFORM
838 select SYS_HAS_CPU_SB1
839 select SYS_SUPPORTS_BIG_ENDIAN
840 select SYS_SUPPORTS_HIGHMEM
841 select SYS_SUPPORTS_LITTLE_ENDIAN
842 select ZONE_DMA32 if 64BIT
844 config SIBYTE_SENTOSA
845 bool "Sibyte BCM91250E-Sentosa"
849 select SYS_HAS_CPU_SB1
850 select SYS_SUPPORTS_BIG_ENDIAN
851 select SYS_SUPPORTS_LITTLE_ENDIAN
852 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
855 bool "Sibyte BCM91480B-BigSur"
857 select NR_CPUS_DEFAULT_4
858 select SIBYTE_BCM1x80
860 select SYS_HAS_CPU_SB1
861 select SYS_SUPPORTS_BIG_ENDIAN
862 select SYS_SUPPORTS_HIGHMEM
863 select SYS_SUPPORTS_LITTLE_ENDIAN
864 select ZONE_DMA32 if 64BIT
865 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
868 bool "SNI RM200/300/400"
871 select FW_ARC if CPU_LITTLE_ENDIAN
872 select FW_ARC32 if CPU_LITTLE_ENDIAN
873 select FW_SNIPROM if CPU_BIG_ENDIAN
874 select ARCH_MAY_HAVE_PC_FDC
875 select ARCH_MIGHT_HAVE_PC_PARPORT
876 select ARCH_MIGHT_HAVE_PC_SERIO
880 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
881 select DMA_NONCOHERENT
882 select GENERIC_ISA_DMA
884 select HAVE_PCSPKR_PLATFORM
890 select MIPS_L1_CACHE_SHIFT_6
891 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
892 select SYS_HAS_CPU_R4X00
893 select SYS_HAS_CPU_R5000
894 select SYS_HAS_CPU_R10000
895 select R5000_CPU_SCACHE
896 select SYS_HAS_EARLY_PRINTK
897 select SYS_SUPPORTS_32BIT_KERNEL
898 select SYS_SUPPORTS_64BIT_KERNEL
899 select SYS_SUPPORTS_BIG_ENDIAN
900 select SYS_SUPPORTS_HIGHMEM
901 select SYS_SUPPORTS_LITTLE_ENDIAN
902 select WAR_R4600_V2_HIT_CACHEOP
904 The SNI RM200/300/400 are MIPS-based machines manufactured by
905 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
906 Technology and now in turn merged with Fujitsu. Say Y here to
907 support this machine type.
910 bool "Toshiba TX39 series based machines"
913 bool "Toshiba TX49 series based machines"
914 select WAR_TX49XX_ICACHE_INDEX_INV
916 config MIKROTIK_RB532
917 bool "Mikrotik RB532 boards"
920 select DMA_NONCOHERENT
923 select SYS_HAS_CPU_MIPS32_R1
924 select SYS_SUPPORTS_32BIT_KERNEL
925 select SYS_SUPPORTS_LITTLE_ENDIAN
929 select MIPS_L1_CACHE_SHIFT_4
931 Support the Mikrotik(tm) RouterBoard 532 series,
932 based on the IDT RC32434 SoC.
934 config CAVIUM_OCTEON_SOC
935 bool "Cavium Networks Octeon SoC based boards"
937 select ARCH_HAS_PHYS_TO_DMA
939 select PHYS_ADDR_T_64BIT
940 select SYS_SUPPORTS_64BIT_KERNEL
941 select SYS_SUPPORTS_BIG_ENDIAN
943 select EDAC_ATOMIC_SCRUB
944 select SYS_SUPPORTS_LITTLE_ENDIAN
945 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
946 select SYS_HAS_EARLY_PRINTK
947 select SYS_HAS_CPU_CAVIUM_OCTEON
949 select HAVE_PLAT_DELAY
950 select HAVE_PLAT_FW_INIT_CMDLINE
951 select HAVE_PLAT_MEMCPY
956 select ARCH_SPARSEMEM_ENABLE
957 select SYS_SUPPORTS_SMP
958 select NR_CPUS_DEFAULT_64
959 select MIPS_NR_CPU_NR_MAP_1024
961 select MTD_COMPLEX_MAPPINGS
963 select SYS_SUPPORTS_RELOCATABLE
965 This option supports all of the Octeon reference boards from Cavium
966 Networks. It builds a kernel that dynamically determines the Octeon
967 CPU type and supports all known board reference implementations.
968 Some of the supported boards are:
975 Say Y here for most Octeon reference boards.
978 bool "Netlogic XLR/XLS based systems"
981 select SYS_HAS_CPU_XLR
982 select SYS_SUPPORTS_SMP
985 select SYS_SUPPORTS_32BIT_KERNEL
986 select SYS_SUPPORTS_64BIT_KERNEL
987 select PHYS_ADDR_T_64BIT
988 select SYS_SUPPORTS_BIG_ENDIAN
989 select SYS_SUPPORTS_HIGHMEM
990 select NR_CPUS_DEFAULT_32
994 select ZONE_DMA32 if 64BIT
996 select SYS_HAS_EARLY_PRINTK
997 select SYS_SUPPORTS_ZBOOT
998 select SYS_SUPPORTS_ZBOOT_UART16550
1000 Support for systems based on Netlogic XLR and XLS processors.
1001 Say Y here if you have a XLR or XLS based board.
1003 config NLM_XLP_BOARD
1004 bool "Netlogic XLP based systems"
1007 select SYS_HAS_CPU_XLP
1008 select SYS_SUPPORTS_SMP
1010 select SYS_SUPPORTS_32BIT_KERNEL
1011 select SYS_SUPPORTS_64BIT_KERNEL
1012 select PHYS_ADDR_T_64BIT
1014 select SYS_SUPPORTS_BIG_ENDIAN
1015 select SYS_SUPPORTS_LITTLE_ENDIAN
1016 select SYS_SUPPORTS_HIGHMEM
1017 select NR_CPUS_DEFAULT_32
1021 select ZONE_DMA32 if 64BIT
1023 select SYS_HAS_EARLY_PRINTK
1025 select SYS_SUPPORTS_ZBOOT
1026 select SYS_SUPPORTS_ZBOOT_UART16550
1028 This board is based on Netlogic XLP Processor.
1029 Say Y here if you have a XLP based board.
1033 source "arch/mips/alchemy/Kconfig"
1034 source "arch/mips/ath25/Kconfig"
1035 source "arch/mips/ath79/Kconfig"
1036 source "arch/mips/bcm47xx/Kconfig"
1037 source "arch/mips/bcm63xx/Kconfig"
1038 source "arch/mips/bmips/Kconfig"
1039 source "arch/mips/generic/Kconfig"
1040 source "arch/mips/ingenic/Kconfig"
1041 source "arch/mips/jazz/Kconfig"
1042 source "arch/mips/lantiq/Kconfig"
1043 source "arch/mips/pic32/Kconfig"
1044 source "arch/mips/pistachio/Kconfig"
1045 source "arch/mips/ralink/Kconfig"
1046 source "arch/mips/sgi-ip27/Kconfig"
1047 source "arch/mips/sibyte/Kconfig"
1048 source "arch/mips/txx9/Kconfig"
1049 source "arch/mips/vr41xx/Kconfig"
1050 source "arch/mips/cavium-octeon/Kconfig"
1051 source "arch/mips/loongson2ef/Kconfig"
1052 source "arch/mips/loongson32/Kconfig"
1053 source "arch/mips/loongson64/Kconfig"
1054 source "arch/mips/netlogic/Kconfig"
1058 config GENERIC_HWEIGHT
1062 config GENERIC_CALIBRATE_DELAY
1066 config SCHED_OMIT_FRAME_POINTER
1071 # Select some configuration options automatically based on user selections.
1076 config ARCH_MAY_HAVE_PC_FDC
1107 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1113 config MIPS_CLOCK_VSYSCALL
1114 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1123 config ARCH_SUPPORTS_UPROBES
1126 config DMA_MAYBE_COHERENT
1127 select ARCH_HAS_DMA_COHERENCE_H
1128 select DMA_NONCOHERENT
1131 config DMA_PERDEV_COHERENT
1133 select ARCH_HAS_SETUP_DMA_OPS
1134 select DMA_NONCOHERENT
1136 config DMA_NONCOHERENT
1139 # MIPS allows mixing "slightly different" Cacheability and Coherency
1140 # Attribute bits. It is believed that the uncached access through
1141 # KSEG1 and the implementation specific "uncached accelerated" used
1142 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1143 # significant advantages.
1145 select ARCH_HAS_DMA_WRITE_COMBINE
1146 select ARCH_HAS_DMA_PREP_COHERENT
1147 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1148 select ARCH_HAS_DMA_SET_UNCACHED
1149 select DMA_NONCOHERENT_MMAP
1150 select NEED_DMA_MAP_STATE
1152 config SYS_HAS_EARLY_PRINTK
1155 config SYS_SUPPORTS_HOTPLUG_CPU
1158 config MIPS_BONITO64
1167 config NO_IOPORT_MAP
1171 def_bool CPU_NO_LOAD_STORE_LR
1173 config GENERIC_ISA_DMA
1175 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1178 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1180 select GENERIC_ISA_DMA
1182 config HAVE_PLAT_DELAY
1185 config HAVE_PLAT_FW_INIT_CMDLINE
1188 config HAVE_PLAT_MEMCPY
1194 config HOLES_IN_ZONE
1197 config SYS_SUPPORTS_RELOCATABLE
1200 Selected if the platform supports relocating the kernel.
1201 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1202 to allow access to command line and entropy sources.
1204 config MIPS_CBPF_JIT
1206 depends on BPF_JIT && HAVE_CBPF_JIT
1208 config MIPS_EBPF_JIT
1210 depends on BPF_JIT && HAVE_EBPF_JIT
1214 # Endianness selection. Sufficiently obscure so many users don't know what to
1215 # answer,so we try hard to limit the available choices. Also the use of a
1216 # choice statement should be more obvious to the user.
1219 prompt "Endianness selection"
1221 Some MIPS machines can be configured for either little or big endian
1222 byte order. These modes require different kernels and a different
1223 Linux distribution. In general there is one preferred byteorder for a
1224 particular system but some systems are just as commonly used in the
1225 one or the other endianness.
1227 config CPU_BIG_ENDIAN
1229 depends on SYS_SUPPORTS_BIG_ENDIAN
1231 config CPU_LITTLE_ENDIAN
1232 bool "Little endian"
1233 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1240 config SYS_SUPPORTS_APM_EMULATION
1243 config SYS_SUPPORTS_BIG_ENDIAN
1246 config SYS_SUPPORTS_LITTLE_ENDIAN
1249 config SYS_SUPPORTS_HUGETLBFS
1251 depends on CPU_SUPPORTS_HUGEPAGES
1254 config MIPS_HUGE_TLB_SUPPORT
1255 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1272 config PCI_GT64XXX_PCI0
1275 config PCI_XTALK_BRIDGE
1278 config NO_EXCEPT_FILL
1284 config SWAP_IO_SPACE
1287 config SGI_HAS_INDYDOG
1299 config SGI_HAS_ZILOG
1302 config SGI_HAS_I8042
1305 config DEFAULT_SGI_PARTITION
1317 config MIPS_L1_CACHE_SHIFT_4
1320 config MIPS_L1_CACHE_SHIFT_5
1323 config MIPS_L1_CACHE_SHIFT_6
1326 config MIPS_L1_CACHE_SHIFT_7
1329 config MIPS_L1_CACHE_SHIFT
1331 default "7" if MIPS_L1_CACHE_SHIFT_7
1332 default "6" if MIPS_L1_CACHE_SHIFT_6
1333 default "5" if MIPS_L1_CACHE_SHIFT_5
1334 default "4" if MIPS_L1_CACHE_SHIFT_4
1337 config ARC_CMDLINE_ONLY
1341 bool "ARC console support"
1342 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1356 menu "CPU selection"
1362 config CPU_LOONGSON64
1363 bool "Loongson 64-bit CPU"
1364 depends on SYS_HAS_CPU_LOONGSON64
1365 select ARCH_HAS_PHYS_TO_DMA
1367 select CPU_HAS_PREFETCH
1368 select CPU_SUPPORTS_64BIT_KERNEL
1369 select CPU_SUPPORTS_HIGHMEM
1370 select CPU_SUPPORTS_HUGEPAGES
1371 select CPU_SUPPORTS_MSA
1372 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1373 select CPU_MIPSR2_IRQ_VI
1374 select WEAK_ORDERING
1375 select WEAK_REORDERING_BEYOND_LLSC
1376 select MIPS_ASID_BITS_VARIABLE
1377 select MIPS_PGD_C0_CONTEXT
1378 select MIPS_L1_CACHE_SHIFT_6
1383 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1384 cores implements the MIPS64R2 instruction set with many extensions,
1385 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1386 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1387 Loongson-2E/2F is not covered here and will be removed in future.
1389 config LOONGSON3_ENHANCEMENT
1390 bool "New Loongson-3 CPU Enhancements"
1392 depends on CPU_LOONGSON64
1394 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1395 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1396 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1397 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1398 Fast TLB refill support, etc.
1400 This option enable those enhancements which are not probed at run
1401 time. If you want a generic kernel to run on all Loongson 3 machines,
1402 please say 'N' here. If you want a high-performance kernel to run on
1403 new Loongson-3 machines only, please say 'Y' here.
1405 config CPU_LOONGSON3_WORKAROUNDS
1406 bool "Old Loongson-3 LLSC Workarounds"
1408 depends on CPU_LOONGSON64
1410 Loongson-3 processors have the llsc issues which require workarounds.
1411 Without workarounds the system may hang unexpectedly.
1413 Newer Loongson-3 will fix these issues and no workarounds are needed.
1414 The workarounds have no significant side effect on them but may
1415 decrease the performance of the system so this option should be
1416 disabled unless the kernel is intended to be run on old systems.
1418 If unsure, please say Y.
1420 config CPU_LOONGSON3_CPUCFG_EMULATION
1421 bool "Emulate the CPUCFG instruction on older Loongson cores"
1423 depends on CPU_LOONGSON64
1425 Loongson-3A R4 and newer have the CPUCFG instruction available for
1426 userland to query CPU capabilities, much like CPUID on x86. This
1427 option provides emulation of the instruction on older Loongson
1428 cores, back to Loongson-3A1000.
1430 If unsure, please say Y.
1432 config CPU_LOONGSON2E
1434 depends on SYS_HAS_CPU_LOONGSON2E
1435 select CPU_LOONGSON2EF
1437 The Loongson 2E processor implements the MIPS III instruction set
1438 with many extensions.
1440 It has an internal FPGA northbridge, which is compatible to
1443 config CPU_LOONGSON2F
1445 depends on SYS_HAS_CPU_LOONGSON2F
1446 select CPU_LOONGSON2EF
1449 The Loongson 2F processor implements the MIPS III instruction set
1450 with many extensions.
1452 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1453 have a similar programming interface with FPGA northbridge used in
1456 config CPU_LOONGSON1B
1458 depends on SYS_HAS_CPU_LOONGSON1B
1459 select CPU_LOONGSON32
1460 select LEDS_GPIO_REGISTER
1462 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1463 Release 1 instruction set and part of the MIPS32 Release 2
1466 config CPU_LOONGSON1C
1468 depends on SYS_HAS_CPU_LOONGSON1C
1469 select CPU_LOONGSON32
1470 select LEDS_GPIO_REGISTER
1472 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1473 Release 1 instruction set and part of the MIPS32 Release 2
1476 config CPU_MIPS32_R1
1477 bool "MIPS32 Release 1"
1478 depends on SYS_HAS_CPU_MIPS32_R1
1479 select CPU_HAS_PREFETCH
1480 select CPU_SUPPORTS_32BIT_KERNEL
1481 select CPU_SUPPORTS_HIGHMEM
1483 Choose this option to build a kernel for release 1 or later of the
1484 MIPS32 architecture. Most modern embedded systems with a 32-bit
1485 MIPS processor are based on a MIPS32 processor. If you know the
1486 specific type of processor in your system, choose those that one
1487 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1488 Release 2 of the MIPS32 architecture is available since several
1489 years so chances are you even have a MIPS32 Release 2 processor
1490 in which case you should choose CPU_MIPS32_R2 instead for better
1493 config CPU_MIPS32_R2
1494 bool "MIPS32 Release 2"
1495 depends on SYS_HAS_CPU_MIPS32_R2
1496 select CPU_HAS_PREFETCH
1497 select CPU_SUPPORTS_32BIT_KERNEL
1498 select CPU_SUPPORTS_HIGHMEM
1499 select CPU_SUPPORTS_MSA
1502 Choose this option to build a kernel for release 2 or later of the
1503 MIPS32 architecture. Most modern embedded systems with a 32-bit
1504 MIPS processor are based on a MIPS32 processor. If you know the
1505 specific type of processor in your system, choose those that one
1506 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1508 config CPU_MIPS32_R5
1509 bool "MIPS32 Release 5"
1510 depends on SYS_HAS_CPU_MIPS32_R5
1511 select CPU_HAS_PREFETCH
1512 select CPU_SUPPORTS_32BIT_KERNEL
1513 select CPU_SUPPORTS_HIGHMEM
1514 select CPU_SUPPORTS_MSA
1516 select MIPS_O32_FP64_SUPPORT
1518 Choose this option to build a kernel for release 5 or later of the
1519 MIPS32 architecture. New MIPS processors, starting with the Warrior
1520 family, are based on a MIPS32r5 processor. If you own an older
1521 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1523 config CPU_MIPS32_R6
1524 bool "MIPS32 Release 6"
1525 depends on SYS_HAS_CPU_MIPS32_R6
1526 select CPU_HAS_PREFETCH
1527 select CPU_NO_LOAD_STORE_LR
1528 select CPU_SUPPORTS_32BIT_KERNEL
1529 select CPU_SUPPORTS_HIGHMEM
1530 select CPU_SUPPORTS_MSA
1532 select MIPS_O32_FP64_SUPPORT
1534 Choose this option to build a kernel for release 6 or later of the
1535 MIPS32 architecture. New MIPS processors, starting with the Warrior
1536 family, are based on a MIPS32r6 processor. If you own an older
1537 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1539 config CPU_MIPS64_R1
1540 bool "MIPS64 Release 1"
1541 depends on SYS_HAS_CPU_MIPS64_R1
1542 select CPU_HAS_PREFETCH
1543 select CPU_SUPPORTS_32BIT_KERNEL
1544 select CPU_SUPPORTS_64BIT_KERNEL
1545 select CPU_SUPPORTS_HIGHMEM
1546 select CPU_SUPPORTS_HUGEPAGES
1548 Choose this option to build a kernel for release 1 or later of the
1549 MIPS64 architecture. Many modern embedded systems with a 64-bit
1550 MIPS processor are based on a MIPS64 processor. If you know the
1551 specific type of processor in your system, choose those that one
1552 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1553 Release 2 of the MIPS64 architecture is available since several
1554 years so chances are you even have a MIPS64 Release 2 processor
1555 in which case you should choose CPU_MIPS64_R2 instead for better
1558 config CPU_MIPS64_R2
1559 bool "MIPS64 Release 2"
1560 depends on SYS_HAS_CPU_MIPS64_R2
1561 select CPU_HAS_PREFETCH
1562 select CPU_SUPPORTS_32BIT_KERNEL
1563 select CPU_SUPPORTS_64BIT_KERNEL
1564 select CPU_SUPPORTS_HIGHMEM
1565 select CPU_SUPPORTS_HUGEPAGES
1566 select CPU_SUPPORTS_MSA
1569 Choose this option to build a kernel for release 2 or later of the
1570 MIPS64 architecture. Many modern embedded systems with a 64-bit
1571 MIPS processor are based on a MIPS64 processor. If you know the
1572 specific type of processor in your system, choose those that one
1573 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1575 config CPU_MIPS64_R5
1576 bool "MIPS64 Release 5"
1577 depends on SYS_HAS_CPU_MIPS64_R5
1578 select CPU_HAS_PREFETCH
1579 select CPU_SUPPORTS_32BIT_KERNEL
1580 select CPU_SUPPORTS_64BIT_KERNEL
1581 select CPU_SUPPORTS_HIGHMEM
1582 select CPU_SUPPORTS_HUGEPAGES
1583 select CPU_SUPPORTS_MSA
1584 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1587 Choose this option to build a kernel for release 5 or later of the
1588 MIPS64 architecture. This is a intermediate MIPS architecture
1589 release partly implementing release 6 features. Though there is no
1590 any hardware known to be based on this release.
1592 config CPU_MIPS64_R6
1593 bool "MIPS64 Release 6"
1594 depends on SYS_HAS_CPU_MIPS64_R6
1595 select CPU_HAS_PREFETCH
1596 select CPU_NO_LOAD_STORE_LR
1597 select CPU_SUPPORTS_32BIT_KERNEL
1598 select CPU_SUPPORTS_64BIT_KERNEL
1599 select CPU_SUPPORTS_HIGHMEM
1600 select CPU_SUPPORTS_HUGEPAGES
1601 select CPU_SUPPORTS_MSA
1602 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1605 Choose this option to build a kernel for release 6 or later of the
1606 MIPS64 architecture. New MIPS processors, starting with the Warrior
1607 family, are based on a MIPS64r6 processor. If you own an older
1608 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1611 bool "MIPS Warrior P5600"
1612 depends on SYS_HAS_CPU_P5600
1613 select CPU_HAS_PREFETCH
1614 select CPU_SUPPORTS_32BIT_KERNEL
1615 select CPU_SUPPORTS_HIGHMEM
1616 select CPU_SUPPORTS_MSA
1617 select CPU_SUPPORTS_CPUFREQ
1618 select CPU_MIPSR2_IRQ_VI
1619 select CPU_MIPSR2_IRQ_EI
1621 select MIPS_O32_FP64_SUPPORT
1623 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1624 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1625 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1626 level features like up to six P5600 calculation cores, CM2 with L2
1627 cache, IOCU/IOMMU (though might be unused depending on the system-
1628 specific IP core configuration), GIC, CPC, virtualisation module,
1633 depends on SYS_HAS_CPU_R3000
1636 select CPU_SUPPORTS_32BIT_KERNEL
1637 select CPU_SUPPORTS_HIGHMEM
1639 Please make sure to pick the right CPU type. Linux/MIPS is not
1640 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1641 *not* work on R4000 machines and vice versa. However, since most
1642 of the supported machines have an R4000 (or similar) CPU, R4x00
1643 might be a safe bet. If the resulting kernel does not work,
1644 try to recompile with R3000.
1648 depends on SYS_HAS_CPU_TX39XX
1649 select CPU_SUPPORTS_32BIT_KERNEL
1654 depends on SYS_HAS_CPU_VR41XX
1655 select CPU_SUPPORTS_32BIT_KERNEL
1656 select CPU_SUPPORTS_64BIT_KERNEL
1658 The options selects support for the NEC VR4100 series of processors.
1659 Only choose this option if you have one of these processors as a
1660 kernel built with this option will not run on any other type of
1661 processor or vice versa.
1665 depends on SYS_HAS_CPU_R4X00
1666 select CPU_SUPPORTS_32BIT_KERNEL
1667 select CPU_SUPPORTS_64BIT_KERNEL
1668 select CPU_SUPPORTS_HUGEPAGES
1670 MIPS Technologies R4000-series processors other than 4300, including
1671 the R4000, R4400, R4600, and 4700.
1675 depends on SYS_HAS_CPU_TX49XX
1676 select CPU_HAS_PREFETCH
1677 select CPU_SUPPORTS_32BIT_KERNEL
1678 select CPU_SUPPORTS_64BIT_KERNEL
1679 select CPU_SUPPORTS_HUGEPAGES
1683 depends on SYS_HAS_CPU_R5000
1684 select CPU_SUPPORTS_32BIT_KERNEL
1685 select CPU_SUPPORTS_64BIT_KERNEL
1686 select CPU_SUPPORTS_HUGEPAGES
1688 MIPS Technologies R5000-series processors other than the Nevada.
1692 depends on SYS_HAS_CPU_R5500
1693 select CPU_SUPPORTS_32BIT_KERNEL
1694 select CPU_SUPPORTS_64BIT_KERNEL
1695 select CPU_SUPPORTS_HUGEPAGES
1697 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1702 depends on SYS_HAS_CPU_NEVADA
1703 select CPU_SUPPORTS_32BIT_KERNEL
1704 select CPU_SUPPORTS_64BIT_KERNEL
1705 select CPU_SUPPORTS_HUGEPAGES
1707 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1711 depends on SYS_HAS_CPU_R10000
1712 select CPU_HAS_PREFETCH
1713 select CPU_SUPPORTS_32BIT_KERNEL
1714 select CPU_SUPPORTS_64BIT_KERNEL
1715 select CPU_SUPPORTS_HIGHMEM
1716 select CPU_SUPPORTS_HUGEPAGES
1718 MIPS Technologies R10000-series processors.
1722 depends on SYS_HAS_CPU_RM7000
1723 select CPU_HAS_PREFETCH
1724 select CPU_SUPPORTS_32BIT_KERNEL
1725 select CPU_SUPPORTS_64BIT_KERNEL
1726 select CPU_SUPPORTS_HIGHMEM
1727 select CPU_SUPPORTS_HUGEPAGES
1731 depends on SYS_HAS_CPU_SB1
1732 select CPU_SUPPORTS_32BIT_KERNEL
1733 select CPU_SUPPORTS_64BIT_KERNEL
1734 select CPU_SUPPORTS_HIGHMEM
1735 select CPU_SUPPORTS_HUGEPAGES
1736 select WEAK_ORDERING
1738 config CPU_CAVIUM_OCTEON
1739 bool "Cavium Octeon processor"
1740 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1741 select CPU_HAS_PREFETCH
1742 select CPU_SUPPORTS_64BIT_KERNEL
1743 select WEAK_ORDERING
1744 select CPU_SUPPORTS_HIGHMEM
1745 select CPU_SUPPORTS_HUGEPAGES
1746 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1747 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1748 select MIPS_L1_CACHE_SHIFT_7
1751 The Cavium Octeon processor is a highly integrated chip containing
1752 many ethernet hardware widgets for networking tasks. The processor
1753 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1754 Full details can be found at http://www.caviumnetworks.com.
1757 bool "Broadcom BMIPS"
1758 depends on SYS_HAS_CPU_BMIPS
1760 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1761 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1762 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1763 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1764 select CPU_SUPPORTS_32BIT_KERNEL
1765 select DMA_NONCOHERENT
1767 select SWAP_IO_SPACE
1768 select WEAK_ORDERING
1769 select CPU_SUPPORTS_HIGHMEM
1770 select CPU_HAS_PREFETCH
1771 select CPU_SUPPORTS_CPUFREQ
1772 select MIPS_EXTERNAL_TIMER
1774 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1777 bool "Netlogic XLR SoC"
1778 depends on SYS_HAS_CPU_XLR
1779 select CPU_SUPPORTS_32BIT_KERNEL
1780 select CPU_SUPPORTS_64BIT_KERNEL
1781 select CPU_SUPPORTS_HIGHMEM
1782 select CPU_SUPPORTS_HUGEPAGES
1783 select WEAK_ORDERING
1784 select WEAK_REORDERING_BEYOND_LLSC
1786 Netlogic Microsystems XLR/XLS processors.
1789 bool "Netlogic XLP SoC"
1790 depends on SYS_HAS_CPU_XLP
1791 select CPU_SUPPORTS_32BIT_KERNEL
1792 select CPU_SUPPORTS_64BIT_KERNEL
1793 select CPU_SUPPORTS_HIGHMEM
1794 select WEAK_ORDERING
1795 select WEAK_REORDERING_BEYOND_LLSC
1796 select CPU_HAS_PREFETCH
1798 select CPU_SUPPORTS_HUGEPAGES
1799 select MIPS_ASID_BITS_VARIABLE
1801 Netlogic Microsystems XLP processors.
1804 config CPU_MIPS32_3_5_FEATURES
1805 bool "MIPS32 Release 3.5 Features"
1806 depends on SYS_HAS_CPU_MIPS32_R3_5
1807 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1810 Choose this option to build a kernel for release 2 or later of the
1811 MIPS32 architecture including features from the 3.5 release such as
1812 support for Enhanced Virtual Addressing (EVA).
1814 config CPU_MIPS32_3_5_EVA
1815 bool "Enhanced Virtual Addressing (EVA)"
1816 depends on CPU_MIPS32_3_5_FEATURES
1820 Choose this option if you want to enable the Enhanced Virtual
1821 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1822 One of its primary benefits is an increase in the maximum size
1823 of lowmem (up to 3GB). If unsure, say 'N' here.
1825 config CPU_MIPS32_R5_FEATURES
1826 bool "MIPS32 Release 5 Features"
1827 depends on SYS_HAS_CPU_MIPS32_R5
1828 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1830 Choose this option to build a kernel for release 2 or later of the
1831 MIPS32 architecture including features from release 5 such as
1832 support for Extended Physical Addressing (XPA).
1834 config CPU_MIPS32_R5_XPA
1835 bool "Extended Physical Addressing (XPA)"
1836 depends on CPU_MIPS32_R5_FEATURES
1838 depends on !PAGE_SIZE_4KB
1839 depends on SYS_SUPPORTS_HIGHMEM
1842 select PHYS_ADDR_T_64BIT
1845 Choose this option if you want to enable the Extended Physical
1846 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1847 benefit is to increase physical addressing equal to or greater
1848 than 40 bits. Note that this has the side effect of turning on
1849 64-bit addressing which in turn makes the PTEs 64-bit in size.
1850 If unsure, say 'N' here.
1853 config CPU_NOP_WORKAROUNDS
1856 config CPU_JUMP_WORKAROUNDS
1859 config CPU_LOONGSON2F_WORKAROUNDS
1860 bool "Loongson 2F Workarounds"
1862 select CPU_NOP_WORKAROUNDS
1863 select CPU_JUMP_WORKAROUNDS
1865 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1866 require workarounds. Without workarounds the system may hang
1867 unexpectedly. For more information please refer to the gas
1868 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1870 Loongson 2F03 and later have fixed these issues and no workarounds
1871 are needed. The workarounds have no significant side effect on them
1872 but may decrease the performance of the system so this option should
1873 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1876 If unsure, please say Y.
1877 endif # CPU_LOONGSON2F
1879 config SYS_SUPPORTS_ZBOOT
1881 select HAVE_KERNEL_GZIP
1882 select HAVE_KERNEL_BZIP2
1883 select HAVE_KERNEL_LZ4
1884 select HAVE_KERNEL_LZMA
1885 select HAVE_KERNEL_LZO
1886 select HAVE_KERNEL_XZ
1887 select HAVE_KERNEL_ZSTD
1889 config SYS_SUPPORTS_ZBOOT_UART16550
1891 select SYS_SUPPORTS_ZBOOT
1893 config SYS_SUPPORTS_ZBOOT_UART_PROM
1895 select SYS_SUPPORTS_ZBOOT
1897 config CPU_LOONGSON2EF
1899 select CPU_SUPPORTS_32BIT_KERNEL
1900 select CPU_SUPPORTS_64BIT_KERNEL
1901 select CPU_SUPPORTS_HIGHMEM
1902 select CPU_SUPPORTS_HUGEPAGES
1903 select ARCH_HAS_PHYS_TO_DMA
1905 config CPU_LOONGSON32
1909 select CPU_HAS_PREFETCH
1910 select CPU_SUPPORTS_32BIT_KERNEL
1911 select CPU_SUPPORTS_HIGHMEM
1912 select CPU_SUPPORTS_CPUFREQ
1914 config CPU_BMIPS32_3300
1915 select SMP_UP if SMP
1918 config CPU_BMIPS4350
1920 select SYS_SUPPORTS_SMP
1921 select SYS_SUPPORTS_HOTPLUG_CPU
1923 config CPU_BMIPS4380
1925 select MIPS_L1_CACHE_SHIFT_6
1926 select SYS_SUPPORTS_SMP
1927 select SYS_SUPPORTS_HOTPLUG_CPU
1930 config CPU_BMIPS5000
1932 select MIPS_CPU_SCACHE
1933 select MIPS_L1_CACHE_SHIFT_7
1934 select SYS_SUPPORTS_SMP
1935 select SYS_SUPPORTS_HOTPLUG_CPU
1938 config SYS_HAS_CPU_LOONGSON64
1940 select CPU_SUPPORTS_CPUFREQ
1943 config SYS_HAS_CPU_LOONGSON2E
1946 config SYS_HAS_CPU_LOONGSON2F
1948 select CPU_SUPPORTS_CPUFREQ
1949 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1951 config SYS_HAS_CPU_LOONGSON1B
1954 config SYS_HAS_CPU_LOONGSON1C
1957 config SYS_HAS_CPU_MIPS32_R1
1960 config SYS_HAS_CPU_MIPS32_R2
1963 config SYS_HAS_CPU_MIPS32_R3_5
1966 config SYS_HAS_CPU_MIPS32_R5
1968 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1970 config SYS_HAS_CPU_MIPS32_R6
1972 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1974 config SYS_HAS_CPU_MIPS64_R1
1977 config SYS_HAS_CPU_MIPS64_R2
1980 config SYS_HAS_CPU_MIPS64_R6
1982 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1984 config SYS_HAS_CPU_P5600
1986 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1988 config SYS_HAS_CPU_R3000
1991 config SYS_HAS_CPU_TX39XX
1994 config SYS_HAS_CPU_VR41XX
1997 config SYS_HAS_CPU_R4X00
2000 config SYS_HAS_CPU_TX49XX
2003 config SYS_HAS_CPU_R5000
2006 config SYS_HAS_CPU_R5500
2009 config SYS_HAS_CPU_NEVADA
2012 config SYS_HAS_CPU_R10000
2014 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2016 config SYS_HAS_CPU_RM7000
2019 config SYS_HAS_CPU_SB1
2022 config SYS_HAS_CPU_CAVIUM_OCTEON
2025 config SYS_HAS_CPU_BMIPS
2028 config SYS_HAS_CPU_BMIPS32_3300
2030 select SYS_HAS_CPU_BMIPS
2032 config SYS_HAS_CPU_BMIPS4350
2034 select SYS_HAS_CPU_BMIPS
2036 config SYS_HAS_CPU_BMIPS4380
2038 select SYS_HAS_CPU_BMIPS
2040 config SYS_HAS_CPU_BMIPS5000
2042 select SYS_HAS_CPU_BMIPS
2043 select ARCH_HAS_SYNC_DMA_FOR_CPU
2045 config SYS_HAS_CPU_XLR
2048 config SYS_HAS_CPU_XLP
2052 # CPU may reorder R->R, R->W, W->R, W->W
2053 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2055 config WEAK_ORDERING
2059 # CPU may reorder reads and writes beyond LL/SC
2060 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2062 config WEAK_REORDERING_BEYOND_LLSC
2067 # These two indicate any level of the MIPS32 and MIPS64 architecture
2071 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2072 CPU_MIPS32_R6 || CPU_P5600
2076 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2080 # These indicate the revision of the architecture
2084 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2088 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2090 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2095 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2097 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2102 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2104 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2105 select HAVE_ARCH_BITREVERSE
2106 select MIPS_ASID_BITS_VARIABLE
2107 select MIPS_CRC_SUPPORT
2110 config TARGET_ISA_REV
2112 default 1 if CPU_MIPSR1
2113 default 2 if CPU_MIPSR2
2114 default 5 if CPU_MIPSR5
2115 default 6 if CPU_MIPSR6
2118 Reflects the ISA revision being targeted by the kernel build. This
2119 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2127 config SYS_SUPPORTS_32BIT_KERNEL
2129 config SYS_SUPPORTS_64BIT_KERNEL
2131 config CPU_SUPPORTS_32BIT_KERNEL
2133 config CPU_SUPPORTS_64BIT_KERNEL
2135 config CPU_SUPPORTS_CPUFREQ
2137 config CPU_SUPPORTS_ADDRWINCFG
2139 config CPU_SUPPORTS_HUGEPAGES
2141 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2142 config MIPS_PGD_C0_CONTEXT
2144 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2147 # Set to y for ptrace access to watch registers.
2149 config HARDWARE_WATCHPOINTS
2151 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2156 prompt "Kernel code model"
2158 You should only select this option if you have a workload that
2159 actually benefits from 64-bit processing or if your machine has
2160 large memory. You will only be presented a single option in this
2161 menu if your system does not support both 32-bit and 64-bit kernels.
2164 bool "32-bit kernel"
2165 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2168 Select this option if you want to build a 32-bit kernel.
2171 bool "64-bit kernel"
2172 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2174 Select this option if you want to build a 64-bit kernel.
2179 bool "KVM Guest Kernel"
2180 depends on CPU_MIPS32_R2
2181 depends on BROKEN_ON_SMP
2183 Select this option if building a guest kernel for KVM (Trap & Emulate)
2186 config KVM_GUEST_TIMER_FREQ
2187 int "Count/Compare Timer Frequency (MHz)"
2188 depends on KVM_GUEST
2191 Set this to non-zero if building a guest kernel for KVM to skip RTC
2192 emulation when determining guest CPU Frequency. Instead, the guest's
2193 timer frequency is specified directly.
2195 config MIPS_VA_BITS_48
2196 bool "48 bits virtual memory"
2199 Support a maximum at least 48 bits of application virtual
2200 memory. Default is 40 bits or less, depending on the CPU.
2201 For page sizes 16k and above, this option results in a small
2202 memory overhead for page tables. For 4k page size, a fourth
2203 level of page tables is added which imposes both a memory
2204 overhead as well as slower TLB fault handling.
2209 prompt "Kernel page size"
2210 default PAGE_SIZE_4KB
2212 config PAGE_SIZE_4KB
2214 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2216 This option select the standard 4kB Linux page size. On some
2217 R3000-family processors this is the only available page size. Using
2218 4kB page size will minimize memory consumption and is therefore
2219 recommended for low memory systems.
2221 config PAGE_SIZE_8KB
2223 depends on CPU_CAVIUM_OCTEON
2224 depends on !MIPS_VA_BITS_48
2226 Using 8kB page size will result in higher performance kernel at
2227 the price of higher memory consumption. This option is available
2228 only on cnMIPS processors. Note that you will need a suitable Linux
2229 distribution to support this.
2231 config PAGE_SIZE_16KB
2233 depends on !CPU_R3000 && !CPU_TX39XX
2235 Using 16kB page size will result in higher performance kernel at
2236 the price of higher memory consumption. This option is available on
2237 all non-R3000 family processors. Note that you will need a suitable
2238 Linux distribution to support this.
2240 config PAGE_SIZE_32KB
2242 depends on CPU_CAVIUM_OCTEON
2243 depends on !MIPS_VA_BITS_48
2245 Using 32kB page size will result in higher performance kernel at
2246 the price of higher memory consumption. This option is available
2247 only on cnMIPS cores. Note that you will need a suitable Linux
2248 distribution to support this.
2250 config PAGE_SIZE_64KB
2252 depends on !CPU_R3000 && !CPU_TX39XX
2254 Using 64kB page size will result in higher performance kernel at
2255 the price of higher memory consumption. This option is available on
2256 all non-R3000 family processor. Not that at the time of this
2257 writing this option is still high experimental.
2261 config FORCE_MAX_ZONEORDER
2262 int "Maximum zone order"
2263 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2264 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2265 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2266 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2267 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2268 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2272 The kernel memory allocator divides physically contiguous memory
2273 blocks into "zones", where each zone is a power of two number of
2274 pages. This option selects the largest power of two that the kernel
2275 keeps in the memory allocator. If you need to allocate very large
2276 blocks of physically contiguous memory, then you may need to
2277 increase this value.
2279 This config option is actually maximum order plus one. For example,
2280 a value of 11 means that the largest free memory block is 2^10 pages.
2282 The page size is not necessarily 4KB. Keep this in mind
2283 when choosing a value for this option.
2288 config IP22_CPU_SCACHE
2293 # Support for a MIPS32 / MIPS64 style S-caches
2295 config MIPS_CPU_SCACHE
2299 config R5000_CPU_SCACHE
2303 config RM7000_CPU_SCACHE
2307 config SIBYTE_DMA_PAGEOPS
2308 bool "Use DMA to clear/copy pages"
2311 Instead of using the CPU to zero and copy pages, use a Data Mover
2312 channel. These DMA channels are otherwise unused by the standard
2313 SiByte Linux port. Seems to give a small performance benefit.
2315 config CPU_HAS_PREFETCH
2318 config CPU_GENERIC_DUMP_TLB
2320 default y if !(CPU_R3000 || CPU_TX39XX)
2322 config MIPS_FP_SUPPORT
2323 bool "Floating Point support" if EXPERT
2326 Select y to include support for floating point in the kernel
2327 including initialization of FPU hardware, FP context save & restore
2328 and emulation of an FPU where necessary. Without this support any
2329 userland program attempting to use floating point instructions will
2332 If you know that your userland will not attempt to use floating point
2333 instructions then you can say n here to shrink the kernel a little.
2337 config CPU_R2300_FPU
2339 depends on MIPS_FP_SUPPORT
2340 default y if CPU_R3000 || CPU_TX39XX
2347 depends on MIPS_FP_SUPPORT
2348 default y if !CPU_R2300_FPU
2350 config CPU_R4K_CACHE_TLB
2352 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2355 bool "MIPS MT SMP support (1 TC on each available VPE)"
2357 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2358 select CPU_MIPSR2_IRQ_VI
2359 select CPU_MIPSR2_IRQ_EI
2364 select SYS_SUPPORTS_SMP
2365 select SYS_SUPPORTS_SCHED_SMT
2366 select MIPS_PERF_SHARED_TC_COUNTERS
2368 This is a kernel model which is known as SMVP. This is supported
2369 on cores with the MT ASE and uses the available VPEs to implement
2370 virtual processors which supports SMP. This is equivalent to the
2371 Intel Hyperthreading feature. For further information go to
2372 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2378 bool "SMT (multithreading) scheduler support"
2379 depends on SYS_SUPPORTS_SCHED_SMT
2382 SMT scheduler support improves the CPU scheduler's decision making
2383 when dealing with MIPS MT enabled cores at a cost of slightly
2384 increased overhead in some places. If unsure say N here.
2386 config SYS_SUPPORTS_SCHED_SMT
2389 config SYS_SUPPORTS_MULTITHREADING
2392 config MIPS_MT_FPAFF
2393 bool "Dynamic FPU affinity for FP-intensive threads"
2395 depends on MIPS_MT_SMP
2397 config MIPSR2_TO_R6_EMULATOR
2398 bool "MIPS R2-to-R6 emulator"
2399 depends on CPU_MIPSR6
2400 depends on MIPS_FP_SUPPORT
2403 Choose this option if you want to run non-R6 MIPS userland code.
2404 Even if you say 'Y' here, the emulator will still be disabled by
2405 default. You can enable it using the 'mipsr2emu' kernel option.
2406 The only reason this is a build-time option is to save ~14K from the
2409 config SYS_SUPPORTS_VPE_LOADER
2411 depends on SYS_SUPPORTS_MULTITHREADING
2413 Indicates that the platform supports the VPE loader, and provides
2416 config MIPS_VPE_LOADER
2417 bool "VPE loader support."
2418 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2419 select CPU_MIPSR2_IRQ_VI
2420 select CPU_MIPSR2_IRQ_EI
2423 Includes a loader for loading an elf relocatable object
2424 onto another VPE and running it.
2426 config MIPS_VPE_LOADER_CMP
2429 depends on MIPS_VPE_LOADER && MIPS_CMP
2431 config MIPS_VPE_LOADER_MT
2434 depends on MIPS_VPE_LOADER && !MIPS_CMP
2436 config MIPS_VPE_LOADER_TOM
2437 bool "Load VPE program into memory hidden from linux"
2438 depends on MIPS_VPE_LOADER
2441 The loader can use memory that is present but has been hidden from
2442 Linux using the kernel command line option "mem=xxMB". It's up to
2443 you to ensure the amount you put in the option and the space your
2444 program requires is less or equal to the amount physically present.
2446 config MIPS_VPE_APSP_API
2447 bool "Enable support for AP/SP API (RTLX)"
2448 depends on MIPS_VPE_LOADER
2450 config MIPS_VPE_APSP_API_CMP
2453 depends on MIPS_VPE_APSP_API && MIPS_CMP
2455 config MIPS_VPE_APSP_API_MT
2458 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2461 bool "MIPS CMP framework support (DEPRECATED)"
2462 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2465 select SYS_SUPPORTS_SMP
2466 select WEAK_ORDERING
2469 Select this if you are using a bootloader which implements the "CMP
2470 framework" protocol (ie. YAMON) and want your kernel to make use of
2471 its ability to start secondary CPUs.
2473 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2477 bool "MIPS Coherent Processing System support"
2478 depends on SYS_SUPPORTS_MIPS_CPS
2480 select MIPS_CPS_PM if HOTPLUG_CPU
2482 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2483 select SYS_SUPPORTS_HOTPLUG_CPU
2484 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2485 select SYS_SUPPORTS_SMP
2486 select WEAK_ORDERING
2488 Select this if you wish to run an SMP kernel across multiple cores
2489 within a MIPS Coherent Processing System. When this option is
2490 enabled the kernel will probe for other cores and boot them with
2491 no external assistance. It is safe to enable this when hardware
2492 support is unavailable.
2505 config SB1_PASS_2_WORKAROUNDS
2507 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2510 config SB1_PASS_2_1_WORKAROUNDS
2512 depends on CPU_SB1 && CPU_SB1_PASS_2
2516 prompt "SmartMIPS or microMIPS ASE support"
2518 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2521 Select this if you want neither microMIPS nor SmartMIPS support
2523 config CPU_HAS_SMARTMIPS
2524 depends on SYS_SUPPORTS_SMARTMIPS
2527 SmartMIPS is a extension of the MIPS32 architecture aimed at
2528 increased security at both hardware and software level for
2529 smartcards. Enabling this option will allow proper use of the
2530 SmartMIPS instructions by Linux applications. However a kernel with
2531 this option will not work on a MIPS core without SmartMIPS core. If
2532 you don't know you probably don't have SmartMIPS and should say N
2535 config CPU_MICROMIPS
2536 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2539 When this option is enabled the kernel will be built using the
2545 bool "Support for the MIPS SIMD Architecture"
2546 depends on CPU_SUPPORTS_MSA
2547 depends on MIPS_FP_SUPPORT
2548 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2550 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2551 and a set of SIMD instructions to operate on them. When this option
2552 is enabled the kernel will support allocating & switching MSA
2553 vector register contexts. If you know that your kernel will only be
2554 running on CPUs which do not support MSA or that your userland will
2555 not be making use of it then you may wish to say N here to reduce
2556 the size & complexity of your kernel.
2567 depends on !CPU_DIEI_BROKEN
2570 config CPU_DIEI_BROKEN
2576 config CPU_NO_LOAD_STORE_LR
2579 CPU lacks support for unaligned load and store instructions:
2580 LWL, LWR, SWL, SWR (Load/store word left/right).
2581 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2585 # Vectored interrupt mode is an R2 feature
2587 config CPU_MIPSR2_IRQ_VI
2591 # Extended interrupt mode is an R2 feature
2593 config CPU_MIPSR2_IRQ_EI
2598 depends on !CPU_R3000
2604 config CPU_DADDI_WORKAROUNDS
2607 config CPU_R4000_WORKAROUNDS
2609 select CPU_R4400_WORKAROUNDS
2611 config CPU_R4400_WORKAROUNDS
2614 config CPU_R4X00_BUGS64
2616 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2618 config MIPS_ASID_SHIFT
2620 default 6 if CPU_R3000 || CPU_TX39XX
2623 config MIPS_ASID_BITS
2625 default 0 if MIPS_ASID_BITS_VARIABLE
2626 default 6 if CPU_R3000 || CPU_TX39XX
2629 config MIPS_ASID_BITS_VARIABLE
2632 config MIPS_CRC_SUPPORT
2635 # R4600 erratum. Due to the lack of errata information the exact
2636 # technical details aren't known. I've experimentally found that disabling
2637 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2639 config WAR_R4600_V1_INDEX_ICACHEOP
2642 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2644 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2645 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2646 # executed if there is no other dcache activity. If the dcache is
2647 # accessed for another instruction immeidately preceding when these
2648 # cache instructions are executing, it is possible that the dcache
2649 # tag match outputs used by these cache instructions will be
2650 # incorrect. These cache instructions should be preceded by at least
2651 # four instructions that are not any kind of load or store
2654 # This is not allowed: lw
2658 # cache Hit_Writeback_Invalidate_D
2660 # This is allowed: lw
2665 # cache Hit_Writeback_Invalidate_D
2666 config WAR_R4600_V1_HIT_CACHEOP
2669 # Writeback and invalidate the primary cache dcache before DMA.
2671 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2672 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2673 # operate correctly if the internal data cache refill buffer is empty. These
2674 # CACHE instructions should be separated from any potential data cache miss
2675 # by a load instruction to an uncached address to empty the response buffer."
2676 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2678 config WAR_R4600_V2_HIT_CACHEOP
2681 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2682 # the line which this instruction itself exists, the following
2683 # operation is not guaranteed."
2685 # Workaround: do two phase flushing for Index_Invalidate_I
2686 config WAR_TX49XX_ICACHE_INDEX_INV
2689 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2690 # opposes it being called that) where invalid instructions in the same
2691 # I-cache line worth of instructions being fetched may case spurious
2693 config WAR_ICACHE_REFILLS
2696 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2697 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2698 config WAR_R10000_LLSC
2701 # 34K core erratum: "Problems Executing the TLBR Instruction"
2702 config WAR_MIPS34K_MISSED_ITLB
2706 # - Highmem only makes sense for the 32-bit kernel.
2707 # - The current highmem code will only work properly on physically indexed
2708 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2709 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2710 # moment we protect the user and offer the highmem option only on machines
2711 # where it's known to be safe. This will not offer highmem on a few systems
2712 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2713 # indexed CPUs but we're playing safe.
2714 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2715 # know they might have memory configurations that could make use of highmem
2719 bool "High Memory Support"
2720 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2723 config CPU_SUPPORTS_HIGHMEM
2726 config SYS_SUPPORTS_HIGHMEM
2729 config SYS_SUPPORTS_SMARTMIPS
2732 config SYS_SUPPORTS_MICROMIPS
2735 config SYS_SUPPORTS_MIPS16
2738 This option must be set if a kernel might be executed on a MIPS16-
2739 enabled CPU even if MIPS16 is not actually being used. In other
2740 words, it makes the kernel MIPS16-tolerant.
2742 config CPU_SUPPORTS_MSA
2745 config ARCH_FLATMEM_ENABLE
2747 depends on !NUMA && !CPU_LOONGSON2EF
2749 config ARCH_SPARSEMEM_ENABLE
2751 select SPARSEMEM_STATIC if !SGI_IP27
2755 depends on SYS_SUPPORTS_NUMA
2757 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2758 Access). This option improves performance on systems with more
2759 than two nodes; on two node systems it is generally better to
2760 leave it disabled; on single node systems leave this option
2763 config SYS_SUPPORTS_NUMA
2766 config HAVE_SETUP_PER_CPU_AREA
2770 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2775 bool "Relocatable kernel"
2776 depends on SYS_SUPPORTS_RELOCATABLE
2777 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2778 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2779 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2780 CPU_P5600 || CAVIUM_OCTEON_SOC
2782 This builds a kernel image that retains relocation information
2783 so it can be loaded someplace besides the default 1MB.
2784 The relocations make the kernel binary about 15% larger,
2785 but are discarded at runtime
2787 config RELOCATION_TABLE_SIZE
2788 hex "Relocation table size"
2789 depends on RELOCATABLE
2790 range 0x0 0x01000000
2791 default "0x00100000"
2793 A table of relocation data will be appended to the kernel binary
2794 and parsed at boot to fix up the relocated kernel.
2796 This option allows the amount of space reserved for the table to be
2797 adjusted, although the default of 1Mb should be ok in most cases.
2799 The build will fail and a valid size suggested if this is too small.
2801 If unsure, leave at the default value.
2803 config RANDOMIZE_BASE
2804 bool "Randomize the address of the kernel image"
2805 depends on RELOCATABLE
2807 Randomizes the physical and virtual address at which the
2808 kernel image is loaded, as a security feature that
2809 deters exploit attempts relying on knowledge of the location
2810 of kernel internals.
2812 Entropy is generated using any coprocessor 0 registers available.
2814 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2818 config RANDOMIZE_BASE_MAX_OFFSET
2819 hex "Maximum kASLR offset" if EXPERT
2820 depends on RANDOMIZE_BASE
2821 range 0x0 0x40000000 if EVA || 64BIT
2822 range 0x0 0x08000000
2823 default "0x01000000"
2825 When kASLR is active, this provides the maximum offset that will
2826 be applied to the kernel image. It should be set according to the
2827 amount of physical RAM available in the target system minus
2828 PHYSICAL_START and must be a power of 2.
2830 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2831 EVA or 64-bit. The default is 16Mb.
2836 depends on NEED_MULTIPLE_NODES
2838 config HW_PERF_EVENTS
2839 bool "Enable hardware performance counter support for perf events"
2840 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2843 Enable hardware performance counter support for perf events. If
2844 disabled, perf events will use software events only.
2847 bool "Enable DMI scanning"
2848 depends on MACH_LOONGSON64
2849 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2852 Enabled scanning of DMI to identify machine quirks. Say Y
2853 here unless you have verified that your setup is not
2854 affected by entries in the DMI blacklist. Required by PNP
2858 bool "Multi-Processing support"
2859 depends on SYS_SUPPORTS_SMP
2861 This enables support for systems with more than one CPU. If you have
2862 a system with only one CPU, say N. If you have a system with more
2863 than one CPU, say Y.
2865 If you say N here, the kernel will run on uni- and multiprocessor
2866 machines, but will use only one CPU of a multiprocessor machine. If
2867 you say Y here, the kernel will run on many, but not all,
2868 uniprocessor machines. On a uniprocessor machine, the kernel
2869 will run faster if you say N here.
2871 People using multiprocessor machines who say Y here should also say
2872 Y to "Enhanced Real Time Clock Support", below.
2874 See also the SMP-HOWTO available at
2875 <https://www.tldp.org/docs.html#howto>.
2877 If you don't know what to do here, say N.
2880 bool "Support for hot-pluggable CPUs"
2881 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2883 Say Y here to allow turning CPUs off and on. CPUs can be
2884 controlled through /sys/devices/system/cpu.
2885 (Note: power management support will enable this option
2886 automatically on SMP systems. )
2887 Say N if you want to disable CPU hotplug.
2892 config SYS_SUPPORTS_MIPS_CMP
2895 config SYS_SUPPORTS_MIPS_CPS
2898 config SYS_SUPPORTS_SMP
2901 config NR_CPUS_DEFAULT_4
2904 config NR_CPUS_DEFAULT_8
2907 config NR_CPUS_DEFAULT_16
2910 config NR_CPUS_DEFAULT_32
2913 config NR_CPUS_DEFAULT_64
2917 int "Maximum number of CPUs (2-256)"
2920 default "4" if NR_CPUS_DEFAULT_4
2921 default "8" if NR_CPUS_DEFAULT_8
2922 default "16" if NR_CPUS_DEFAULT_16
2923 default "32" if NR_CPUS_DEFAULT_32
2924 default "64" if NR_CPUS_DEFAULT_64
2926 This allows you to specify the maximum number of CPUs which this
2927 kernel will support. The maximum supported value is 32 for 32-bit
2928 kernel and 64 for 64-bit kernels; the minimum value which makes
2929 sense is 1 for Qemu (useful only for kernel debugging purposes)
2930 and 2 for all others.
2932 This is purely to save memory - each supported CPU adds
2933 approximately eight kilobytes to the kernel image. For best
2934 performance should round up your number of processors to the next
2937 config MIPS_PERF_SHARED_TC_COUNTERS
2940 config MIPS_NR_CPU_NR_MAP_1024
2943 config MIPS_NR_CPU_NR_MAP
2946 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2947 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2950 # Timer Interrupt Frequency Configuration
2954 prompt "Timer frequency"
2957 Allows the configuration of the timer frequency.
2960 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2963 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2966 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2969 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2972 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2975 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2978 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2981 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2985 config SYS_SUPPORTS_24HZ
2988 config SYS_SUPPORTS_48HZ
2991 config SYS_SUPPORTS_100HZ
2994 config SYS_SUPPORTS_128HZ
2997 config SYS_SUPPORTS_250HZ
3000 config SYS_SUPPORTS_256HZ
3003 config SYS_SUPPORTS_1000HZ
3006 config SYS_SUPPORTS_1024HZ
3009 config SYS_SUPPORTS_ARBIT_HZ
3011 default y if !SYS_SUPPORTS_24HZ && \
3012 !SYS_SUPPORTS_48HZ && \
3013 !SYS_SUPPORTS_100HZ && \
3014 !SYS_SUPPORTS_128HZ && \
3015 !SYS_SUPPORTS_250HZ && \
3016 !SYS_SUPPORTS_256HZ && \
3017 !SYS_SUPPORTS_1000HZ && \
3018 !SYS_SUPPORTS_1024HZ
3024 default 100 if HZ_100
3025 default 128 if HZ_128
3026 default 250 if HZ_250
3027 default 256 if HZ_256
3028 default 1000 if HZ_1000
3029 default 1024 if HZ_1024
3032 def_bool HIGH_RES_TIMERS
3035 bool "Kexec system call"
3038 kexec is a system call that implements the ability to shutdown your
3039 current kernel, and to start another kernel. It is like a reboot
3040 but it is independent of the system firmware. And like a reboot
3041 you can start any kernel with it, not just Linux.
3043 The name comes from the similarity to the exec system call.
3045 It is an ongoing process to be certain the hardware in a machine
3046 is properly shutdown, so do not be surprised if this code does not
3047 initially work for you. As of this writing the exact hardware
3048 interface is strongly in flux, so no good recommendation can be
3052 bool "Kernel crash dumps"
3054 Generate crash dump after being started by kexec.
3055 This should be normally only set in special crash dump kernels
3056 which are loaded in the main kernel with kexec-tools into
3057 a specially reserved region and then later executed after
3058 a crash by kdump/kexec. The crash dump kernel must be compiled
3059 to a memory address not used by the main kernel or firmware using
3062 config PHYSICAL_START
3063 hex "Physical address where the kernel is loaded"
3064 default "0xffffffff84000000"
3065 depends on CRASH_DUMP
3067 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3068 If you plan to use kernel for capturing the crash dump change
3069 this value to start of the reserved region (the "X" value as
3070 specified in the "crashkernel=YM@XM" command line boot parameter
3071 passed to the panic-ed kernel).
3073 config MIPS_O32_FP64_SUPPORT
3074 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3075 depends on 32BIT || MIPS32_O32
3077 When this is enabled, the kernel will support use of 64-bit floating
3078 point registers with binaries using the O32 ABI along with the
3079 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3080 32-bit MIPS systems this support is at the cost of increasing the
3081 size and complexity of the compiled FPU emulator. Thus if you are
3082 running a MIPS32 system and know that none of your userland binaries
3083 will require 64-bit floating point, you may wish to reduce the size
3084 of your kernel & potentially improve FP emulation performance by
3087 Although binutils currently supports use of this flag the details
3088 concerning its effect upon the O32 ABI in userland are still being
3089 worked on. In order to avoid userland becoming dependant upon current
3090 behaviour before the details have been finalised, this option should
3091 be considered experimental and only enabled by those working upon
3099 select OF_EARLY_FLATTREE
3109 prompt "Kernel appended dtb support" if USE_OF
3110 default MIPS_NO_APPENDED_DTB
3112 config MIPS_NO_APPENDED_DTB
3115 Do not enable appended dtb support.
3117 config MIPS_ELF_APPENDED_DTB
3120 With this option, the boot code will look for a device tree binary
3121 DTB) included in the vmlinux ELF section .appended_dtb. By default
3122 it is empty and the DTB can be appended using binutils command
3125 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3127 This is meant as a backward compatiblity convenience for those
3128 systems with a bootloader that can't be upgraded to accommodate
3129 the documented boot protocol using a device tree.
3131 config MIPS_RAW_APPENDED_DTB
3132 bool "vmlinux.bin or vmlinuz.bin"
3134 With this option, the boot code will look for a device tree binary
3135 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3136 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3138 This is meant as a backward compatibility convenience for those
3139 systems with a bootloader that can't be upgraded to accommodate
3140 the documented boot protocol using a device tree.
3142 Beware that there is very little in terms of protection against
3143 this option being confused by leftover garbage in memory that might
3144 look like a DTB header after a reboot if no actual DTB is appended
3145 to vmlinux.bin. Do not leave this option active in a production kernel
3146 if you don't intend to always append a DTB.
3150 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3151 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3152 !MACH_LOONGSON64 && !MIPS_MALTA && \
3154 default MIPS_CMDLINE_FROM_BOOTLOADER
3156 config MIPS_CMDLINE_FROM_DTB
3158 bool "Dtb kernel arguments if available"
3160 config MIPS_CMDLINE_DTB_EXTEND
3162 bool "Extend dtb kernel arguments with bootloader arguments"
3164 config MIPS_CMDLINE_FROM_BOOTLOADER
3165 bool "Bootloader kernel arguments if available"
3167 config MIPS_CMDLINE_BUILTIN_EXTEND
3168 depends on CMDLINE_BOOL
3169 bool "Extend builtin kernel arguments with bootloader arguments"
3174 config LOCKDEP_SUPPORT
3178 config STACKTRACE_SUPPORT
3182 config PGTABLE_LEVELS
3184 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3185 default 3 if 64BIT && !PAGE_SIZE_64KB
3188 config MIPS_AUTO_PFN_OFFSET
3191 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3193 config PCI_DRIVERS_GENERIC
3194 select PCI_DOMAINS_GENERIC if PCI
3197 config PCI_DRIVERS_LEGACY
3198 def_bool !PCI_DRIVERS_GENERIC
3199 select NO_GENERIC_PCI_IOPORT_MAP
3200 select PCI_DOMAINS if PCI
3203 # ISA support is now enabled via select. Too many systems still have the one
3204 # or other ISA chip on the board that users don't know about so don't expect
3205 # users to choose the right thing ...
3211 bool "TURBOchannel support"
3212 depends on MACH_DECSTATION
3214 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3215 processors. TURBOchannel programming specifications are available
3217 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3219 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3220 Linux driver support status is documented at:
3221 <http://www.linux-mips.org/wiki/DECstation>
3227 config ARCH_MMAP_RND_BITS_MIN
3231 config ARCH_MMAP_RND_BITS_MAX
3235 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3238 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3245 select MIPS_EXTERNAL_TIMER
3258 config MIPS32_COMPAT
3264 config SYSVIPC_COMPAT
3268 bool "Kernel support for o32 binaries"
3270 select ARCH_WANT_OLD_COMPAT_IPC
3272 select MIPS32_COMPAT
3273 select SYSVIPC_COMPAT if SYSVIPC
3275 Select this option if you want to run o32 binaries. These are pure
3276 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3277 existing binaries are in this format.
3282 bool "Kernel support for n32 binaries"
3284 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3286 select MIPS32_COMPAT
3287 select SYSVIPC_COMPAT if SYSVIPC
3289 Select this option if you want to run n32 binaries. These are
3290 64-bit binaries using 32-bit quantities for addressing and certain
3291 data that would normally be 64-bit. They are used in special
3298 default y if MIPS32_O32 || MIPS32_N32
3301 menu "Power management options"
3303 config ARCH_HIBERNATION_POSSIBLE
3305 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3307 config ARCH_SUSPEND_POSSIBLE
3309 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3311 source "kernel/power/Kconfig"
3315 config MIPS_EXTERNAL_TIMER
3318 menu "CPU Power Management"
3320 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3321 source "drivers/cpufreq/Kconfig"
3324 source "drivers/cpuidle/Kconfig"
3328 source "drivers/firmware/Kconfig"
3330 source "arch/mips/kvm/Kconfig"
3332 source "arch/mips/vdso/Kconfig"