1 # SPDX-License-Identifier: GPL-2.0
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
8 select ARCH_HAS_FORTIFY_SOURCE
10 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
11 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
12 select ARCH_HAS_STRNCPY_FROM_USER
13 select ARCH_HAS_STRNLEN_USER
14 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
15 select ARCH_HAS_UBSAN_SANITIZE_ALL
16 select ARCH_HAS_GCOV_PROFILE_ALL
17 select ARCH_KEEP_MEMBLOCK
18 select ARCH_SUPPORTS_UPROBES
19 select ARCH_USE_BUILTIN_BSWAP
20 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
21 select ARCH_USE_MEMTEST
22 select ARCH_USE_QUEUED_RWLOCKS
23 select ARCH_USE_QUEUED_SPINLOCKS
24 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
25 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
26 select ARCH_WANT_IPC_PARSE_VERSION
27 select ARCH_WANT_LD_ORPHAN_WARN
28 select BUILDTIME_TABLE_SORT
29 select CLONE_BACKWARDS
30 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
31 select CPU_PM if CPU_IDLE
32 select GENERIC_ATOMIC64 if !64BIT
33 select GENERIC_CMOS_UPDATE
34 select GENERIC_CPU_AUTOPROBE
35 select GENERIC_FIND_FIRST_BIT
36 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IRQ_PROBE
39 select GENERIC_IRQ_SHOW
40 select GENERIC_ISA_DMA if EISA
41 select GENERIC_LIB_ASHLDI3
42 select GENERIC_LIB_ASHRDI3
43 select GENERIC_LIB_CMPDI2
44 select GENERIC_LIB_LSHRDI3
45 select GENERIC_LIB_UCMPDI2
46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
47 select GENERIC_SMP_IDLE_THREAD
48 select GENERIC_TIME_VSYSCALL
49 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
50 select HANDLE_DOMAIN_IRQ
51 select HAVE_ARCH_COMPILER_H
52 select HAVE_ARCH_JUMP_LABEL
53 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
54 select HAVE_ARCH_MMAP_RND_BITS if MMU
55 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
56 select HAVE_ARCH_SECCOMP_FILTER
57 select HAVE_ARCH_TRACEHOOK
58 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
59 select HAVE_ASM_MODVERSIONS
60 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
61 select HAVE_CONTEXT_TRACKING
63 select HAVE_C_RECORDMCOUNT
64 select HAVE_DEBUG_KMEMLEAK
65 select HAVE_DEBUG_STACKOVERFLOW
66 select HAVE_DMA_CONTIGUOUS
67 select HAVE_DYNAMIC_FTRACE
68 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
69 select HAVE_EXIT_THREAD
71 select HAVE_FTRACE_MCOUNT_RECORD
72 select HAVE_FUNCTION_GRAPH_TRACER
73 select HAVE_FUNCTION_TRACER
74 select HAVE_GCC_PLUGINS
75 select HAVE_GENERIC_VDSO
76 select HAVE_IOREMAP_PROT
77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
78 select HAVE_IRQ_TIME_ACCOUNTING
80 select HAVE_KRETPROBES
81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
82 select HAVE_MOD_ARCH_SPECIFIC
84 select HAVE_PERF_EVENTS
86 select HAVE_PERF_USER_STACK_DUMP
87 select HAVE_REGS_AND_STACK_ACCESS_API
89 select HAVE_SPARSE_SYSCALL_NR
90 select HAVE_STACKPROTECTOR
91 select HAVE_SYSCALL_TRACEPOINTS
92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
93 select IRQ_FORCED_THREADING
95 select MODULES_USE_ELF_REL if MODULES
96 select MODULES_USE_ELF_RELA if MODULES && 64BIT
97 select PERF_USE_VMALLOC
98 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
100 select SYSCTL_EXCEPTION_TRACE
101 select TRACE_IRQFLAGS_SUPPORT
103 select ARCH_HAS_ELFCORE_COMPAT
105 config MIPS_FIXUP_BIGPHYS_ADDR
113 select SYS_SUPPORTS_32BIT_KERNEL
114 select SYS_SUPPORTS_LITTLE_ENDIAN
115 select SYS_SUPPORTS_ZBOOT
116 select DMA_NONCOHERENT
117 select ARCH_HAS_SYNC_DMA_FOR_CPU
122 select GENERIC_IRQ_CHIP
123 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
125 select CPU_SUPPORTS_CPUFREQ
126 select MIPS_EXTERNAL_TIMER
128 menu "Machine selection"
132 default MIPS_GENERIC_KERNEL
134 config MIPS_GENERIC_KERNEL
135 bool "Generic board-agnostic MIPS kernel"
136 select ARCH_HAS_SETUP_DMA_OPS
141 select CLKSRC_MIPS_GIC
143 select CPU_MIPSR2_IRQ_EI
144 select CPU_MIPSR2_IRQ_VI
146 select DMA_NONCOHERENT
149 select MIPS_AUTO_PFN_OFFSET
150 select MIPS_CPU_SCACHE
152 select MIPS_L1_CACHE_SHIFT_7
153 select NO_EXCEPT_FILL
154 select PCI_DRIVERS_GENERIC
157 select SYS_HAS_CPU_MIPS32_R1
158 select SYS_HAS_CPU_MIPS32_R2
159 select SYS_HAS_CPU_MIPS32_R6
160 select SYS_HAS_CPU_MIPS64_R1
161 select SYS_HAS_CPU_MIPS64_R2
162 select SYS_HAS_CPU_MIPS64_R6
163 select SYS_SUPPORTS_32BIT_KERNEL
164 select SYS_SUPPORTS_64BIT_KERNEL
165 select SYS_SUPPORTS_BIG_ENDIAN
166 select SYS_SUPPORTS_HIGHMEM
167 select SYS_SUPPORTS_LITTLE_ENDIAN
168 select SYS_SUPPORTS_MICROMIPS
169 select SYS_SUPPORTS_MIPS16
170 select SYS_SUPPORTS_MIPS_CPS
171 select SYS_SUPPORTS_MULTITHREADING
172 select SYS_SUPPORTS_RELOCATABLE
173 select SYS_SUPPORTS_SMARTMIPS
174 select SYS_SUPPORTS_ZBOOT
176 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
177 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
178 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
179 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
180 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
181 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
184 Select this to build a kernel which aims to support multiple boards,
185 generally using a flattened device tree passed from the bootloader
186 using the boot protocol defined in the UHI (Unified Hosting
187 Interface) specification.
190 bool "Alchemy processor based machines"
191 select PHYS_ADDR_T_64BIT
195 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
196 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
197 select SYS_HAS_CPU_MIPS32_R1
198 select SYS_SUPPORTS_32BIT_KERNEL
199 select SYS_SUPPORTS_APM_EMULATION
201 select SYS_SUPPORTS_ZBOOT
205 bool "Texas Instruments AR7"
208 select DMA_NONCOHERENT
212 select NO_EXCEPT_FILL
214 select SYS_HAS_CPU_MIPS32_R1
215 select SYS_HAS_EARLY_PRINTK
216 select SYS_SUPPORTS_32BIT_KERNEL
217 select SYS_SUPPORTS_LITTLE_ENDIAN
218 select SYS_SUPPORTS_MIPS16
219 select SYS_SUPPORTS_ZBOOT_UART16550
223 Support for the Texas Instruments AR7 System-on-a-Chip
224 family: TNETD7100, 7200 and 7300.
227 bool "Atheros AR231x/AR531x SoC support"
230 select DMA_NONCOHERENT
233 select SYS_HAS_CPU_MIPS32_R1
234 select SYS_SUPPORTS_BIG_ENDIAN
235 select SYS_SUPPORTS_32BIT_KERNEL
236 select SYS_HAS_EARLY_PRINTK
238 Support for Atheros AR231x and Atheros AR531x based boards
241 bool "Atheros AR71XX/AR724X/AR913X based boards"
242 select ARCH_HAS_RESET_CONTROLLER
246 select DMA_NONCOHERENT
251 select SYS_HAS_CPU_MIPS32_R2
252 select SYS_HAS_EARLY_PRINTK
253 select SYS_SUPPORTS_32BIT_KERNEL
254 select SYS_SUPPORTS_BIG_ENDIAN
255 select SYS_SUPPORTS_MIPS16
256 select SYS_SUPPORTS_ZBOOT_UART_PROM
258 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
260 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
263 bool "Broadcom Generic BMIPS kernel"
264 select ARCH_HAS_RESET_CONTROLLER
265 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
266 select ARCH_HAS_PHYS_TO_DMA
268 select NO_EXCEPT_FILL
274 select BCM6345_L1_IRQ
275 select BCM7038_L1_IRQ
276 select BCM7120_L2_IRQ
277 select BRCMSTB_L2_IRQ
279 select DMA_NONCOHERENT
280 select SYS_SUPPORTS_32BIT_KERNEL
281 select SYS_SUPPORTS_LITTLE_ENDIAN
282 select SYS_SUPPORTS_BIG_ENDIAN
283 select SYS_SUPPORTS_HIGHMEM
284 select SYS_HAS_CPU_BMIPS32_3300
285 select SYS_HAS_CPU_BMIPS4350
286 select SYS_HAS_CPU_BMIPS4380
287 select SYS_HAS_CPU_BMIPS5000
289 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
290 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
291 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
292 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
293 select HARDIRQS_SW_RESEND
295 Build a generic DT-based kernel image that boots on select
296 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
297 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
298 must be set appropriately for your board.
301 bool "Broadcom BCM47XX based boards"
305 select DMA_NONCOHERENT
308 select SYS_HAS_CPU_MIPS32_R1
309 select NO_EXCEPT_FILL
310 select SYS_SUPPORTS_32BIT_KERNEL
311 select SYS_SUPPORTS_LITTLE_ENDIAN
312 select SYS_SUPPORTS_MIPS16
313 select SYS_SUPPORTS_ZBOOT
314 select SYS_HAS_EARLY_PRINTK
315 select USE_GENERIC_EARLY_PRINTK_8250
317 select LEDS_GPIO_REGISTER
320 select BCM47XX_SSB if !BCM47XX_BCMA
322 Support for BCM47XX based boards
325 bool "Broadcom BCM63XX based boards"
330 select DMA_NONCOHERENT
332 select SYS_SUPPORTS_32BIT_KERNEL
333 select SYS_SUPPORTS_BIG_ENDIAN
334 select SYS_HAS_EARLY_PRINTK
337 select MIPS_L1_CACHE_SHIFT_4
338 select HAVE_LEGACY_CLK
340 Support for BCM63XX based boards
347 select DMA_NONCOHERENT
353 select PCI_GT64XXX_PCI0
354 select SYS_HAS_CPU_NEVADA
355 select SYS_HAS_EARLY_PRINTK
356 select SYS_SUPPORTS_32BIT_KERNEL
357 select SYS_SUPPORTS_64BIT_KERNEL
358 select SYS_SUPPORTS_LITTLE_ENDIAN
359 select USE_GENERIC_EARLY_PRINTK_8250
361 config MACH_DECSTATION
365 select CEVT_R4K if CPU_R4X00
367 select CSRC_R4K if CPU_R4X00
368 select CPU_DADDI_WORKAROUNDS if 64BIT
369 select CPU_R4000_WORKAROUNDS if 64BIT
370 select CPU_R4400_WORKAROUNDS if 64BIT
371 select DMA_NONCOHERENT
374 select SYS_HAS_CPU_R3000
375 select SYS_HAS_CPU_R4X00
376 select SYS_SUPPORTS_32BIT_KERNEL
377 select SYS_SUPPORTS_64BIT_KERNEL
378 select SYS_SUPPORTS_LITTLE_ENDIAN
379 select SYS_SUPPORTS_128HZ
380 select SYS_SUPPORTS_256HZ
381 select SYS_SUPPORTS_1024HZ
382 select MIPS_L1_CACHE_SHIFT_4
384 This enables support for DEC's MIPS based workstations. For details
385 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
386 DECstation porting pages on <http://decstation.unix-ag.org/>.
388 If you have one of the following DECstation Models you definitely
389 want to choose R4xx0 for the CPU Type:
396 otherwise choose R3000.
399 bool "Jazz family of machines"
402 select ARCH_MIGHT_HAVE_PC_PARPORT
403 select ARCH_MIGHT_HAVE_PC_SERIO
407 select ARCH_MAY_HAVE_PC_FDC
410 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
411 select GENERIC_ISA_DMA
412 select HAVE_PCSPKR_PLATFORM
417 select SYS_HAS_CPU_R4X00
418 select SYS_SUPPORTS_32BIT_KERNEL
419 select SYS_SUPPORTS_64BIT_KERNEL
420 select SYS_SUPPORTS_100HZ
421 select SYS_SUPPORTS_LITTLE_ENDIAN
423 This a family of machines based on the MIPS R4030 chipset which was
424 used by several vendors to build RISC/os and Windows NT workstations.
425 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
426 Olivetti M700-10 workstations.
428 config MACH_INGENIC_SOC
429 bool "Ingenic SoC based machines"
432 select SYS_SUPPORTS_ZBOOT_UART16550
433 select CPU_SUPPORTS_CPUFREQ
434 select MIPS_EXTERNAL_TIMER
437 bool "Lantiq based platforms"
438 select DMA_NONCOHERENT
442 select SYS_HAS_CPU_MIPS32_R1
443 select SYS_HAS_CPU_MIPS32_R2
444 select SYS_SUPPORTS_BIG_ENDIAN
445 select SYS_SUPPORTS_32BIT_KERNEL
446 select SYS_SUPPORTS_MIPS16
447 select SYS_SUPPORTS_MULTITHREADING
448 select SYS_SUPPORTS_VPE_LOADER
449 select SYS_HAS_EARLY_PRINTK
453 select HAVE_LEGACY_CLK
456 select PINCTRL_LANTIQ
457 select ARCH_HAS_RESET_CONTROLLER
458 select RESET_CONTROLLER
460 config MACH_LOONGSON32
461 bool "Loongson 32-bit family of machines"
462 select SYS_SUPPORTS_ZBOOT
464 This enables support for the Loongson-1 family of machines.
466 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
467 the Institute of Computing Technology (ICT), Chinese Academy of
470 config MACH_LOONGSON2EF
471 bool "Loongson-2E/F family of machines"
472 select SYS_SUPPORTS_ZBOOT
474 This enables the support of early Loongson-2E/F family of machines.
476 config MACH_LOONGSON64
477 bool "Loongson 64-bit family of machines"
478 select ARCH_SPARSEMEM_ENABLE
479 select ARCH_MIGHT_HAVE_PC_PARPORT
480 select ARCH_MIGHT_HAVE_PC_SERIO
481 select GENERIC_ISA_DMA_SUPPORT_BROKEN
491 select NO_EXCEPT_FILL
492 select NR_CPUS_DEFAULT_64
493 select USE_GENERIC_EARLY_PRINTK_8250
494 select PCI_DRIVERS_GENERIC
495 select SYS_HAS_CPU_LOONGSON64
496 select SYS_HAS_EARLY_PRINTK
497 select SYS_SUPPORTS_SMP
498 select SYS_SUPPORTS_HOTPLUG_CPU
499 select SYS_SUPPORTS_NUMA
500 select SYS_SUPPORTS_64BIT_KERNEL
501 select SYS_SUPPORTS_HIGHMEM
502 select SYS_SUPPORTS_LITTLE_ENDIAN
503 select SYS_SUPPORTS_ZBOOT
504 select SYS_SUPPORTS_RELOCATABLE
509 select PCI_HOST_GENERIC
511 This enables the support of Loongson-2/3 family of machines.
513 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
514 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
515 and Loongson-2F which will be removed), developed by the Institute
516 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
519 bool "MIPS Malta board"
520 select ARCH_MAY_HAVE_PC_FDC
521 select ARCH_MIGHT_HAVE_PC_PARPORT
522 select ARCH_MIGHT_HAVE_PC_SERIO
527 select CLKSRC_MIPS_GIC
530 select DMA_NONCOHERENT
531 select GENERIC_ISA_DMA
532 select HAVE_PCSPKR_PLATFORM
538 select MIPS_CPU_SCACHE
540 select MIPS_L1_CACHE_SHIFT_6
542 select PCI_GT64XXX_PCI0
545 select SYS_HAS_CPU_MIPS32_R1
546 select SYS_HAS_CPU_MIPS32_R2
547 select SYS_HAS_CPU_MIPS32_R3_5
548 select SYS_HAS_CPU_MIPS32_R5
549 select SYS_HAS_CPU_MIPS32_R6
550 select SYS_HAS_CPU_MIPS64_R1
551 select SYS_HAS_CPU_MIPS64_R2
552 select SYS_HAS_CPU_MIPS64_R6
553 select SYS_HAS_CPU_NEVADA
554 select SYS_HAS_CPU_RM7000
555 select SYS_SUPPORTS_32BIT_KERNEL
556 select SYS_SUPPORTS_64BIT_KERNEL
557 select SYS_SUPPORTS_BIG_ENDIAN
558 select SYS_SUPPORTS_HIGHMEM
559 select SYS_SUPPORTS_LITTLE_ENDIAN
560 select SYS_SUPPORTS_MICROMIPS
561 select SYS_SUPPORTS_MIPS16
562 select SYS_SUPPORTS_MIPS_CMP
563 select SYS_SUPPORTS_MIPS_CPS
564 select SYS_SUPPORTS_MULTITHREADING
565 select SYS_SUPPORTS_RELOCATABLE
566 select SYS_SUPPORTS_SMARTMIPS
567 select SYS_SUPPORTS_VPE_LOADER
568 select SYS_SUPPORTS_ZBOOT
570 select WAR_ICACHE_REFILLS
571 select ZONE_DMA32 if 64BIT
573 This enables support for the MIPS Technologies Malta evaluation
577 bool "Microchip PIC32 Family"
579 This enables support for the Microchip PIC32 family of platforms.
581 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
585 bool "NEC VR4100 series based machines"
588 select SYS_HAS_CPU_VR41XX
589 select SYS_SUPPORTS_MIPS16
592 config MACH_NINTENDO64
593 bool "Nintendo 64 console"
596 select SYS_HAS_CPU_R4300
597 select SYS_SUPPORTS_BIG_ENDIAN
598 select SYS_SUPPORTS_ZBOOT
599 select SYS_SUPPORTS_32BIT_KERNEL
600 select SYS_SUPPORTS_64BIT_KERNEL
601 select DMA_NONCOHERENT
605 bool "Ralink based machines"
610 select DMA_NONCOHERENT
613 select SYS_HAS_CPU_MIPS32_R1
614 select SYS_HAS_CPU_MIPS32_R2
615 select SYS_SUPPORTS_32BIT_KERNEL
616 select SYS_SUPPORTS_LITTLE_ENDIAN
617 select SYS_SUPPORTS_MIPS16
618 select SYS_SUPPORTS_ZBOOT
619 select SYS_HAS_EARLY_PRINTK
620 select ARCH_HAS_RESET_CONTROLLER
621 select RESET_CONTROLLER
623 config MACH_REALTEK_RTL
624 bool "Realtek RTL838x/RTL839x based machines"
626 select DMA_NONCOHERENT
630 select SYS_HAS_CPU_MIPS32_R1
631 select SYS_HAS_CPU_MIPS32_R2
632 select SYS_SUPPORTS_BIG_ENDIAN
633 select SYS_SUPPORTS_32BIT_KERNEL
634 select SYS_SUPPORTS_MIPS16
635 select SYS_SUPPORTS_MULTITHREADING
636 select SYS_SUPPORTS_VPE_LOADER
637 select SYS_HAS_EARLY_PRINTK
638 select SYS_HAS_EARLY_PRINTK_8250
639 select USE_GENERIC_EARLY_PRINTK_8250
645 bool "SGI IP22 (Indy/Indigo2)"
650 select ARCH_MIGHT_HAVE_PC_SERIO
654 select DEFAULT_SGI_PARTITION
655 select DMA_NONCOHERENT
659 select IP22_CPU_SCACHE
661 select GENERIC_ISA_DMA_SUPPORT_BROKEN
663 select SGI_HAS_INDYDOG
669 select SYS_HAS_CPU_R4X00
670 select SYS_HAS_CPU_R5000
671 select SYS_HAS_EARLY_PRINTK
672 select SYS_SUPPORTS_32BIT_KERNEL
673 select SYS_SUPPORTS_64BIT_KERNEL
674 select SYS_SUPPORTS_BIG_ENDIAN
675 select WAR_R4600_V1_INDEX_ICACHEOP
676 select WAR_R4600_V1_HIT_CACHEOP
677 select WAR_R4600_V2_HIT_CACHEOP
678 select MIPS_L1_CACHE_SHIFT_7
680 This are the SGI Indy, Challenge S and Indigo2, as well as certain
681 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
682 that runs on these, say Y here.
685 bool "SGI IP27 (Origin200/2000)"
686 select ARCH_HAS_PHYS_TO_DMA
687 select ARCH_SPARSEMEM_ENABLE
690 select ARC_CMDLINE_ONLY
692 select DEFAULT_SGI_PARTITION
694 select SYS_HAS_EARLY_PRINTK
697 select IRQ_DOMAIN_HIERARCHY
698 select NR_CPUS_DEFAULT_64
699 select PCI_DRIVERS_GENERIC
700 select PCI_XTALK_BRIDGE
701 select SYS_HAS_CPU_R10000
702 select SYS_SUPPORTS_64BIT_KERNEL
703 select SYS_SUPPORTS_BIG_ENDIAN
704 select SYS_SUPPORTS_NUMA
705 select SYS_SUPPORTS_SMP
706 select WAR_R10000_LLSC
707 select MIPS_L1_CACHE_SHIFT_7
710 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
711 workstations. To compile a Linux kernel that runs on these, say Y
715 bool "SGI IP28 (Indigo2 R10k)"
720 select ARCH_MIGHT_HAVE_PC_SERIO
724 select DEFAULT_SGI_PARTITION
725 select DMA_NONCOHERENT
726 select GENERIC_ISA_DMA_SUPPORT_BROKEN
732 select SGI_HAS_INDYDOG
738 select SYS_HAS_CPU_R10000
739 select SYS_HAS_EARLY_PRINTK
740 select SYS_SUPPORTS_64BIT_KERNEL
741 select SYS_SUPPORTS_BIG_ENDIAN
742 select WAR_R10000_LLSC
743 select MIPS_L1_CACHE_SHIFT_7
745 This is the SGI Indigo2 with R10000 processor. To compile a Linux
746 kernel that runs on these, say Y here.
749 bool "SGI IP30 (Octane/Octane2)"
750 select ARCH_HAS_PHYS_TO_DMA
757 select SYNC_R4K if SMP
761 select IRQ_DOMAIN_HIERARCHY
762 select NR_CPUS_DEFAULT_2
763 select PCI_DRIVERS_GENERIC
764 select PCI_XTALK_BRIDGE
765 select SYS_HAS_EARLY_PRINTK
766 select SYS_HAS_CPU_R10000
767 select SYS_SUPPORTS_64BIT_KERNEL
768 select SYS_SUPPORTS_BIG_ENDIAN
769 select SYS_SUPPORTS_SMP
770 select WAR_R10000_LLSC
771 select MIPS_L1_CACHE_SHIFT_7
774 These are the SGI Octane and Octane2 graphics workstations. To
775 compile a Linux kernel that runs on these, say Y here.
781 select ARCH_HAS_PHYS_TO_DMA
787 select DMA_NONCOHERENT
790 select R5000_CPU_SCACHE
791 select RM7000_CPU_SCACHE
792 select SYS_HAS_CPU_R5000
793 select SYS_HAS_CPU_R10000 if BROKEN
794 select SYS_HAS_CPU_RM7000
795 select SYS_HAS_CPU_NEVADA
796 select SYS_SUPPORTS_64BIT_KERNEL
797 select SYS_SUPPORTS_BIG_ENDIAN
798 select WAR_ICACHE_REFILLS
800 If you want this kernel to run on SGI O2 workstation, say Y here.
803 bool "Sibyte BCM91120C-CRhine"
805 select SIBYTE_BCM1120
807 select SYS_HAS_CPU_SB1
808 select SYS_SUPPORTS_BIG_ENDIAN
809 select SYS_SUPPORTS_LITTLE_ENDIAN
812 bool "Sibyte BCM91120x-Carmel"
814 select SIBYTE_BCM1120
816 select SYS_HAS_CPU_SB1
817 select SYS_SUPPORTS_BIG_ENDIAN
818 select SYS_SUPPORTS_LITTLE_ENDIAN
821 bool "Sibyte BCM91125C-CRhone"
823 select SIBYTE_BCM1125
825 select SYS_HAS_CPU_SB1
826 select SYS_SUPPORTS_BIG_ENDIAN
827 select SYS_SUPPORTS_HIGHMEM
828 select SYS_SUPPORTS_LITTLE_ENDIAN
831 bool "Sibyte BCM91125E-Rhone"
833 select SIBYTE_BCM1125H
835 select SYS_HAS_CPU_SB1
836 select SYS_SUPPORTS_BIG_ENDIAN
837 select SYS_SUPPORTS_LITTLE_ENDIAN
840 bool "Sibyte BCM91250A-SWARM"
842 select HAVE_PATA_PLATFORM
845 select SYS_HAS_CPU_SB1
846 select SYS_SUPPORTS_BIG_ENDIAN
847 select SYS_SUPPORTS_HIGHMEM
848 select SYS_SUPPORTS_LITTLE_ENDIAN
849 select ZONE_DMA32 if 64BIT
850 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
852 config SIBYTE_LITTLESUR
853 bool "Sibyte BCM91250C2-LittleSur"
855 select HAVE_PATA_PLATFORM
858 select SYS_HAS_CPU_SB1
859 select SYS_SUPPORTS_BIG_ENDIAN
860 select SYS_SUPPORTS_HIGHMEM
861 select SYS_SUPPORTS_LITTLE_ENDIAN
862 select ZONE_DMA32 if 64BIT
864 config SIBYTE_SENTOSA
865 bool "Sibyte BCM91250E-Sentosa"
869 select SYS_HAS_CPU_SB1
870 select SYS_SUPPORTS_BIG_ENDIAN
871 select SYS_SUPPORTS_LITTLE_ENDIAN
872 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
875 bool "Sibyte BCM91480B-BigSur"
877 select NR_CPUS_DEFAULT_4
878 select SIBYTE_BCM1x80
880 select SYS_HAS_CPU_SB1
881 select SYS_SUPPORTS_BIG_ENDIAN
882 select SYS_SUPPORTS_HIGHMEM
883 select SYS_SUPPORTS_LITTLE_ENDIAN
884 select ZONE_DMA32 if 64BIT
885 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
888 bool "SNI RM200/300/400"
891 select FW_ARC if CPU_LITTLE_ENDIAN
892 select FW_ARC32 if CPU_LITTLE_ENDIAN
893 select FW_SNIPROM if CPU_BIG_ENDIAN
894 select ARCH_MAY_HAVE_PC_FDC
895 select ARCH_MIGHT_HAVE_PC_PARPORT
896 select ARCH_MIGHT_HAVE_PC_SERIO
900 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
901 select DMA_NONCOHERENT
902 select GENERIC_ISA_DMA
904 select HAVE_PCSPKR_PLATFORM
910 select MIPS_L1_CACHE_SHIFT_6
911 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
912 select SYS_HAS_CPU_R4X00
913 select SYS_HAS_CPU_R5000
914 select SYS_HAS_CPU_R10000
915 select R5000_CPU_SCACHE
916 select SYS_HAS_EARLY_PRINTK
917 select SYS_SUPPORTS_32BIT_KERNEL
918 select SYS_SUPPORTS_64BIT_KERNEL
919 select SYS_SUPPORTS_BIG_ENDIAN
920 select SYS_SUPPORTS_HIGHMEM
921 select SYS_SUPPORTS_LITTLE_ENDIAN
922 select WAR_R4600_V2_HIT_CACHEOP
924 The SNI RM200/300/400 are MIPS-based machines manufactured by
925 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
926 Technology and now in turn merged with Fujitsu. Say Y here to
927 support this machine type.
930 bool "Toshiba TX39 series based machines"
933 bool "Toshiba TX49 series based machines"
934 select WAR_TX49XX_ICACHE_INDEX_INV
936 config MIKROTIK_RB532
937 bool "Mikrotik RB532 boards"
940 select DMA_NONCOHERENT
943 select SYS_HAS_CPU_MIPS32_R1
944 select SYS_SUPPORTS_32BIT_KERNEL
945 select SYS_SUPPORTS_LITTLE_ENDIAN
949 select MIPS_L1_CACHE_SHIFT_4
951 Support the Mikrotik(tm) RouterBoard 532 series,
952 based on the IDT RC32434 SoC.
954 config CAVIUM_OCTEON_SOC
955 bool "Cavium Networks Octeon SoC based boards"
957 select ARCH_HAS_PHYS_TO_DMA
959 select PHYS_ADDR_T_64BIT
960 select SYS_SUPPORTS_64BIT_KERNEL
961 select SYS_SUPPORTS_BIG_ENDIAN
963 select EDAC_ATOMIC_SCRUB
964 select SYS_SUPPORTS_LITTLE_ENDIAN
965 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
966 select SYS_HAS_EARLY_PRINTK
967 select SYS_HAS_CPU_CAVIUM_OCTEON
969 select HAVE_PLAT_DELAY
970 select HAVE_PLAT_FW_INIT_CMDLINE
971 select HAVE_PLAT_MEMCPY
975 select ARCH_SPARSEMEM_ENABLE
976 select SYS_SUPPORTS_SMP
977 select NR_CPUS_DEFAULT_64
978 select MIPS_NR_CPU_NR_MAP_1024
981 select MTD_COMPLEX_MAPPINGS
983 select SYS_SUPPORTS_RELOCATABLE
985 This option supports all of the Octeon reference boards from Cavium
986 Networks. It builds a kernel that dynamically determines the Octeon
987 CPU type and supports all known board reference implementations.
988 Some of the supported boards are:
995 Say Y here for most Octeon reference boards.
998 bool "Netlogic XLR/XLS based systems"
1001 select SYS_HAS_CPU_XLR
1002 select SYS_SUPPORTS_SMP
1004 select SWAP_IO_SPACE
1005 select SYS_SUPPORTS_32BIT_KERNEL
1006 select SYS_SUPPORTS_64BIT_KERNEL
1007 select PHYS_ADDR_T_64BIT
1008 select SYS_SUPPORTS_BIG_ENDIAN
1009 select SYS_SUPPORTS_HIGHMEM
1010 select NR_CPUS_DEFAULT_32
1014 select ZONE_DMA32 if 64BIT
1016 select SYS_HAS_EARLY_PRINTK
1017 select SYS_SUPPORTS_ZBOOT
1018 select SYS_SUPPORTS_ZBOOT_UART16550
1020 Support for systems based on Netlogic XLR and XLS processors.
1021 Say Y here if you have a XLR or XLS based board.
1023 config NLM_XLP_BOARD
1024 bool "Netlogic XLP based systems"
1027 select SYS_HAS_CPU_XLP
1028 select SYS_SUPPORTS_SMP
1030 select SYS_SUPPORTS_32BIT_KERNEL
1031 select SYS_SUPPORTS_64BIT_KERNEL
1032 select PHYS_ADDR_T_64BIT
1034 select SYS_SUPPORTS_BIG_ENDIAN
1035 select SYS_SUPPORTS_LITTLE_ENDIAN
1036 select SYS_SUPPORTS_HIGHMEM
1037 select NR_CPUS_DEFAULT_32
1041 select ZONE_DMA32 if 64BIT
1043 select SYS_HAS_EARLY_PRINTK
1045 select SYS_SUPPORTS_ZBOOT
1046 select SYS_SUPPORTS_ZBOOT_UART16550
1048 This board is based on Netlogic XLP Processor.
1049 Say Y here if you have a XLP based board.
1053 source "arch/mips/alchemy/Kconfig"
1054 source "arch/mips/ath25/Kconfig"
1055 source "arch/mips/ath79/Kconfig"
1056 source "arch/mips/bcm47xx/Kconfig"
1057 source "arch/mips/bcm63xx/Kconfig"
1058 source "arch/mips/bmips/Kconfig"
1059 source "arch/mips/generic/Kconfig"
1060 source "arch/mips/ingenic/Kconfig"
1061 source "arch/mips/jazz/Kconfig"
1062 source "arch/mips/lantiq/Kconfig"
1063 source "arch/mips/pic32/Kconfig"
1064 source "arch/mips/ralink/Kconfig"
1065 source "arch/mips/sgi-ip27/Kconfig"
1066 source "arch/mips/sibyte/Kconfig"
1067 source "arch/mips/txx9/Kconfig"
1068 source "arch/mips/vr41xx/Kconfig"
1069 source "arch/mips/cavium-octeon/Kconfig"
1070 source "arch/mips/loongson2ef/Kconfig"
1071 source "arch/mips/loongson32/Kconfig"
1072 source "arch/mips/loongson64/Kconfig"
1073 source "arch/mips/netlogic/Kconfig"
1077 config GENERIC_HWEIGHT
1081 config GENERIC_CALIBRATE_DELAY
1085 config SCHED_OMIT_FRAME_POINTER
1090 # Select some configuration options automatically based on user selections.
1095 config ARCH_MAY_HAVE_PC_FDC
1126 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1132 config MIPS_CLOCK_VSYSCALL
1133 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1142 config ARCH_SUPPORTS_UPROBES
1145 config DMA_PERDEV_COHERENT
1147 select ARCH_HAS_SETUP_DMA_OPS
1148 select DMA_NONCOHERENT
1150 config DMA_NONCOHERENT
1153 # MIPS allows mixing "slightly different" Cacheability and Coherency
1154 # Attribute bits. It is believed that the uncached access through
1155 # KSEG1 and the implementation specific "uncached accelerated" used
1156 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1157 # significant advantages.
1159 select ARCH_HAS_DMA_WRITE_COMBINE
1160 select ARCH_HAS_DMA_PREP_COHERENT
1161 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1162 select ARCH_HAS_DMA_SET_UNCACHED
1163 select DMA_NONCOHERENT_MMAP
1164 select NEED_DMA_MAP_STATE
1166 config SYS_HAS_EARLY_PRINTK
1169 config SYS_SUPPORTS_HOTPLUG_CPU
1172 config MIPS_BONITO64
1181 config NO_IOPORT_MAP
1185 def_bool CPU_NO_LOAD_STORE_LR
1187 config GENERIC_ISA_DMA
1189 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1192 config GENERIC_ISA_DMA_SUPPORT_BROKEN
1194 select GENERIC_ISA_DMA
1196 config HAVE_PLAT_DELAY
1199 config HAVE_PLAT_FW_INIT_CMDLINE
1202 config HAVE_PLAT_MEMCPY
1208 config SYS_SUPPORTS_RELOCATABLE
1211 Selected if the platform supports relocating the kernel.
1212 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1213 to allow access to command line and entropy sources.
1215 config MIPS_CBPF_JIT
1217 depends on BPF_JIT && HAVE_CBPF_JIT
1219 config MIPS_EBPF_JIT
1221 depends on BPF_JIT && HAVE_EBPF_JIT
1225 # Endianness selection. Sufficiently obscure so many users don't know what to
1226 # answer,so we try hard to limit the available choices. Also the use of a
1227 # choice statement should be more obvious to the user.
1230 prompt "Endianness selection"
1232 Some MIPS machines can be configured for either little or big endian
1233 byte order. These modes require different kernels and a different
1234 Linux distribution. In general there is one preferred byteorder for a
1235 particular system but some systems are just as commonly used in the
1236 one or the other endianness.
1238 config CPU_BIG_ENDIAN
1240 depends on SYS_SUPPORTS_BIG_ENDIAN
1242 config CPU_LITTLE_ENDIAN
1243 bool "Little endian"
1244 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1251 config SYS_SUPPORTS_APM_EMULATION
1254 config SYS_SUPPORTS_BIG_ENDIAN
1257 config SYS_SUPPORTS_LITTLE_ENDIAN
1260 config MIPS_HUGE_TLB_SUPPORT
1261 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1275 config PCI_GT64XXX_PCI0
1278 config PCI_XTALK_BRIDGE
1281 config NO_EXCEPT_FILL
1287 config SWAP_IO_SPACE
1290 config SGI_HAS_INDYDOG
1302 config SGI_HAS_ZILOG
1305 config SGI_HAS_I8042
1308 config DEFAULT_SGI_PARTITION
1320 config MIPS_L1_CACHE_SHIFT_4
1323 config MIPS_L1_CACHE_SHIFT_5
1326 config MIPS_L1_CACHE_SHIFT_6
1329 config MIPS_L1_CACHE_SHIFT_7
1332 config MIPS_L1_CACHE_SHIFT
1334 default "7" if MIPS_L1_CACHE_SHIFT_7
1335 default "6" if MIPS_L1_CACHE_SHIFT_6
1336 default "5" if MIPS_L1_CACHE_SHIFT_5
1337 default "4" if MIPS_L1_CACHE_SHIFT_4
1340 config ARC_CMDLINE_ONLY
1344 bool "ARC console support"
1345 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1359 menu "CPU selection"
1365 config CPU_LOONGSON64
1366 bool "Loongson 64-bit CPU"
1367 depends on SYS_HAS_CPU_LOONGSON64
1368 select ARCH_HAS_PHYS_TO_DMA
1370 select CPU_HAS_PREFETCH
1371 select CPU_SUPPORTS_64BIT_KERNEL
1372 select CPU_SUPPORTS_HIGHMEM
1373 select CPU_SUPPORTS_HUGEPAGES
1374 select CPU_SUPPORTS_MSA
1375 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1376 select CPU_MIPSR2_IRQ_VI
1377 select WEAK_ORDERING
1378 select WEAK_REORDERING_BEYOND_LLSC
1379 select MIPS_ASID_BITS_VARIABLE
1380 select MIPS_PGD_C0_CONTEXT
1381 select MIPS_L1_CACHE_SHIFT_6
1386 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1387 cores implements the MIPS64R2 instruction set with many extensions,
1388 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1389 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1390 Loongson-2E/2F is not covered here and will be removed in future.
1392 config LOONGSON3_ENHANCEMENT
1393 bool "New Loongson-3 CPU Enhancements"
1395 depends on CPU_LOONGSON64
1397 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1398 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1399 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1400 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1401 Fast TLB refill support, etc.
1403 This option enable those enhancements which are not probed at run
1404 time. If you want a generic kernel to run on all Loongson 3 machines,
1405 please say 'N' here. If you want a high-performance kernel to run on
1406 new Loongson-3 machines only, please say 'Y' here.
1408 config CPU_LOONGSON3_WORKAROUNDS
1409 bool "Old Loongson-3 LLSC Workarounds"
1411 depends on CPU_LOONGSON64
1413 Loongson-3 processors have the llsc issues which require workarounds.
1414 Without workarounds the system may hang unexpectedly.
1416 Newer Loongson-3 will fix these issues and no workarounds are needed.
1417 The workarounds have no significant side effect on them but may
1418 decrease the performance of the system so this option should be
1419 disabled unless the kernel is intended to be run on old systems.
1421 If unsure, please say Y.
1423 config CPU_LOONGSON3_CPUCFG_EMULATION
1424 bool "Emulate the CPUCFG instruction on older Loongson cores"
1426 depends on CPU_LOONGSON64
1428 Loongson-3A R4 and newer have the CPUCFG instruction available for
1429 userland to query CPU capabilities, much like CPUID on x86. This
1430 option provides emulation of the instruction on older Loongson
1431 cores, back to Loongson-3A1000.
1433 If unsure, please say Y.
1435 config CPU_LOONGSON2E
1437 depends on SYS_HAS_CPU_LOONGSON2E
1438 select CPU_LOONGSON2EF
1440 The Loongson 2E processor implements the MIPS III instruction set
1441 with many extensions.
1443 It has an internal FPGA northbridge, which is compatible to
1446 config CPU_LOONGSON2F
1448 depends on SYS_HAS_CPU_LOONGSON2F
1449 select CPU_LOONGSON2EF
1452 The Loongson 2F processor implements the MIPS III instruction set
1453 with many extensions.
1455 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1456 have a similar programming interface with FPGA northbridge used in
1459 config CPU_LOONGSON1B
1461 depends on SYS_HAS_CPU_LOONGSON1B
1462 select CPU_LOONGSON32
1463 select LEDS_GPIO_REGISTER
1465 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1466 Release 1 instruction set and part of the MIPS32 Release 2
1469 config CPU_LOONGSON1C
1471 depends on SYS_HAS_CPU_LOONGSON1C
1472 select CPU_LOONGSON32
1473 select LEDS_GPIO_REGISTER
1475 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1476 Release 1 instruction set and part of the MIPS32 Release 2
1479 config CPU_MIPS32_R1
1480 bool "MIPS32 Release 1"
1481 depends on SYS_HAS_CPU_MIPS32_R1
1482 select CPU_HAS_PREFETCH
1483 select CPU_SUPPORTS_32BIT_KERNEL
1484 select CPU_SUPPORTS_HIGHMEM
1486 Choose this option to build a kernel for release 1 or later of the
1487 MIPS32 architecture. Most modern embedded systems with a 32-bit
1488 MIPS processor are based on a MIPS32 processor. If you know the
1489 specific type of processor in your system, choose those that one
1490 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1491 Release 2 of the MIPS32 architecture is available since several
1492 years so chances are you even have a MIPS32 Release 2 processor
1493 in which case you should choose CPU_MIPS32_R2 instead for better
1496 config CPU_MIPS32_R2
1497 bool "MIPS32 Release 2"
1498 depends on SYS_HAS_CPU_MIPS32_R2
1499 select CPU_HAS_PREFETCH
1500 select CPU_SUPPORTS_32BIT_KERNEL
1501 select CPU_SUPPORTS_HIGHMEM
1502 select CPU_SUPPORTS_MSA
1505 Choose this option to build a kernel for release 2 or later of the
1506 MIPS32 architecture. Most modern embedded systems with a 32-bit
1507 MIPS processor are based on a MIPS32 processor. If you know the
1508 specific type of processor in your system, choose those that one
1509 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1511 config CPU_MIPS32_R5
1512 bool "MIPS32 Release 5"
1513 depends on SYS_HAS_CPU_MIPS32_R5
1514 select CPU_HAS_PREFETCH
1515 select CPU_SUPPORTS_32BIT_KERNEL
1516 select CPU_SUPPORTS_HIGHMEM
1517 select CPU_SUPPORTS_MSA
1519 select MIPS_O32_FP64_SUPPORT
1521 Choose this option to build a kernel for release 5 or later of the
1522 MIPS32 architecture. New MIPS processors, starting with the Warrior
1523 family, are based on a MIPS32r5 processor. If you own an older
1524 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1526 config CPU_MIPS32_R6
1527 bool "MIPS32 Release 6"
1528 depends on SYS_HAS_CPU_MIPS32_R6
1529 select CPU_HAS_PREFETCH
1530 select CPU_NO_LOAD_STORE_LR
1531 select CPU_SUPPORTS_32BIT_KERNEL
1532 select CPU_SUPPORTS_HIGHMEM
1533 select CPU_SUPPORTS_MSA
1535 select MIPS_O32_FP64_SUPPORT
1537 Choose this option to build a kernel for release 6 or later of the
1538 MIPS32 architecture. New MIPS processors, starting with the Warrior
1539 family, are based on a MIPS32r6 processor. If you own an older
1540 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1542 config CPU_MIPS64_R1
1543 bool "MIPS64 Release 1"
1544 depends on SYS_HAS_CPU_MIPS64_R1
1545 select CPU_HAS_PREFETCH
1546 select CPU_SUPPORTS_32BIT_KERNEL
1547 select CPU_SUPPORTS_64BIT_KERNEL
1548 select CPU_SUPPORTS_HIGHMEM
1549 select CPU_SUPPORTS_HUGEPAGES
1551 Choose this option to build a kernel for release 1 or later of the
1552 MIPS64 architecture. Many modern embedded systems with a 64-bit
1553 MIPS processor are based on a MIPS64 processor. If you know the
1554 specific type of processor in your system, choose those that one
1555 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1556 Release 2 of the MIPS64 architecture is available since several
1557 years so chances are you even have a MIPS64 Release 2 processor
1558 in which case you should choose CPU_MIPS64_R2 instead for better
1561 config CPU_MIPS64_R2
1562 bool "MIPS64 Release 2"
1563 depends on SYS_HAS_CPU_MIPS64_R2
1564 select CPU_HAS_PREFETCH
1565 select CPU_SUPPORTS_32BIT_KERNEL
1566 select CPU_SUPPORTS_64BIT_KERNEL
1567 select CPU_SUPPORTS_HIGHMEM
1568 select CPU_SUPPORTS_HUGEPAGES
1569 select CPU_SUPPORTS_MSA
1572 Choose this option to build a kernel for release 2 or later of the
1573 MIPS64 architecture. Many modern embedded systems with a 64-bit
1574 MIPS processor are based on a MIPS64 processor. If you know the
1575 specific type of processor in your system, choose those that one
1576 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1578 config CPU_MIPS64_R5
1579 bool "MIPS64 Release 5"
1580 depends on SYS_HAS_CPU_MIPS64_R5
1581 select CPU_HAS_PREFETCH
1582 select CPU_SUPPORTS_32BIT_KERNEL
1583 select CPU_SUPPORTS_64BIT_KERNEL
1584 select CPU_SUPPORTS_HIGHMEM
1585 select CPU_SUPPORTS_HUGEPAGES
1586 select CPU_SUPPORTS_MSA
1587 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1590 Choose this option to build a kernel for release 5 or later of the
1591 MIPS64 architecture. This is a intermediate MIPS architecture
1592 release partly implementing release 6 features. Though there is no
1593 any hardware known to be based on this release.
1595 config CPU_MIPS64_R6
1596 bool "MIPS64 Release 6"
1597 depends on SYS_HAS_CPU_MIPS64_R6
1598 select CPU_HAS_PREFETCH
1599 select CPU_NO_LOAD_STORE_LR
1600 select CPU_SUPPORTS_32BIT_KERNEL
1601 select CPU_SUPPORTS_64BIT_KERNEL
1602 select CPU_SUPPORTS_HIGHMEM
1603 select CPU_SUPPORTS_HUGEPAGES
1604 select CPU_SUPPORTS_MSA
1605 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1608 Choose this option to build a kernel for release 6 or later of the
1609 MIPS64 architecture. New MIPS processors, starting with the Warrior
1610 family, are based on a MIPS64r6 processor. If you own an older
1611 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1614 bool "MIPS Warrior P5600"
1615 depends on SYS_HAS_CPU_P5600
1616 select CPU_HAS_PREFETCH
1617 select CPU_SUPPORTS_32BIT_KERNEL
1618 select CPU_SUPPORTS_HIGHMEM
1619 select CPU_SUPPORTS_MSA
1620 select CPU_SUPPORTS_CPUFREQ
1621 select CPU_MIPSR2_IRQ_VI
1622 select CPU_MIPSR2_IRQ_EI
1624 select MIPS_O32_FP64_SUPPORT
1626 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1627 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1628 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1629 level features like up to six P5600 calculation cores, CM2 with L2
1630 cache, IOCU/IOMMU (though might be unused depending on the system-
1631 specific IP core configuration), GIC, CPC, virtualisation module,
1636 depends on SYS_HAS_CPU_R3000
1639 select CPU_SUPPORTS_32BIT_KERNEL
1640 select CPU_SUPPORTS_HIGHMEM
1642 Please make sure to pick the right CPU type. Linux/MIPS is not
1643 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1644 *not* work on R4000 machines and vice versa. However, since most
1645 of the supported machines have an R4000 (or similar) CPU, R4x00
1646 might be a safe bet. If the resulting kernel does not work,
1647 try to recompile with R3000.
1651 depends on SYS_HAS_CPU_TX39XX
1652 select CPU_SUPPORTS_32BIT_KERNEL
1657 depends on SYS_HAS_CPU_VR41XX
1658 select CPU_SUPPORTS_32BIT_KERNEL
1659 select CPU_SUPPORTS_64BIT_KERNEL
1661 The options selects support for the NEC VR4100 series of processors.
1662 Only choose this option if you have one of these processors as a
1663 kernel built with this option will not run on any other type of
1664 processor or vice versa.
1668 depends on SYS_HAS_CPU_R4300
1669 select CPU_SUPPORTS_32BIT_KERNEL
1670 select CPU_SUPPORTS_64BIT_KERNEL
1671 select CPU_HAS_LOAD_STORE_LR
1673 MIPS Technologies R4300-series processors.
1677 depends on SYS_HAS_CPU_R4X00
1678 select CPU_SUPPORTS_32BIT_KERNEL
1679 select CPU_SUPPORTS_64BIT_KERNEL
1680 select CPU_SUPPORTS_HUGEPAGES
1682 MIPS Technologies R4000-series processors other than 4300, including
1683 the R4000, R4400, R4600, and 4700.
1687 depends on SYS_HAS_CPU_TX49XX
1688 select CPU_HAS_PREFETCH
1689 select CPU_SUPPORTS_32BIT_KERNEL
1690 select CPU_SUPPORTS_64BIT_KERNEL
1691 select CPU_SUPPORTS_HUGEPAGES
1695 depends on SYS_HAS_CPU_R5000
1696 select CPU_SUPPORTS_32BIT_KERNEL
1697 select CPU_SUPPORTS_64BIT_KERNEL
1698 select CPU_SUPPORTS_HUGEPAGES
1700 MIPS Technologies R5000-series processors other than the Nevada.
1704 depends on SYS_HAS_CPU_R5500
1705 select CPU_SUPPORTS_32BIT_KERNEL
1706 select CPU_SUPPORTS_64BIT_KERNEL
1707 select CPU_SUPPORTS_HUGEPAGES
1709 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1714 depends on SYS_HAS_CPU_NEVADA
1715 select CPU_SUPPORTS_32BIT_KERNEL
1716 select CPU_SUPPORTS_64BIT_KERNEL
1717 select CPU_SUPPORTS_HUGEPAGES
1719 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1723 depends on SYS_HAS_CPU_R10000
1724 select CPU_HAS_PREFETCH
1725 select CPU_SUPPORTS_32BIT_KERNEL
1726 select CPU_SUPPORTS_64BIT_KERNEL
1727 select CPU_SUPPORTS_HIGHMEM
1728 select CPU_SUPPORTS_HUGEPAGES
1730 MIPS Technologies R10000-series processors.
1734 depends on SYS_HAS_CPU_RM7000
1735 select CPU_HAS_PREFETCH
1736 select CPU_SUPPORTS_32BIT_KERNEL
1737 select CPU_SUPPORTS_64BIT_KERNEL
1738 select CPU_SUPPORTS_HIGHMEM
1739 select CPU_SUPPORTS_HUGEPAGES
1743 depends on SYS_HAS_CPU_SB1
1744 select CPU_SUPPORTS_32BIT_KERNEL
1745 select CPU_SUPPORTS_64BIT_KERNEL
1746 select CPU_SUPPORTS_HIGHMEM
1747 select CPU_SUPPORTS_HUGEPAGES
1748 select WEAK_ORDERING
1750 config CPU_CAVIUM_OCTEON
1751 bool "Cavium Octeon processor"
1752 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1753 select CPU_HAS_PREFETCH
1754 select CPU_SUPPORTS_64BIT_KERNEL
1755 select WEAK_ORDERING
1756 select CPU_SUPPORTS_HIGHMEM
1757 select CPU_SUPPORTS_HUGEPAGES
1758 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1759 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1760 select MIPS_L1_CACHE_SHIFT_7
1763 The Cavium Octeon processor is a highly integrated chip containing
1764 many ethernet hardware widgets for networking tasks. The processor
1765 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1766 Full details can be found at http://www.caviumnetworks.com.
1769 bool "Broadcom BMIPS"
1770 depends on SYS_HAS_CPU_BMIPS
1772 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1773 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1774 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1775 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1776 select CPU_SUPPORTS_32BIT_KERNEL
1777 select DMA_NONCOHERENT
1779 select SWAP_IO_SPACE
1780 select WEAK_ORDERING
1781 select CPU_SUPPORTS_HIGHMEM
1782 select CPU_HAS_PREFETCH
1783 select CPU_SUPPORTS_CPUFREQ
1784 select MIPS_EXTERNAL_TIMER
1786 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1789 bool "Netlogic XLR SoC"
1790 depends on SYS_HAS_CPU_XLR
1791 select CPU_SUPPORTS_32BIT_KERNEL
1792 select CPU_SUPPORTS_64BIT_KERNEL
1793 select CPU_SUPPORTS_HIGHMEM
1794 select CPU_SUPPORTS_HUGEPAGES
1795 select WEAK_ORDERING
1796 select WEAK_REORDERING_BEYOND_LLSC
1798 Netlogic Microsystems XLR/XLS processors.
1801 bool "Netlogic XLP SoC"
1802 depends on SYS_HAS_CPU_XLP
1803 select CPU_SUPPORTS_32BIT_KERNEL
1804 select CPU_SUPPORTS_64BIT_KERNEL
1805 select CPU_SUPPORTS_HIGHMEM
1806 select WEAK_ORDERING
1807 select WEAK_REORDERING_BEYOND_LLSC
1808 select CPU_HAS_PREFETCH
1810 select CPU_SUPPORTS_HUGEPAGES
1811 select MIPS_ASID_BITS_VARIABLE
1813 Netlogic Microsystems XLP processors.
1816 config CPU_MIPS32_3_5_FEATURES
1817 bool "MIPS32 Release 3.5 Features"
1818 depends on SYS_HAS_CPU_MIPS32_R3_5
1819 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1822 Choose this option to build a kernel for release 2 or later of the
1823 MIPS32 architecture including features from the 3.5 release such as
1824 support for Enhanced Virtual Addressing (EVA).
1826 config CPU_MIPS32_3_5_EVA
1827 bool "Enhanced Virtual Addressing (EVA)"
1828 depends on CPU_MIPS32_3_5_FEATURES
1832 Choose this option if you want to enable the Enhanced Virtual
1833 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1834 One of its primary benefits is an increase in the maximum size
1835 of lowmem (up to 3GB). If unsure, say 'N' here.
1837 config CPU_MIPS32_R5_FEATURES
1838 bool "MIPS32 Release 5 Features"
1839 depends on SYS_HAS_CPU_MIPS32_R5
1840 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1842 Choose this option to build a kernel for release 2 or later of the
1843 MIPS32 architecture including features from release 5 such as
1844 support for Extended Physical Addressing (XPA).
1846 config CPU_MIPS32_R5_XPA
1847 bool "Extended Physical Addressing (XPA)"
1848 depends on CPU_MIPS32_R5_FEATURES
1850 depends on !PAGE_SIZE_4KB
1851 depends on SYS_SUPPORTS_HIGHMEM
1854 select PHYS_ADDR_T_64BIT
1857 Choose this option if you want to enable the Extended Physical
1858 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1859 benefit is to increase physical addressing equal to or greater
1860 than 40 bits. Note that this has the side effect of turning on
1861 64-bit addressing which in turn makes the PTEs 64-bit in size.
1862 If unsure, say 'N' here.
1865 config CPU_NOP_WORKAROUNDS
1868 config CPU_JUMP_WORKAROUNDS
1871 config CPU_LOONGSON2F_WORKAROUNDS
1872 bool "Loongson 2F Workarounds"
1874 select CPU_NOP_WORKAROUNDS
1875 select CPU_JUMP_WORKAROUNDS
1877 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1878 require workarounds. Without workarounds the system may hang
1879 unexpectedly. For more information please refer to the gas
1880 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1882 Loongson 2F03 and later have fixed these issues and no workarounds
1883 are needed. The workarounds have no significant side effect on them
1884 but may decrease the performance of the system so this option should
1885 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1888 If unsure, please say Y.
1889 endif # CPU_LOONGSON2F
1891 config SYS_SUPPORTS_ZBOOT
1893 select HAVE_KERNEL_GZIP
1894 select HAVE_KERNEL_BZIP2
1895 select HAVE_KERNEL_LZ4
1896 select HAVE_KERNEL_LZMA
1897 select HAVE_KERNEL_LZO
1898 select HAVE_KERNEL_XZ
1899 select HAVE_KERNEL_ZSTD
1901 config SYS_SUPPORTS_ZBOOT_UART16550
1903 select SYS_SUPPORTS_ZBOOT
1905 config SYS_SUPPORTS_ZBOOT_UART_PROM
1907 select SYS_SUPPORTS_ZBOOT
1909 config CPU_LOONGSON2EF
1911 select CPU_SUPPORTS_32BIT_KERNEL
1912 select CPU_SUPPORTS_64BIT_KERNEL
1913 select CPU_SUPPORTS_HIGHMEM
1914 select CPU_SUPPORTS_HUGEPAGES
1915 select ARCH_HAS_PHYS_TO_DMA
1917 config CPU_LOONGSON32
1921 select CPU_HAS_PREFETCH
1922 select CPU_SUPPORTS_32BIT_KERNEL
1923 select CPU_SUPPORTS_HIGHMEM
1924 select CPU_SUPPORTS_CPUFREQ
1926 config CPU_BMIPS32_3300
1927 select SMP_UP if SMP
1930 config CPU_BMIPS4350
1932 select SYS_SUPPORTS_SMP
1933 select SYS_SUPPORTS_HOTPLUG_CPU
1935 config CPU_BMIPS4380
1937 select MIPS_L1_CACHE_SHIFT_6
1938 select SYS_SUPPORTS_SMP
1939 select SYS_SUPPORTS_HOTPLUG_CPU
1942 config CPU_BMIPS5000
1944 select MIPS_CPU_SCACHE
1945 select MIPS_L1_CACHE_SHIFT_7
1946 select SYS_SUPPORTS_SMP
1947 select SYS_SUPPORTS_HOTPLUG_CPU
1950 config SYS_HAS_CPU_LOONGSON64
1952 select CPU_SUPPORTS_CPUFREQ
1955 config SYS_HAS_CPU_LOONGSON2E
1958 config SYS_HAS_CPU_LOONGSON2F
1960 select CPU_SUPPORTS_CPUFREQ
1961 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1963 config SYS_HAS_CPU_LOONGSON1B
1966 config SYS_HAS_CPU_LOONGSON1C
1969 config SYS_HAS_CPU_MIPS32_R1
1972 config SYS_HAS_CPU_MIPS32_R2
1975 config SYS_HAS_CPU_MIPS32_R3_5
1978 config SYS_HAS_CPU_MIPS32_R5
1980 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1982 config SYS_HAS_CPU_MIPS32_R6
1984 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1986 config SYS_HAS_CPU_MIPS64_R1
1989 config SYS_HAS_CPU_MIPS64_R2
1992 config SYS_HAS_CPU_MIPS64_R6
1994 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1996 config SYS_HAS_CPU_P5600
1998 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2000 config SYS_HAS_CPU_R3000
2003 config SYS_HAS_CPU_TX39XX
2006 config SYS_HAS_CPU_VR41XX
2009 config SYS_HAS_CPU_R4300
2012 config SYS_HAS_CPU_R4X00
2015 config SYS_HAS_CPU_TX49XX
2018 config SYS_HAS_CPU_R5000
2021 config SYS_HAS_CPU_R5500
2024 config SYS_HAS_CPU_NEVADA
2027 config SYS_HAS_CPU_R10000
2029 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
2031 config SYS_HAS_CPU_RM7000
2034 config SYS_HAS_CPU_SB1
2037 config SYS_HAS_CPU_CAVIUM_OCTEON
2040 config SYS_HAS_CPU_BMIPS
2043 config SYS_HAS_CPU_BMIPS32_3300
2045 select SYS_HAS_CPU_BMIPS
2047 config SYS_HAS_CPU_BMIPS4350
2049 select SYS_HAS_CPU_BMIPS
2051 config SYS_HAS_CPU_BMIPS4380
2053 select SYS_HAS_CPU_BMIPS
2055 config SYS_HAS_CPU_BMIPS5000
2057 select SYS_HAS_CPU_BMIPS
2058 select ARCH_HAS_SYNC_DMA_FOR_CPU
2060 config SYS_HAS_CPU_XLR
2063 config SYS_HAS_CPU_XLP
2067 # CPU may reorder R->R, R->W, W->R, W->W
2068 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
2070 config WEAK_ORDERING
2074 # CPU may reorder reads and writes beyond LL/SC
2075 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
2077 config WEAK_REORDERING_BEYOND_LLSC
2082 # These two indicate any level of the MIPS32 and MIPS64 architecture
2086 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
2087 CPU_MIPS32_R6 || CPU_P5600
2091 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
2092 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
2095 # These indicate the revision of the architecture
2099 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
2103 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
2105 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2110 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
2112 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2117 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
2119 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
2120 select HAVE_ARCH_BITREVERSE
2121 select MIPS_ASID_BITS_VARIABLE
2122 select MIPS_CRC_SUPPORT
2125 config TARGET_ISA_REV
2127 default 1 if CPU_MIPSR1
2128 default 2 if CPU_MIPSR2
2129 default 5 if CPU_MIPSR5
2130 default 6 if CPU_MIPSR6
2133 Reflects the ISA revision being targeted by the kernel build. This
2134 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2142 config SYS_SUPPORTS_32BIT_KERNEL
2144 config SYS_SUPPORTS_64BIT_KERNEL
2146 config CPU_SUPPORTS_32BIT_KERNEL
2148 config CPU_SUPPORTS_64BIT_KERNEL
2150 config CPU_SUPPORTS_CPUFREQ
2152 config CPU_SUPPORTS_ADDRWINCFG
2154 config CPU_SUPPORTS_HUGEPAGES
2156 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
2157 config MIPS_PGD_C0_CONTEXT
2160 default y if (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
2163 # Set to y for ptrace access to watch registers.
2165 config HARDWARE_WATCHPOINTS
2167 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2172 prompt "Kernel code model"
2174 You should only select this option if you have a workload that
2175 actually benefits from 64-bit processing or if your machine has
2176 large memory. You will only be presented a single option in this
2177 menu if your system does not support both 32-bit and 64-bit kernels.
2180 bool "32-bit kernel"
2181 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2184 Select this option if you want to build a 32-bit kernel.
2187 bool "64-bit kernel"
2188 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2190 Select this option if you want to build a 64-bit kernel.
2194 config MIPS_VA_BITS_48
2195 bool "48 bits virtual memory"
2198 Support a maximum at least 48 bits of application virtual
2199 memory. Default is 40 bits or less, depending on the CPU.
2200 For page sizes 16k and above, this option results in a small
2201 memory overhead for page tables. For 4k page size, a fourth
2202 level of page tables is added which imposes both a memory
2203 overhead as well as slower TLB fault handling.
2208 prompt "Kernel page size"
2209 default PAGE_SIZE_4KB
2211 config PAGE_SIZE_4KB
2213 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2215 This option select the standard 4kB Linux page size. On some
2216 R3000-family processors this is the only available page size. Using
2217 4kB page size will minimize memory consumption and is therefore
2218 recommended for low memory systems.
2220 config PAGE_SIZE_8KB
2222 depends on CPU_CAVIUM_OCTEON
2223 depends on !MIPS_VA_BITS_48
2225 Using 8kB page size will result in higher performance kernel at
2226 the price of higher memory consumption. This option is available
2227 only on cnMIPS processors. Note that you will need a suitable Linux
2228 distribution to support this.
2230 config PAGE_SIZE_16KB
2232 depends on !CPU_R3000 && !CPU_TX39XX
2234 Using 16kB page size will result in higher performance kernel at
2235 the price of higher memory consumption. This option is available on
2236 all non-R3000 family processors. Note that you will need a suitable
2237 Linux distribution to support this.
2239 config PAGE_SIZE_32KB
2241 depends on CPU_CAVIUM_OCTEON
2242 depends on !MIPS_VA_BITS_48
2244 Using 32kB page size will result in higher performance kernel at
2245 the price of higher memory consumption. This option is available
2246 only on cnMIPS cores. Note that you will need a suitable Linux
2247 distribution to support this.
2249 config PAGE_SIZE_64KB
2251 depends on !CPU_R3000 && !CPU_TX39XX
2253 Using 64kB page size will result in higher performance kernel at
2254 the price of higher memory consumption. This option is available on
2255 all non-R3000 family processor. Not that at the time of this
2256 writing this option is still high experimental.
2260 config FORCE_MAX_ZONEORDER
2261 int "Maximum zone order"
2262 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2263 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2264 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2265 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2266 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2267 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2271 The kernel memory allocator divides physically contiguous memory
2272 blocks into "zones", where each zone is a power of two number of
2273 pages. This option selects the largest power of two that the kernel
2274 keeps in the memory allocator. If you need to allocate very large
2275 blocks of physically contiguous memory, then you may need to
2276 increase this value.
2278 This config option is actually maximum order plus one. For example,
2279 a value of 11 means that the largest free memory block is 2^10 pages.
2281 The page size is not necessarily 4KB. Keep this in mind
2282 when choosing a value for this option.
2287 config IP22_CPU_SCACHE
2292 # Support for a MIPS32 / MIPS64 style S-caches
2294 config MIPS_CPU_SCACHE
2298 config R5000_CPU_SCACHE
2302 config RM7000_CPU_SCACHE
2306 config SIBYTE_DMA_PAGEOPS
2307 bool "Use DMA to clear/copy pages"
2310 Instead of using the CPU to zero and copy pages, use a Data Mover
2311 channel. These DMA channels are otherwise unused by the standard
2312 SiByte Linux port. Seems to give a small performance benefit.
2314 config CPU_HAS_PREFETCH
2317 config CPU_GENERIC_DUMP_TLB
2319 default y if !(CPU_R3000 || CPU_TX39XX)
2321 config MIPS_FP_SUPPORT
2322 bool "Floating Point support" if EXPERT
2325 Select y to include support for floating point in the kernel
2326 including initialization of FPU hardware, FP context save & restore
2327 and emulation of an FPU where necessary. Without this support any
2328 userland program attempting to use floating point instructions will
2331 If you know that your userland will not attempt to use floating point
2332 instructions then you can say n here to shrink the kernel a little.
2336 config CPU_R2300_FPU
2338 depends on MIPS_FP_SUPPORT
2339 default y if CPU_R3000 || CPU_TX39XX
2346 depends on MIPS_FP_SUPPORT
2347 default y if !CPU_R2300_FPU
2349 config CPU_R4K_CACHE_TLB
2351 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2354 bool "MIPS MT SMP support (1 TC on each available VPE)"
2356 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2357 select CPU_MIPSR2_IRQ_VI
2358 select CPU_MIPSR2_IRQ_EI
2363 select SYS_SUPPORTS_SMP
2364 select SYS_SUPPORTS_SCHED_SMT
2365 select MIPS_PERF_SHARED_TC_COUNTERS
2367 This is a kernel model which is known as SMVP. This is supported
2368 on cores with the MT ASE and uses the available VPEs to implement
2369 virtual processors which supports SMP. This is equivalent to the
2370 Intel Hyperthreading feature. For further information go to
2371 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2377 bool "SMT (multithreading) scheduler support"
2378 depends on SYS_SUPPORTS_SCHED_SMT
2381 SMT scheduler support improves the CPU scheduler's decision making
2382 when dealing with MIPS MT enabled cores at a cost of slightly
2383 increased overhead in some places. If unsure say N here.
2385 config SYS_SUPPORTS_SCHED_SMT
2388 config SYS_SUPPORTS_MULTITHREADING
2391 config MIPS_MT_FPAFF
2392 bool "Dynamic FPU affinity for FP-intensive threads"
2394 depends on MIPS_MT_SMP
2396 config MIPSR2_TO_R6_EMULATOR
2397 bool "MIPS R2-to-R6 emulator"
2398 depends on CPU_MIPSR6
2399 depends on MIPS_FP_SUPPORT
2402 Choose this option if you want to run non-R6 MIPS userland code.
2403 Even if you say 'Y' here, the emulator will still be disabled by
2404 default. You can enable it using the 'mipsr2emu' kernel option.
2405 The only reason this is a build-time option is to save ~14K from the
2408 config SYS_SUPPORTS_VPE_LOADER
2410 depends on SYS_SUPPORTS_MULTITHREADING
2412 Indicates that the platform supports the VPE loader, and provides
2415 config MIPS_VPE_LOADER
2416 bool "VPE loader support."
2417 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2418 select CPU_MIPSR2_IRQ_VI
2419 select CPU_MIPSR2_IRQ_EI
2422 Includes a loader for loading an elf relocatable object
2423 onto another VPE and running it.
2425 config MIPS_VPE_LOADER_CMP
2428 depends on MIPS_VPE_LOADER && MIPS_CMP
2430 config MIPS_VPE_LOADER_MT
2433 depends on MIPS_VPE_LOADER && !MIPS_CMP
2435 config MIPS_VPE_LOADER_TOM
2436 bool "Load VPE program into memory hidden from linux"
2437 depends on MIPS_VPE_LOADER
2440 The loader can use memory that is present but has been hidden from
2441 Linux using the kernel command line option "mem=xxMB". It's up to
2442 you to ensure the amount you put in the option and the space your
2443 program requires is less or equal to the amount physically present.
2445 config MIPS_VPE_APSP_API
2446 bool "Enable support for AP/SP API (RTLX)"
2447 depends on MIPS_VPE_LOADER
2449 config MIPS_VPE_APSP_API_CMP
2452 depends on MIPS_VPE_APSP_API && MIPS_CMP
2454 config MIPS_VPE_APSP_API_MT
2457 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2460 bool "MIPS CMP framework support (DEPRECATED)"
2461 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2464 select SYS_SUPPORTS_SMP
2465 select WEAK_ORDERING
2468 Select this if you are using a bootloader which implements the "CMP
2469 framework" protocol (ie. YAMON) and want your kernel to make use of
2470 its ability to start secondary CPUs.
2472 Unless you have a specific need, you should use CONFIG_MIPS_CPS
2476 bool "MIPS Coherent Processing System support"
2477 depends on SYS_SUPPORTS_MIPS_CPS
2479 select MIPS_CPS_PM if HOTPLUG_CPU
2481 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2482 select SYS_SUPPORTS_HOTPLUG_CPU
2483 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2484 select SYS_SUPPORTS_SMP
2485 select WEAK_ORDERING
2486 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2488 Select this if you wish to run an SMP kernel across multiple cores
2489 within a MIPS Coherent Processing System. When this option is
2490 enabled the kernel will probe for other cores and boot them with
2491 no external assistance. It is safe to enable this when hardware
2492 support is unavailable.
2505 config SB1_PASS_2_WORKAROUNDS
2507 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2510 config SB1_PASS_2_1_WORKAROUNDS
2512 depends on CPU_SB1 && CPU_SB1_PASS_2
2516 prompt "SmartMIPS or microMIPS ASE support"
2518 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2521 Select this if you want neither microMIPS nor SmartMIPS support
2523 config CPU_HAS_SMARTMIPS
2524 depends on SYS_SUPPORTS_SMARTMIPS
2527 SmartMIPS is a extension of the MIPS32 architecture aimed at
2528 increased security at both hardware and software level for
2529 smartcards. Enabling this option will allow proper use of the
2530 SmartMIPS instructions by Linux applications. However a kernel with
2531 this option will not work on a MIPS core without SmartMIPS core. If
2532 you don't know you probably don't have SmartMIPS and should say N
2535 config CPU_MICROMIPS
2536 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2539 When this option is enabled the kernel will be built using the
2545 bool "Support for the MIPS SIMD Architecture"
2546 depends on CPU_SUPPORTS_MSA
2547 depends on MIPS_FP_SUPPORT
2548 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2550 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2551 and a set of SIMD instructions to operate on them. When this option
2552 is enabled the kernel will support allocating & switching MSA
2553 vector register contexts. If you know that your kernel will only be
2554 running on CPUs which do not support MSA or that your userland will
2555 not be making use of it then you may wish to say N here to reduce
2556 the size & complexity of your kernel.
2567 depends on !CPU_DIEI_BROKEN
2570 config CPU_DIEI_BROKEN
2576 config CPU_NO_LOAD_STORE_LR
2579 CPU lacks support for unaligned load and store instructions:
2580 LWL, LWR, SWL, SWR (Load/store word left/right).
2581 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2585 # Vectored interrupt mode is an R2 feature
2587 config CPU_MIPSR2_IRQ_VI
2591 # Extended interrupt mode is an R2 feature
2593 config CPU_MIPSR2_IRQ_EI
2598 depends on !CPU_R3000
2604 config CPU_DADDI_WORKAROUNDS
2607 config CPU_R4000_WORKAROUNDS
2609 select CPU_R4400_WORKAROUNDS
2611 config CPU_R4400_WORKAROUNDS
2614 config CPU_R4X00_BUGS64
2616 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2618 config MIPS_ASID_SHIFT
2620 default 6 if CPU_R3000 || CPU_TX39XX
2623 config MIPS_ASID_BITS
2625 default 0 if MIPS_ASID_BITS_VARIABLE
2626 default 6 if CPU_R3000 || CPU_TX39XX
2629 config MIPS_ASID_BITS_VARIABLE
2632 config MIPS_CRC_SUPPORT
2635 # R4600 erratum. Due to the lack of errata information the exact
2636 # technical details aren't known. I've experimentally found that disabling
2637 # interrupts during indexed I-cache flushes seems to be sufficient to deal
2639 config WAR_R4600_V1_INDEX_ICACHEOP
2642 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2644 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2645 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2646 # executed if there is no other dcache activity. If the dcache is
2647 # accessed for another instruction immediately preceding when these
2648 # cache instructions are executing, it is possible that the dcache
2649 # tag match outputs used by these cache instructions will be
2650 # incorrect. These cache instructions should be preceded by at least
2651 # four instructions that are not any kind of load or store
2654 # This is not allowed: lw
2658 # cache Hit_Writeback_Invalidate_D
2660 # This is allowed: lw
2665 # cache Hit_Writeback_Invalidate_D
2666 config WAR_R4600_V1_HIT_CACHEOP
2669 # Writeback and invalidate the primary cache dcache before DMA.
2671 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2672 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2673 # operate correctly if the internal data cache refill buffer is empty. These
2674 # CACHE instructions should be separated from any potential data cache miss
2675 # by a load instruction to an uncached address to empty the response buffer."
2676 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
2678 config WAR_R4600_V2_HIT_CACHEOP
2681 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2682 # the line which this instruction itself exists, the following
2683 # operation is not guaranteed."
2685 # Workaround: do two phase flushing for Index_Invalidate_I
2686 config WAR_TX49XX_ICACHE_INDEX_INV
2689 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2690 # opposes it being called that) where invalid instructions in the same
2691 # I-cache line worth of instructions being fetched may case spurious
2693 config WAR_ICACHE_REFILLS
2696 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2697 # may cause ll / sc and lld / scd sequences to execute non-atomically.
2698 config WAR_R10000_LLSC
2701 # 34K core erratum: "Problems Executing the TLBR Instruction"
2702 config WAR_MIPS34K_MISSED_ITLB
2706 # - Highmem only makes sense for the 32-bit kernel.
2707 # - The current highmem code will only work properly on physically indexed
2708 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2709 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2710 # moment we protect the user and offer the highmem option only on machines
2711 # where it's known to be safe. This will not offer highmem on a few systems
2712 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2713 # indexed CPUs but we're playing safe.
2714 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2715 # know they might have memory configurations that could make use of highmem
2719 bool "High Memory Support"
2720 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2723 config CPU_SUPPORTS_HIGHMEM
2726 config SYS_SUPPORTS_HIGHMEM
2729 config SYS_SUPPORTS_SMARTMIPS
2732 config SYS_SUPPORTS_MICROMIPS
2735 config SYS_SUPPORTS_MIPS16
2738 This option must be set if a kernel might be executed on a MIPS16-
2739 enabled CPU even if MIPS16 is not actually being used. In other
2740 words, it makes the kernel MIPS16-tolerant.
2742 config CPU_SUPPORTS_MSA
2745 config ARCH_FLATMEM_ENABLE
2747 depends on !NUMA && !CPU_LOONGSON2EF
2749 config ARCH_SPARSEMEM_ENABLE
2751 select SPARSEMEM_STATIC if !SGI_IP27
2755 depends on SYS_SUPPORTS_NUMA
2758 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2759 Access). This option improves performance on systems with more
2760 than two nodes; on two node systems it is generally better to
2761 leave it disabled; on single node systems leave this option
2764 config SYS_SUPPORTS_NUMA
2767 config HAVE_SETUP_PER_CPU_AREA
2771 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2776 bool "Relocatable kernel"
2777 depends on SYS_SUPPORTS_RELOCATABLE
2778 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2779 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2780 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2781 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2784 This builds a kernel image that retains relocation information
2785 so it can be loaded someplace besides the default 1MB.
2786 The relocations make the kernel binary about 15% larger,
2787 but are discarded at runtime
2789 config RELOCATION_TABLE_SIZE
2790 hex "Relocation table size"
2791 depends on RELOCATABLE
2792 range 0x0 0x01000000
2793 default "0x00200000" if CPU_LOONGSON64
2794 default "0x00100000"
2796 A table of relocation data will be appended to the kernel binary
2797 and parsed at boot to fix up the relocated kernel.
2799 This option allows the amount of space reserved for the table to be
2800 adjusted, although the default of 1Mb should be ok in most cases.
2802 The build will fail and a valid size suggested if this is too small.
2804 If unsure, leave at the default value.
2806 config RANDOMIZE_BASE
2807 bool "Randomize the address of the kernel image"
2808 depends on RELOCATABLE
2810 Randomizes the physical and virtual address at which the
2811 kernel image is loaded, as a security feature that
2812 deters exploit attempts relying on knowledge of the location
2813 of kernel internals.
2815 Entropy is generated using any coprocessor 0 registers available.
2817 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2821 config RANDOMIZE_BASE_MAX_OFFSET
2822 hex "Maximum kASLR offset" if EXPERT
2823 depends on RANDOMIZE_BASE
2824 range 0x0 0x40000000 if EVA || 64BIT
2825 range 0x0 0x08000000
2826 default "0x01000000"
2828 When kASLR is active, this provides the maximum offset that will
2829 be applied to the kernel image. It should be set according to the
2830 amount of physical RAM available in the target system minus
2831 PHYSICAL_START and must be a power of 2.
2833 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2834 EVA or 64-bit. The default is 16Mb.
2841 config HW_PERF_EVENTS
2842 bool "Enable hardware performance counter support for perf events"
2843 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2846 Enable hardware performance counter support for perf events. If
2847 disabled, perf events will use software events only.
2850 bool "Enable DMI scanning"
2851 depends on MACH_LOONGSON64
2852 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2855 Enabled scanning of DMI to identify machine quirks. Say Y
2856 here unless you have verified that your setup is not
2857 affected by entries in the DMI blacklist. Required by PNP
2861 bool "Multi-Processing support"
2862 depends on SYS_SUPPORTS_SMP
2864 This enables support for systems with more than one CPU. If you have
2865 a system with only one CPU, say N. If you have a system with more
2866 than one CPU, say Y.
2868 If you say N here, the kernel will run on uni- and multiprocessor
2869 machines, but will use only one CPU of a multiprocessor machine. If
2870 you say Y here, the kernel will run on many, but not all,
2871 uniprocessor machines. On a uniprocessor machine, the kernel
2872 will run faster if you say N here.
2874 People using multiprocessor machines who say Y here should also say
2875 Y to "Enhanced Real Time Clock Support", below.
2877 See also the SMP-HOWTO available at
2878 <https://www.tldp.org/docs.html#howto>.
2880 If you don't know what to do here, say N.
2883 bool "Support for hot-pluggable CPUs"
2884 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2886 Say Y here to allow turning CPUs off and on. CPUs can be
2887 controlled through /sys/devices/system/cpu.
2888 (Note: power management support will enable this option
2889 automatically on SMP systems. )
2890 Say N if you want to disable CPU hotplug.
2895 config SYS_SUPPORTS_MIPS_CMP
2898 config SYS_SUPPORTS_MIPS_CPS
2901 config SYS_SUPPORTS_SMP
2904 config NR_CPUS_DEFAULT_4
2907 config NR_CPUS_DEFAULT_8
2910 config NR_CPUS_DEFAULT_16
2913 config NR_CPUS_DEFAULT_32
2916 config NR_CPUS_DEFAULT_64
2920 int "Maximum number of CPUs (2-256)"
2923 default "4" if NR_CPUS_DEFAULT_4
2924 default "8" if NR_CPUS_DEFAULT_8
2925 default "16" if NR_CPUS_DEFAULT_16
2926 default "32" if NR_CPUS_DEFAULT_32
2927 default "64" if NR_CPUS_DEFAULT_64
2929 This allows you to specify the maximum number of CPUs which this
2930 kernel will support. The maximum supported value is 32 for 32-bit
2931 kernel and 64 for 64-bit kernels; the minimum value which makes
2932 sense is 1 for Qemu (useful only for kernel debugging purposes)
2933 and 2 for all others.
2935 This is purely to save memory - each supported CPU adds
2936 approximately eight kilobytes to the kernel image. For best
2937 performance should round up your number of processors to the next
2940 config MIPS_PERF_SHARED_TC_COUNTERS
2943 config MIPS_NR_CPU_NR_MAP_1024
2946 config MIPS_NR_CPU_NR_MAP
2949 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2950 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2953 # Timer Interrupt Frequency Configuration
2957 prompt "Timer frequency"
2960 Allows the configuration of the timer frequency.
2963 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2966 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2969 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2972 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2975 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2978 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2981 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2984 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2988 config SYS_SUPPORTS_24HZ
2991 config SYS_SUPPORTS_48HZ
2994 config SYS_SUPPORTS_100HZ
2997 config SYS_SUPPORTS_128HZ
3000 config SYS_SUPPORTS_250HZ
3003 config SYS_SUPPORTS_256HZ
3006 config SYS_SUPPORTS_1000HZ
3009 config SYS_SUPPORTS_1024HZ
3012 config SYS_SUPPORTS_ARBIT_HZ
3014 default y if !SYS_SUPPORTS_24HZ && \
3015 !SYS_SUPPORTS_48HZ && \
3016 !SYS_SUPPORTS_100HZ && \
3017 !SYS_SUPPORTS_128HZ && \
3018 !SYS_SUPPORTS_250HZ && \
3019 !SYS_SUPPORTS_256HZ && \
3020 !SYS_SUPPORTS_1000HZ && \
3021 !SYS_SUPPORTS_1024HZ
3027 default 100 if HZ_100
3028 default 128 if HZ_128
3029 default 250 if HZ_250
3030 default 256 if HZ_256
3031 default 1000 if HZ_1000
3032 default 1024 if HZ_1024
3035 def_bool HIGH_RES_TIMERS
3038 bool "Kexec system call"
3041 kexec is a system call that implements the ability to shutdown your
3042 current kernel, and to start another kernel. It is like a reboot
3043 but it is independent of the system firmware. And like a reboot
3044 you can start any kernel with it, not just Linux.
3046 The name comes from the similarity to the exec system call.
3048 It is an ongoing process to be certain the hardware in a machine
3049 is properly shutdown, so do not be surprised if this code does not
3050 initially work for you. As of this writing the exact hardware
3051 interface is strongly in flux, so no good recommendation can be
3055 bool "Kernel crash dumps"
3057 Generate crash dump after being started by kexec.
3058 This should be normally only set in special crash dump kernels
3059 which are loaded in the main kernel with kexec-tools into
3060 a specially reserved region and then later executed after
3061 a crash by kdump/kexec. The crash dump kernel must be compiled
3062 to a memory address not used by the main kernel or firmware using
3065 config PHYSICAL_START
3066 hex "Physical address where the kernel is loaded"
3067 default "0xffffffff84000000"
3068 depends on CRASH_DUMP
3070 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
3071 If you plan to use kernel for capturing the crash dump change
3072 this value to start of the reserved region (the "X" value as
3073 specified in the "crashkernel=YM@XM" command line boot parameter
3074 passed to the panic-ed kernel).
3076 config MIPS_O32_FP64_SUPPORT
3077 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
3078 depends on 32BIT || MIPS32_O32
3080 When this is enabled, the kernel will support use of 64-bit floating
3081 point registers with binaries using the O32 ABI along with the
3082 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
3083 32-bit MIPS systems this support is at the cost of increasing the
3084 size and complexity of the compiled FPU emulator. Thus if you are
3085 running a MIPS32 system and know that none of your userland binaries
3086 will require 64-bit floating point, you may wish to reduce the size
3087 of your kernel & potentially improve FP emulation performance by
3090 Although binutils currently supports use of this flag the details
3091 concerning its effect upon the O32 ABI in userland are still being
3092 worked on. In order to avoid userland becoming dependent upon current
3093 behaviour before the details have been finalised, this option should
3094 be considered experimental and only enabled by those working upon
3102 select OF_EARLY_FLATTREE
3112 prompt "Kernel appended dtb support" if USE_OF
3113 default MIPS_NO_APPENDED_DTB
3115 config MIPS_NO_APPENDED_DTB
3118 Do not enable appended dtb support.
3120 config MIPS_ELF_APPENDED_DTB
3123 With this option, the boot code will look for a device tree binary
3124 DTB) included in the vmlinux ELF section .appended_dtb. By default
3125 it is empty and the DTB can be appended using binutils command
3128 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
3130 This is meant as a backward compatibility convenience for those
3131 systems with a bootloader that can't be upgraded to accommodate
3132 the documented boot protocol using a device tree.
3134 config MIPS_RAW_APPENDED_DTB
3135 bool "vmlinux.bin or vmlinuz.bin"
3137 With this option, the boot code will look for a device tree binary
3138 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
3139 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
3141 This is meant as a backward compatibility convenience for those
3142 systems with a bootloader that can't be upgraded to accommodate
3143 the documented boot protocol using a device tree.
3145 Beware that there is very little in terms of protection against
3146 this option being confused by leftover garbage in memory that might
3147 look like a DTB header after a reboot if no actual DTB is appended
3148 to vmlinux.bin. Do not leave this option active in a production kernel
3149 if you don't intend to always append a DTB.
3153 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
3154 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
3155 !MACH_LOONGSON64 && !MIPS_MALTA && \
3157 default MIPS_CMDLINE_FROM_BOOTLOADER
3159 config MIPS_CMDLINE_FROM_DTB
3161 bool "Dtb kernel arguments if available"
3163 config MIPS_CMDLINE_DTB_EXTEND
3165 bool "Extend dtb kernel arguments with bootloader arguments"
3167 config MIPS_CMDLINE_FROM_BOOTLOADER
3168 bool "Bootloader kernel arguments if available"
3170 config MIPS_CMDLINE_BUILTIN_EXTEND
3171 depends on CMDLINE_BOOL
3172 bool "Extend builtin kernel arguments with bootloader arguments"
3177 config LOCKDEP_SUPPORT
3181 config STACKTRACE_SUPPORT
3185 config PGTABLE_LEVELS
3187 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3188 default 3 if 64BIT && !PAGE_SIZE_64KB
3191 config MIPS_AUTO_PFN_OFFSET
3194 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3196 config PCI_DRIVERS_GENERIC
3197 select PCI_DOMAINS_GENERIC if PCI
3200 config PCI_DRIVERS_LEGACY
3201 def_bool !PCI_DRIVERS_GENERIC
3202 select NO_GENERIC_PCI_IOPORT_MAP
3203 select PCI_DOMAINS if PCI
3206 # ISA support is now enabled via select. Too many systems still have the one
3207 # or other ISA chip on the board that users don't know about so don't expect
3208 # users to choose the right thing ...
3214 bool "TURBOchannel support"
3215 depends on MACH_DECSTATION
3217 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3218 processors. TURBOchannel programming specifications are available
3220 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3222 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3223 Linux driver support status is documented at:
3224 <http://www.linux-mips.org/wiki/DECstation>
3230 config ARCH_MMAP_RND_BITS_MIN
3234 config ARCH_MMAP_RND_BITS_MAX
3238 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3241 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3248 select MIPS_EXTERNAL_TIMER
3254 config MIPS32_COMPAT
3260 config SYSVIPC_COMPAT
3264 bool "Kernel support for o32 binaries"
3266 select ARCH_WANT_OLD_COMPAT_IPC
3268 select MIPS32_COMPAT
3269 select SYSVIPC_COMPAT if SYSVIPC
3271 Select this option if you want to run o32 binaries. These are pure
3272 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3273 existing binaries are in this format.
3278 bool "Kernel support for n32 binaries"
3280 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3282 select MIPS32_COMPAT
3283 select SYSVIPC_COMPAT if SYSVIPC
3285 Select this option if you want to run n32 binaries. These are
3286 64-bit binaries using 32-bit quantities for addressing and certain
3287 data that would normally be 64-bit. They are used in special
3292 menu "Power management options"
3294 config ARCH_HIBERNATION_POSSIBLE
3296 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3298 config ARCH_SUSPEND_POSSIBLE
3300 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3302 source "kernel/power/Kconfig"
3306 config MIPS_EXTERNAL_TIMER
3309 menu "CPU Power Management"
3311 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3312 source "drivers/cpufreq/Kconfig"
3315 source "drivers/cpuidle/Kconfig"
3319 source "drivers/firmware/Kconfig"
3321 source "arch/mips/kvm/Kconfig"
3323 source "arch/mips/vdso/Kconfig"