arch/microblaze/include/asm/asm.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2007 Michal Simek
   4  *
   5  * Michal  SIMEK <monstr@monstr.eu>
   6  */
   7
   8 /* FSL macros */
   9 #define NGET(val, fslnum) \
  10         __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
  11
  12 #define GET(val, fslnum) \
  13         __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
  14
  15 #define NCGET(val, fslnum) \
  16         __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
  17
  18 #define CGET(val, fslnum) \
  19         __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
  20
  21 #define NPUT(val, fslnum) \
  22         __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
  23
  24 #define PUT(val, fslnum) \
  25         __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
  26
  27 #define NCPUT(val, fslnum) \
  28         __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
  29
  30 #define CPUT(val, fslnum) \
  31         __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
  32
  33 /* CPU dependent */
  34 /* machine status register */
  35 #define MFS(val, reg) \
  36         __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
  37
  38 #define MTS(val, reg) \
  39         __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
  40
  41 /* get return address from interrupt */
  42 #define R14(val) \
  43         __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
  44
  45 /* get return address from interrupt */
  46 #define R17(val) \
  47         __asm__ __volatile__ ("addi %0, r17, 0" : "=r" (val));
  48
  49 #define NOP     __asm__ __volatile__ ("nop");
  50
  51 /* use machine status registe USE_MSR_REG */
  52 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR == 1
  53 #define MSRSET(val) \
  54         __asm__ __volatile__ ("msrset r0," #val );
  55
  56 #define MSRCLR(val) \
  57         __asm__ __volatile__ ("msrclr r0," #val );
  58
  59 #else
  60 #define MSRSET(val)                                             \
  61 {                                                               \
  62         register unsigned tmp;                                  \
  63         __asm__ __volatile__ ("                                 \
  64                         mfs     %0, rmsr;                       \
  65                         ori     %0, %0, "#val";                 \
  66                         mts     rmsr, %0;                       \
  67                         nop;"                                   \
  68                         : "=r" (tmp)                            \
  69                         : "d" (val)                             \
  70                         : "memory");                            \
  71 }
  72
  73 #define MSRCLR(val)                                             \
  74 {                                                               \
  75         register unsigned tmp;                                  \
  76         __asm__ __volatile__ ("                                 \
  77                         mfs     %0, rmsr;                       \
  78                         andi    %0, %0, ~"#val";                \
  79                         mts     rmsr, %0;                       \
  80                         nop;"                                   \
  81                         : "=r" (tmp)                            \
  82                         : "d" (val)                             \
  83                         : "memory");                            \
  84 }
  85 #endif