1 #ifndef _UAPI_METAG_ECH_H
2 #define _UAPI_METAG_ECH_H
5 * These bits can be set in the top half of the D0.8 register when DSP context
6 * switching is enabled, in order to support partial DSP context save/restore.
9 #define TBICTX_XEXT_BIT 0x1000 /* Enable extended context save */
10 #define TBICTX_XTDP_BIT 0x0800 /* DSP accumulators/RAM/templates */
11 #define TBICTX_XHL2_BIT 0x0400 /* Hardware loops */
12 #define TBICTX_XAXX_BIT 0x0200 /* Extended AX registers (A*.4-7) */
13 #define TBICTX_XDX8_BIT 0x0100 /* Extended DX registers (D*.8-15) */
15 #endif /* _UAPI_METAG_ECH_H */