2 * Apple Peripheral System Controller (PSC)
4 * The PSC is used on the AV Macs to control IO functions not handled
5 * by the VIAs (Ethernet, DSP, SCC).
9 * Try to figure out what's going on in pIFR5 and pIFR6. There seem to be
10 * persisant interrupt conditions in those registers and I have no idea what
11 * they are. Granted it doesn't affect since we're not enabling any interrupts
12 * on those levels at the moment, but it would be nice to know. I have a feeling
13 * they aren't actually interrupt lines but data lines (to the DSP?)
16 #include <linux/types.h>
17 #include <linux/kernel.h>
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #include <linux/irq.h>
23 #include <asm/traps.h>
24 #include <asm/bootinfo.h>
25 #include <asm/macintosh.h>
26 #include <asm/macints.h>
27 #include <asm/mac_psc.h>
35 * Debugging dump, used in various places to see what's going on.
38 static void psc_debug_dump(void)
42 if (!psc_present) return;
43 for (i = 0x30 ; i < 0x70 ; i += 0x10) {
44 printk("PSC #%d: IFR = 0x%02X IER = 0x%02X\n",
46 (int) psc_read_byte(pIFRbase + i),
47 (int) psc_read_byte(pIERbase + i));
52 * Try to kill all DMA channels on the PSC. Not sure how this his
53 * supposed to work; this is code lifted from macmace.c and then
54 * expanded to cover what I think are the other 7 channels.
57 static void psc_dma_die_die_die(void)
61 printk("Killing all PSC DMA channels...");
62 for (i = 0 ; i < 9 ; i++) {
63 psc_write_word(PSC_CTL_BASE + (i << 4), 0x8800);
64 psc_write_word(PSC_CTL_BASE + (i << 4), 0x1000);
65 psc_write_word(PSC_CMD_BASE + (i << 5), 0x1100);
66 psc_write_word(PSC_CMD_BASE + (i << 5) + 0x10, 0x1100);
72 * Initialize the PSC. For now this just involves shutting down all
73 * interrupt sources using the IERs.
76 void __init psc_init(void)
80 if (macintosh_config->ident != MAC_MODEL_C660
81 && macintosh_config->ident != MAC_MODEL_Q840)
89 * The PSC is always at the same spot, but using psc
90 * keeps things consistent with the psc_xxxx functions.
93 psc = (void *) PSC_BASE;
96 printk("PSC detected at %p\n", psc);
98 psc_dma_die_die_die();
104 * Mask and clear all possible interrupts
107 for (i = 0x30 ; i < 0x70 ; i += 0x10) {
108 psc_write_byte(pIERbase + i, 0x0F);
109 psc_write_byte(pIFRbase + i, 0x0F);
114 * PSC interrupt handler. It's a lot like the VIA interrupt handler.
117 static void psc_irq(unsigned int irq, struct irq_desc *desc)
119 unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
120 int pIFR = pIFRbase + offset;
121 int pIER = pIERbase + offset;
123 unsigned char irq_bit, events;
126 printk("psc_irq: irq %u pIFR = 0x%02X pIER = 0x%02X\n",
127 irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
130 events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
137 if (events & irq_bit) {
138 psc_write_byte(pIFR, irq_bit);
139 generic_handle_irq(irq_num);
143 } while (events >= irq_bit);
147 * Register the PSC interrupt dispatchers for autovector interrupts 3-6.
150 void __init psc_register_interrupts(void)
152 irq_set_chained_handler(IRQ_AUTO_3, psc_irq);
153 irq_set_handler_data(IRQ_AUTO_3, (void *)0x30);
154 irq_set_chained_handler(IRQ_AUTO_4, psc_irq);
155 irq_set_handler_data(IRQ_AUTO_4, (void *)0x40);
156 irq_set_chained_handler(IRQ_AUTO_5, psc_irq);
157 irq_set_handler_data(IRQ_AUTO_5, (void *)0x50);
158 irq_set_chained_handler(IRQ_AUTO_6, psc_irq);
159 irq_set_handler_data(IRQ_AUTO_6, (void *)0x60);
162 void psc_irq_enable(int irq) {
163 int irq_src = IRQ_SRC(irq);
164 int irq_idx = IRQ_IDX(irq);
165 int pIER = pIERbase + (irq_src << 4);
168 printk("psc_irq_enable(%d)\n", irq);
170 psc_write_byte(pIER, (1 << irq_idx) | 0x80);
173 void psc_irq_disable(int irq) {
174 int irq_src = IRQ_SRC(irq);
175 int irq_idx = IRQ_IDX(irq);
176 int pIER = pIERbase + (irq_src << 4);
179 printk("psc_irq_disable(%d)\n", irq);
181 psc_write_byte(pIER, 1 << irq_idx);