3 ** head.S -- This file contains the initial boot code for the
6 ** Copyright 1993 by Hamish Macdonald
8 ** 68040 fixes by Michael Rausch
9 ** 68060 fixes by Roman Hodek
10 ** MMU cleanup by Randy Thelen
11 ** Final MMU cleanup by Roman Zippel
13 ** Atari support by Andreas Schwab, using ideas of Robert de Vries
15 ** VME Support by Richard Hirst
17 ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
18 ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
19 ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
20 ** 95/11/18 Richard Hirst: Added MVME166 support
21 ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
22 ** Magnum- and FX-alternate ram
23 ** 98/04/25 Phil Blundell: added HP300 support
24 ** 1998/08/30 David Kilzer: Added support for font_desc structures
26 ** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01)
27 ** 2004/05/13 Kars de Jong: Finalised HP300 support
29 ** This file is subject to the terms and conditions of the GNU General Public
30 ** License. See the file README.legal in the main directory of this archive
38 * At this point, the boot loader has:
41 * Put us in supervisor state.
43 * The kernel setup code takes the following steps:
44 * . Raise interrupt level
45 * . Set up initial kernel memory mapping.
46 * . This sets up a mapping of the 4M of memory the kernel is located in.
47 * . It also does a mapping of any initial machine specific areas.
49 * . Enable cache memories
50 * . Jump to kernel startup
52 * Much of the file restructuring was to accomplish:
53 * 1) Remove register dependency through-out the file.
54 * 2) Increase use of subroutines to perform functions
55 * 3) Increase readability of the code
57 * Of course, readability is a subjective issue, so it will never be
58 * argued that that goal was accomplished. It was merely a goal.
59 * A key way to help make code more readable is to give good
60 * documentation. So, the first thing you will find is exhaustive
61 * write-ups on the structure of the file, and the features of the
62 * functional subroutines.
66 * Without a doubt the single largest chunk of head.S is spent
67 * mapping the kernel and I/O physical space into the logical range
69 * There are new subroutines and data structures to make MMU
70 * support cleaner and easier to understand.
71 * First, you will find a routine call "mmu_map" which maps
72 * a logical to a physical region for some length given a cache
73 * type on behalf of the caller. This routine makes writing the
74 * actual per-machine specific code very simple.
75 * A central part of the code, but not a subroutine in itself,
76 * is the mmu_init code which is broken down into mapping the kernel
77 * (the same for all machines) and mapping machine-specific I/O
79 * Also, there will be a description of engaging the MMU and
81 * You will notice that there is a chunk of code which
82 * can emit the entire MMU mapping of the machine. This is present
83 * only in debug modes and can be very helpful.
84 * Further, there is a new console driver in head.S that is
85 * also only engaged in debug mode. Currently, it's only supported
86 * on the Macintosh class of machines. However, it is hoped that
87 * others will plug-in support for specific machines.
89 * ######################################################################
93 * mmu_map was written for two key reasons. First, it was clear
94 * that it was very difficult to read the previous code for mapping
95 * regions of memory. Second, the Macintosh required such extensive
96 * memory allocations that it didn't make sense to propagate the
97 * existing code any further.
98 * mmu_map requires some parameters:
100 * mmu_map (logical, physical, length, cache_type)
102 * While this essentially describes the function in the abstract, you'll
103 * find more indepth description of other parameters at the implementation site.
105 * mmu_get_root_table_entry
106 * ------------------------
107 * mmu_get_ptr_table_entry
108 * -----------------------
109 * mmu_get_page_table_entry
110 * ------------------------
112 * These routines are used by other mmu routines to get a pointer into
113 * a table, if necessary a new table is allocated. These routines are working
114 * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
115 * table needs of course only to be allocated once in mmu_get_root_table_entry,
116 * so that here also some mmu specific initialization is done. The second page
117 * at the start of the kernel (the first page is unmapped later) is used for
118 * the kernel_pg_dir. It must be at a position known at link time (as it's used
119 * to initialize the init task struct) and since it needs special cache
120 * settings, it's the easiest to use this page, the rest of the page is used
121 * for further pointer tables.
122 * mmu_get_page_table_entry allocates always a whole page for page tables, this
123 * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
124 * to manage page tables in smaller pieces as nearly all mappings have that
127 * ######################################################################
130 * ######################################################################
134 * Thanks to a small helping routine enabling the mmu got quite simple
135 * and there is only one way left. mmu_engage makes a complete a new mapping
136 * that only includes the absolute necessary to be able to jump to the final
137 * position and to restore the original mapping.
138 * As this code doesn't need a transparent translation register anymore this
139 * means all registers are free to be used by machines that needs them for
142 * ######################################################################
146 * This algorithm will print out the page tables of the system as
147 * appropriate for an 030 or an 040. This is useful for debugging purposes
148 * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
150 * ######################################################################
154 * The console is also able to be turned off. The console in head.S
155 * is specifically for debugging and can be very useful. It is surrounded by
156 * #ifdef / #endif clauses so it doesn't have to ship in known-good
157 * kernels. It's basic algorithm is to determine the size of the screen
158 * (in height/width and bit depth) and then use that information for
159 * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
160 * debugging so I can see more good data. But it was trivial to add support
161 * for both fonts, so I included it.
162 * Also, the algorithm for plotting pixels is abstracted so that in
163 * theory other platforms could add support for different kinds of frame
164 * buffers. This could be very useful.
166 * console_put_penguin
167 * -------------------
168 * An important part of any Linux bring up is the penguin and there's
169 * nothing like getting the Penguin on the screen! This algorithm will work
170 * on any machine for which there is a console_plot_pixel.
174 * My hope is that the scroll algorithm does the right thing on the
175 * various platforms, but it wouldn't be hard to add the test conditions
176 * and new code if it doesn't.
181 * ######################################################################
183 * Register usage has greatly simplified within head.S. Every subroutine
184 * saves and restores all registers that it modifies (except it returns a
185 * value in there of course). So the only register that needs to be initialized
186 * is the stack pointer.
187 * All other init code and data is now placed in the init section, so it will
188 * be automatically freed at the end of the kernel initialization.
190 * ######################################################################
194 * There are many options available in a build of this file. I've
195 * taken the time to describe them here to save you the time of searching
196 * for them and trying to understand what they mean.
198 * CONFIG_xxx: These are the obvious machine configuration defines created
199 * during configuration. These are defined in autoconf.h.
201 * CONSOLE_DEBUG: Only supports a Mac frame buffer but could easily be
202 * extended to support other platforms.
204 * TEST_MMU: This is a test harness for running on any given machine but
205 * getting an MMU dump for another class of machine. The classes of machines
206 * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
207 * and any of the models (030, 040, 060, etc.).
209 * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
210 * When head.S boots on Atari, Amiga, Macintosh, and VME
211 * machines. At that point the underlying logic will be
212 * believed to be solid enough to be trusted, and TEST_MMU
213 * can be dropped. Do note that that will clean up the
214 * head.S code significantly as large blocks of #if/#else
215 * clauses can be removed.
217 * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
218 * determing why devices don't appear to work. A test case was to remove
219 * the cacheability of the kernel bits.
221 * MMU_PRINT: There is a routine built into head.S that can display the
222 * MMU data structures. It outputs its result through the serial_putc
223 * interface. So where ever that winds up driving data, that's where the
224 * mmu struct will appear.
226 * SERIAL_DEBUG: There are a series of putc() macro statements
227 * scattered through out the code to give progress of status to the
228 * person sitting at the console. This constant determines whether those
231 * DEBUG: This is the standard DEBUG flag that can be set for building
232 * the kernel. It has the effect adding additional tests into
238 * In theory these could be determined at run time or handed
239 * over by the booter. But, let's be real, it's a fine hard
240 * coded value. (But, you will notice the code is run-time
241 * flexible!) A pointer to the font's struct font_desc
242 * is kept locally in Lconsole_font. It is used to determine
243 * font size information dynamically.
246 * USE_PRINTER: Use the printer port for serial debug.
247 * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
248 * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
249 * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
251 * Macintosh constants:
252 * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug.
253 * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug.
256 #include <linux/linkage.h>
257 #include <linux/init.h>
258 #include <linux/pgtable.h>
259 #include <asm/bootinfo.h>
260 #include <asm/bootinfo-amiga.h>
261 #include <asm/bootinfo-atari.h>
262 #include <asm/bootinfo-hp300.h>
263 #include <asm/bootinfo-mac.h>
264 #include <asm/bootinfo-q40.h>
265 #include <asm/bootinfo-virt.h>
266 #include <asm/bootinfo-vme.h>
267 #include <asm/setup.h>
268 #include <asm/entry.h>
269 #include <asm/page.h>
270 #include <asm/asm-offsets.h>
272 # include <asm/machw.h>
275 #ifdef CONFIG_EARLY_PRINTK
276 # define SERIAL_DEBUG
277 # if defined(CONFIG_MAC) && defined(CONFIG_FONT_SUPPORT)
278 # define CONSOLE_DEBUG
283 #undef MMU_NOCACHE_KERNEL
287 * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
288 * The 8x8 font is harder to read but fits more on the screen.
290 #define FONT_8x8 /* default */
291 /* #define FONT_8x16 */ /* 2nd choice */
292 /* #define FONT_6x11 */ /* 3rd choice */
296 .globl m68k_init_mapped_size
297 .globl m68k_pgtable_cachemode
298 .globl m68k_supervisor_cachemode
299 #ifdef CONFIG_MVME16x
306 CPUTYPE_040 = 1 /* indicates an 040 */
307 CPUTYPE_060 = 2 /* indicates an 060 */
308 CPUTYPE_0460 = 3 /* if either above are set, this is set */
309 CPUTYPE_020 = 4 /* indicates an 020 */
311 /* Translation control register */
316 /* Transparent translation registers */
317 TTR_ENABLE = 0x8000 /* enable transparent translation */
318 TTR_ANYMODE = 0x4000 /* user and kernel mode access */
319 TTR_KERNELMODE = 0x2000 /* only kernel mode access */
320 TTR_USERMODE = 0x0000 /* only user mode access */
321 TTR_CI = 0x0400 /* inhibit cache */
322 TTR_RW = 0x0200 /* read/write mode */
323 TTR_RWM = 0x0100 /* read/write mask */
324 TTR_FCB2 = 0x0040 /* function code base bit 2 */
325 TTR_FCB1 = 0x0020 /* function code base bit 1 */
326 TTR_FCB0 = 0x0010 /* function code base bit 0 */
327 TTR_FCM2 = 0x0004 /* function code mask bit 2 */
328 TTR_FCM1 = 0x0002 /* function code mask bit 1 */
329 TTR_FCM0 = 0x0001 /* function code mask bit 0 */
331 /* Cache Control registers */
332 CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
333 CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
334 CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
335 CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
336 CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
337 CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
338 CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
339 CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
340 CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
341 CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
342 CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
343 CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
344 CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
345 CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
346 CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
347 CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
348 CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
349 CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
350 CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
351 CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
352 CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
353 CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
355 /* Miscellaneous definitions */
359 ROOT_TABLE_SIZE = 128
362 ROOT_INDEX_SHIFT = 25
364 PAGE_INDEX_SHIFT = 12
367 /* When debugging use readable names for labels */
369 #define L(name) .head.S.##name
371 #define L(name) .head.S./**/name
375 #define L(name) .L##name
377 #define L(name) .L/**/name
381 /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
383 #define __INITDATA .data
384 #define __FINIT .previous
387 /* Several macros to make the writing of subroutines easier:
388 * - func_start marks the beginning of the routine which setups the frame
389 * register and saves the registers, it also defines another macro
390 * to automatically restore the registers again.
391 * - func_return marks the end of the routine and simply calls the prepared
392 * macro to restore registers and jump back to the caller.
393 * - func_define generates another macro to automatically put arguments
394 * onto the stack call the subroutine and cleanup the stack again.
397 /* Within subroutines these macros can be used to access the arguments
398 * on the stack. With STACK some allocated memory on the stack can be
399 * accessed and ARG0 points to the return address (used by mmu_engage).
401 #define STACK %a6@(stackstart)
404 #define ARG2 %a6@(12)
405 #define ARG3 %a6@(16)
406 #define ARG4 %a6@(20)
408 .macro func_start name,saveregs,stack=0
411 moveml \saveregs,%sp@-
412 .set stackstart,-\stack
414 .macro func_return_\name
415 moveml %sp@+,\saveregs
421 .macro func_return name
425 .macro func_call name
429 .macro move_stack nr,arg1,arg2,arg3,arg4
431 move_stack "(\nr-1)",\arg2,\arg3,\arg4
436 .macro func_define name,nr=0
437 .macro \name arg1,arg2,arg3,arg4
438 move_stack \nr,\arg1,\arg2,\arg3,\arg4
446 func_define mmu_map,4
447 func_define mmu_map_tt,4
448 func_define mmu_fixup_page_mmu_cache,1
449 func_define mmu_temp_map,2
450 func_define mmu_engage
451 func_define mmu_get_root_table_entry,1
452 func_define mmu_get_ptr_table_entry,2
453 func_define mmu_get_page_table_entry,2
454 func_define mmu_print
455 func_define get_new_page
456 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
460 .macro mmu_map_eq arg1,arg2,arg3
461 mmu_map \arg1,\arg1,\arg2,\arg3
464 .macro get_bi_record record
466 func_call get_bi_record
470 func_define serial_putc,1
471 func_define console_putc,1
473 func_define console_init
474 func_define console_put_penguin
475 func_define console_plot_pixel,3
476 func_define console_scroll
479 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
483 func_call console_putc
486 func_call serial_putc
488 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
508 #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
525 #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
526 #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
527 #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
528 #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
529 #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
530 #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
531 #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
532 #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
533 #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
534 #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
535 #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
536 #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
537 #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
538 #define is_not_virt(lab) cmpl &MACH_VIRT,%pc@(m68k_machtype); jne lab
540 #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
542 cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
546 #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
547 #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
548 #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
549 #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
550 #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
551 #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
552 #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
554 /* On the HP300 we use the on-board LEDs for debug output before
555 the console is running. Writing a 1 bit turns the corresponding LED
556 _off_ - on the 340 bit 7 is towards the back panel of the machine. */
558 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
570 * Version numbers of the bootinfo interface
571 * The area from _stext to _start will later be used as kernel pointer table
573 bras 1f /* Jump over bootinfo version numbers */
575 .long BOOTINFOV_MAGIC
576 .long MACH_AMIGA, AMIGA_BOOTI_VERSION
577 .long MACH_ATARI, ATARI_BOOTI_VERSION
578 .long MACH_MVME147, MVME147_BOOTI_VERSION
579 .long MACH_MVME16x, MVME16x_BOOTI_VERSION
580 .long MACH_BVME6000, BVME6000_BOOTI_VERSION
581 .long MACH_MAC, MAC_BOOTI_VERSION
582 .long MACH_Q40, Q40_BOOTI_VERSION
583 .long MACH_HP300, HP300_BOOTI_VERSION
587 .equ kernel_pg_dir,_stext
589 .equ .,_stext+PAGESIZE
596 * Setup initial stack pointer
601 * Record the CPU and machine type.
603 get_bi_record BI_MACHTYPE
604 lea %pc@(m68k_machtype),%a1
607 get_bi_record BI_FPUTYPE
608 lea %pc@(m68k_fputype),%a1
611 get_bi_record BI_MMUTYPE
612 lea %pc@(m68k_mmutype),%a1
615 get_bi_record BI_CPUTYPE
616 lea %pc@(m68k_cputype),%a1
623 * For Macintosh, we need to determine the display parameters early (at least
624 * while debugging it).
627 is_not_mac(L(test_notmac))
629 get_bi_record BI_MAC_VADDR
630 lea %pc@(L(mac_videobase)),%a1
633 get_bi_record BI_MAC_VDEPTH
634 lea %pc@(L(mac_videodepth)),%a1
637 get_bi_record BI_MAC_VDIM
638 lea %pc@(L(mac_dimensions)),%a1
641 get_bi_record BI_MAC_VROW
642 lea %pc@(L(mac_rowbytes)),%a1
645 get_bi_record BI_MAC_SCCBASE
646 lea %pc@(L(mac_sccbase)),%a1
650 #endif /* CONFIG_MAC */
653 is_not_virt(L(test_notvirt))
655 get_bi_record BI_VIRT_GF_TTY_BASE
656 lea %pc@(L(virt_gf_tty_base)),%a1
659 #endif /* CONFIG_VIRT */
662 * There are ultimately two pieces of information we want for all kinds of
663 * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
664 * and is converted here from a booter type definition to a separate bit
665 * number which allows for the standard is_0x0 macro tests.
667 movel %pc@(m68k_cputype),%d0
674 * Test the BootInfo cputype for 060
678 bset #CPUTYPE_060,%d1
679 bset #CPUTYPE_0460,%d1
683 * Test the BootInfo cputype for 040
687 bset #CPUTYPE_040,%d1
688 bset #CPUTYPE_0460,%d1
692 * Test the BootInfo cputype for 020
696 bset #CPUTYPE_020,%d1
700 * Record the cpu type
702 lea %pc@(L(cputype)),%a0
708 * Now the macros are valid:
717 * Determine the cache mode for pages holding MMU tables
718 * and for supervisor mode, unused for '020 and '030
723 is_not_040_or_060(L(save_cachetype))
727 * d1 := cacheable write-through
728 * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
729 * but we have been using write-through since at least 2.0.29 so I
732 #ifdef CONFIG_060_WRITETHROUGH
734 * If this is a 68060 board using drivers with cache coherency
735 * problems, then supervisor memory accesses need to be write-through
736 * also; otherwise, we want copyback.
740 movel #_PAGE_CACHE040W,%d0
741 jra L(save_cachetype)
742 #endif /* CONFIG_060_WRITETHROUGH */
744 movew #_PAGE_CACHE040,%d0
746 movel #_PAGE_CACHE040W,%d1
749 /* Save cache mode for supervisor mode and page tables
751 lea %pc@(m68k_supervisor_cachemode),%a0
753 lea %pc@(m68k_pgtable_cachemode),%a0
757 * raise interrupt level
762 If running on an Atari, determine the I/O base of the
763 serial port and test if we are running on a Medusa or Hades.
764 This test is necessary here, because on the Hades the serial
765 port is only accessible in the high I/O memory area.
767 The test whether it is a Medusa is done by writing to the byte at
768 phys. 0x0. This should result in a bus error on all other machines.
770 ...should, but doesn't. The Afterburner040 for the Falcon has the
771 same behaviour (0x0..0x7 are no ROM shadow). So we have to do
772 another test to distinguish Medusa and AB040. This is a
773 read attempt for 0x00ff82fe phys. that should bus error on a Falcon
774 (+AB040), but is in the range where the Medusa always asserts DTACK.
776 The test for the Hades is done by reading address 0xb0000000. This
777 should give a bus error on the Medusa.
781 is_not_atari(L(notypetest))
783 /* get special machine type (Medusa/Hades/AB40) */
784 moveq #0,%d3 /* default if tag doesn't exist */
785 get_bi_record BI_ATARI_MCH_TYPE
789 lea %pc@(atari_mch_type),%a0
792 /* On the Hades, the iobase must be set up before opening the
793 * serial port. There are no I/O regs at 0x00ffxxxx at all. */
795 cmpl #ATARI_MACH_HADES,%d3
797 movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
798 1: lea %pc@(L(iobase)),%a0
805 is_mvme147(L(getvmetype))
806 is_bvme6000(L(getvmetype))
807 is_not_mvme16x(L(gvtdone))
809 /* See if the loader has specified the BI_VME_TYPE tag. Recent
810 * versions of VMELILO and TFTPLILO do this. We have to do this
811 * early so we know how to handle console output. If the tag
812 * doesn't exist then we use the Bug for output on MVME16x.
815 get_bi_record BI_VME_TYPE
819 lea %pc@(vme_brdtype),%a0
822 #ifdef CONFIG_MVME16x
823 is_not_mvme16x(L(gvtdone))
825 /* Need to get the BRD_ID info to differentiate between 162, 167,
826 * etc. This is available as a BI_VME_BRDINFO tag with later
827 * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
829 get_bi_record BI_VME_BRDINFO
833 /* Get pointer to board ID data from Bug */
836 .word 0x70 /* trap 0x70 - .BRD_ID */
839 lea %pc@(mvme_bdid),%a1
840 /* Structure is 32 bytes long */
856 is_not_hp300(L(nothp))
858 /* Get the address of the UART for serial debugging */
859 get_bi_record BI_HP300_UART_ADDR
863 lea %pc@(L(uartbase)),%a0
865 get_bi_record BI_HP300_UART_SCODE
869 lea %pc@(L(uart_scode)),%a0
876 * Initialize serial port
885 # ifdef CONSOLE_DEBUG
889 # endif /* CONFIG_LOGO */
890 # endif /* CONSOLE_DEBUG */
892 #endif /* CONFIG_MAC */
898 dputn %pc@(L(cputype))
899 dputn %pc@(m68k_supervisor_cachemode)
900 dputn %pc@(m68k_pgtable_cachemode)
904 * Save physical start address of kernel
906 lea %pc@(L(phys_kernel_start)),%a0
909 addl #PAGE_OFFSET,%a1
919 * This block of code does what's necessary to map in the various kinds
920 * of machines for execution of Linux.
921 * First map the first 4, 8, or 16 MB of kernel code & data
924 get_bi_record BI_MEMCHUNK
926 movel #16*1024*1024,%d1
934 lea %pc@(m68k_init_mapped_size),%a0
936 mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\
937 %pc@(m68k_supervisor_cachemode)
945 is_not_amiga(L(mmu_init_not_amiga))
952 is_not_040_or_060(1f)
955 * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
957 mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
959 * Map the Zorro III I/O space with transparent translation
960 * for frame buffer memory etc.
962 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
964 jbra L(mmu_init_done)
968 * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
970 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
971 mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
973 jbra L(mmu_init_done)
975 L(mmu_init_not_amiga):
982 is_not_atari(L(mmu_init_not_atari))
986 /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
987 the last 16 MB of virtual address space to the first 16 MB (i.e.
988 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
989 needed. I/O ranges are marked non-cachable.
991 For the Medusa it is better to map the I/O region transparently
992 (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
993 accessible only in the high area.
995 On the Hades all I/O registers are only accessible in the high
999 /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
1001 movel %pc@(atari_mch_type),%d3
1002 cmpl #ATARI_MACH_MEDUSA,%d3
1004 cmpl #ATARI_MACH_HADES,%d3
1006 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
1009 is_040_or_060(L(spata68040))
1011 /* Map everything non-cacheable, though not all parts really
1012 * need to disable caches (crucial only for 0xff8000..0xffffff
1013 * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
1014 * isn't really used, except for sometimes peeking into the
1015 * ROMs (mirror at phys. 0x0), so caching isn't necessary for
1017 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
1019 jbra L(mmu_init_done)
1023 mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
1025 jbra L(mmu_init_done)
1027 L(mmu_init_not_atari):
1031 is_not_q40(L(notq40))
1033 * add transparent mapping for 0xff00 0000 - 0xffff ffff
1034 * non-cached serialized etc..
1035 * this includes master chip, DAC, RTC and ISA ports
1036 * 0xfe000000-0xfeffffff is for screen and ROM
1041 mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
1042 mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
1044 jbra L(mmu_init_done)
1050 is_not_hp300(L(nothp300))
1052 /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
1053 * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
1054 * The ROM mapping is needed because the LEDs are mapped there too.
1060 * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
1062 mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
1064 jbra L(mmu_init_done)
1068 * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
1070 mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
1072 jbra L(mmu_init_done)
1075 #endif /* CONFIG_HP300 */
1077 #ifdef CONFIG_MVME147
1079 is_not_mvme147(L(not147))
1082 * On MVME147 we have already created kernel page tables for
1083 * 4MB of RAM at address 0, so now need to do a transparent
1084 * mapping of the top of memory space. Make it 0.5GByte for now,
1085 * so we can access on-board i/o areas.
1088 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
1090 jbra L(mmu_init_done)
1093 #endif /* CONFIG_MVME147 */
1095 #ifdef CONFIG_MVME16x
1097 is_not_mvme16x(L(not16x))
1100 * On MVME16x we have already created kernel page tables for
1101 * 4MB of RAM at address 0, so now need to do a transparent
1102 * mapping of the top of memory space. Make it 0.5GByte for now.
1103 * Supervisor only access, so transparent mapping doesn't
1104 * clash with User code virtual address space.
1105 * this covers IO devices, PROM and SRAM. The PROM and SRAM
1106 * mapping is needed to allow 167Bug to run.
1107 * IO is in the range 0xfff00000 to 0xfffeffff.
1108 * PROM is 0xff800000->0xffbfffff and SRAM is
1109 * 0xffe00000->0xffe1ffff.
1112 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1114 jbra L(mmu_init_done)
1117 #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
1119 #ifdef CONFIG_BVME6000
1121 is_not_bvme6000(L(not6000))
1124 * On BVME6000 we have already created kernel page tables for
1125 * 4MB of RAM at address 0, so now need to do a transparent
1126 * mapping of the top of memory space. Make it 0.5GByte for now,
1127 * so we can access on-board i/o areas.
1128 * Supervisor only access, so transparent mapping doesn't
1129 * clash with User code virtual address space.
1132 mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
1134 jbra L(mmu_init_done)
1137 #endif /* CONFIG_BVME6000 */
1142 * The Macintosh mappings are less clear.
1144 * Even as of this writing, it is unclear how the
1145 * Macintosh mappings will be done. However, as
1146 * the first author of this code I'm proposing the
1149 * Map the kernel (that's already done),
1150 * Map the I/O (on most machines that's the
1151 * 0x5000.0000 ... 0x5300.0000 range,
1152 * Map the video frame buffer using as few pages
1153 * as absolutely (this requirement mostly stems from
1154 * the fact that when the frame buffer is at
1155 * 0x0000.0000 then we know there is valid RAM just
1156 * above the screen that we don't want to waste!).
1158 * By the way, if the frame buffer is at 0x0000.0000
1159 * then the Macintosh is known as an RBV based Mac.
1161 * By the way 2, the code currently maps in a bunch of
1162 * regions. But I'd like to cut that out. (And move most
1163 * of the mappings up into the kernel proper ... or only
1164 * map what's necessary.)
1171 is_not_mac(L(mmu_init_not_mac))
1175 is_not_040_or_060(1f)
1177 moveq #_PAGE_NOCACHE_S,%d3
1180 moveq #_PAGE_NOCACHE030,%d3
1183 * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
1184 * we simply map the 4MB that contains the videomem
1187 movel #VIDEOMEMMASK,%d0
1188 andl %pc@(L(mac_videobase)),%d0
1190 mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
1191 /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
1192 mmu_map_eq #0x40000000,#0x02000000,%d3
1193 /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
1194 mmu_map_eq #0x50000000,#0x03000000,%d3
1195 /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
1196 mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
1198 jbra L(mmu_init_done)
1200 L(mmu_init_not_mac):
1204 is_not_sun3x(L(notsun3x))
1206 /* oh, the pain.. We're gonna want the prom code after
1207 * starting the MMU, so we copy the mappings, translating
1208 * from 8k -> 4k pages as we go.
1211 /* copy maps from 0xfee00000 to 0xff000000 */
1212 movel #0xfee00000, %d0
1213 moveq #ROOT_INDEX_SHIFT, %d1
1215 mmu_get_root_table_entry %d0
1217 movel #0xfee00000, %d0
1218 moveq #PTR_INDEX_SHIFT, %d1
1220 andl #PTR_TABLE_SIZE-1, %d0
1221 mmu_get_ptr_table_entry %a0,%d0
1223 movel #0xfee00000, %d0
1224 moveq #PAGE_INDEX_SHIFT, %d1
1226 andl #PAGE_TABLE_SIZE-1, %d0
1227 mmu_get_page_table_entry %a0,%d0
1229 /* this is where the prom page table lives */
1230 movel 0xfefe00d4, %a1
1233 movel #((0x200000 >> 13)-1), %d1
1243 /* setup tt1 for I/O */
1244 mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
1245 jbra L(mmu_init_done)
1251 is_not_virt(L(novirt))
1252 mmu_map_tt #1,#0xFF000000,#0x01000000,#_PAGE_NOCACHE_S
1253 jbra L(mmu_init_done)
1257 #ifdef CONFIG_APOLLO
1258 is_not_apollo(L(notapollo))
1261 mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
1264 jbra L(mmu_init_done)
1275 * On the 040 class machines, all pages that are used for the
1276 * mmu have to be fixed up. According to Motorola, pages holding mmu
1277 * tables should be non-cacheable on a '040 and write-through on a
1278 * '060. But analysis of the reasons for this, and practical
1279 * experience, showed that write-through also works on a '040.
1281 * Allocated memory so far goes from kernel_end to memory_start that
1282 * is used for all kind of tables, for that the cache attributes
1287 is_not_040_or_060(L(mmu_fixup_done))
1289 #ifdef MMU_NOCACHE_KERNEL
1290 jbra L(mmu_fixup_done)
1293 /* first fix the page at the start of the kernel, that
1294 * contains also kernel_pg_dir.
1296 movel %pc@(L(phys_kernel_start)),%d0
1297 subl #PAGE_OFFSET,%d0
1298 lea %pc@(_stext),%a0
1300 mmu_fixup_page_mmu_cache %a0
1302 movel %pc@(L(kernel_end)),%a0
1304 movel %pc@(L(memory_start)),%a1
1308 mmu_fixup_page_mmu_cache %a0
1323 * This chunk of code performs the gruesome task of engaging the MMU.
1324 * The reason it's gruesome is because when the MMU becomes engaged it
1325 * maps logical addresses to physical addresses. The Program Counter
1326 * register is then passed through the MMU before the next instruction
1327 * is fetched (the instruction following the engage MMU instruction).
1328 * This may mean one of two things:
1329 * 1. The Program Counter falls within the logical address space of
1330 * the kernel of which there are two sub-possibilities:
1331 * A. The PC maps to the correct instruction (logical PC == physical
1332 * code location), or
1333 * B. The PC does not map through and the processor will read some
1334 * data (or instruction) which is not the logically next instr.
1335 * As you can imagine, A is good and B is bad.
1337 * 2. The Program Counter does not map through the MMU. The processor
1338 * will take a Bus Error.
1339 * Clearly, 2 is bad.
1340 * It doesn't take a wiz kid to figure you want 1.A.
1341 * This code creates that possibility.
1342 * There are two possible 1.A. states (we now ignore the other above states):
1343 * A. The kernel is located at physical memory addressed the same as
1344 * the logical memory for the kernel, i.e., 0x01000.
1345 * B. The kernel is located some where else. e.g., 0x0400.0000
1347 * Under some conditions the Macintosh can look like A or B.
1348 * [A friend and I once noted that Apple hardware engineers should be
1349 * wacked twice each day: once when they show up at work (as in, Whack!,
1350 * "This is for the screwy hardware we know you're going to design today."),
1351 * and also at the end of the day (as in, Whack! "I don't know what
1352 * you designed today, but I'm sure it wasn't good."). -- rst]
1354 * This code works on the following premise:
1355 * If the kernel start (%d5) is within the first 16 Meg of RAM,
1356 * then create a mapping for the kernel at logical 0x8000.0000 to
1357 * the physical location of the pc. And, create a transparent
1358 * translation register for the first 16 Meg. Then, after the MMU
1359 * is engaged, the PC can be moved up into the 0x8000.0000 range
1360 * and then the transparent translation can be turned off and then
1361 * the PC can jump to the correct logical location and it will be
1362 * home (finally). This is essentially the code that the Amiga used
1363 * to use. Now, it's generalized for all processors. Which means
1364 * that a fresh (but temporary) mapping has to be created. The mapping
1365 * is made in page 0 (an as of yet unused location -- except for the
1366 * stack!). This temporary mapping will only require 1 pointer table
1367 * and a single page table (it can map 256K).
1369 * OK, alternatively, imagine that the Program Counter is not within
1370 * the first 16 Meg. Then, just use Transparent Translation registers
1371 * to do the right thing.
1373 * Last, if _start is already at 0x01000, then there's nothing special
1374 * to do (in other words, in a degenerate case of the first case above,
1387 * After this point no new memory is allocated and
1388 * the start of available memory is stored in availmem.
1389 * (The bootmem allocator requires now the physical address.)
1392 movel L(memory_start),availmem
1396 /* fixup the Amiga custom register location before printing */
1403 /* fixup the Atari iobase register location before printing */
1404 movel #0xff000000,L(iobase)
1410 movel #~VIDEOMEMMASK,%d0
1411 andl L(mac_videobase),%d0
1412 addl #VIDEOMEMBASE,%d0
1413 movel %d0,L(mac_videobase)
1414 #ifdef CONSOLE_DEBUG
1415 movel %pc@(L(phys_kernel_start)),%d0
1416 subl #PAGE_OFFSET,%d0
1417 subl %d0,L(console_font)
1418 subl %d0,L(console_font_data)
1420 orl #0x50000000,L(mac_sccbase)
1427 * Fix up the iobase register to point to the new location of the LEDs.
1429 movel #0xf0000000,L(iobase)
1432 * Energise the FPU and caches.
1435 movel #0x60,0xf05f400c
1439 * 040: slightly different, apparently.
1441 1: movew #0,0xf05f400e
1442 movew #0x64,0xf05f400e
1450 oriw #0x4000,0x61000000
1454 #ifdef CONFIG_APOLLO
1458 * Fix up the iobase before printing
1460 movel #0x80000000,L(iobase)
1471 is_not_040_or_060(L(cache_not_680460))
1479 is_060(L(cache68060))
1481 movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
1482 /* MMU stuff works in copyback mode now, so enable the cache */
1487 movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
1488 /* MMU stuff works in copyback mode now, so enable the cache */
1490 /* enable superscalar dispatch in PCR */
1496 L(cache_not_680460):
1499 movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
1509 * Setup initial stack pointer
1511 lea init_task,%curptr
1512 lea init_thread_union+THREAD_SIZE,%sp
1516 subl %a6,%a6 /* clear a6 for gdb */
1519 * The new 64bit printf support requires an early exception initialization.
1523 /* jump to the kernel start */
1531 * Find a tag record in the bootinfo structure
1532 * The bootinfo structure is located right after the kernel
1533 * Returns: d0: size (-1 if not found)
1534 * a0: data pointer (end-of-records if not found)
1536 func_start get_bi_record,%d1
1540 1: tstw %a0@(BIR_TAG)
1542 cmpw %a0@(BIR_TAG),%d0
1544 addw %a0@(BIR_SIZE),%a0
1547 movew %a0@(BIR_SIZE),%d0
1548 lea %a0@(BIR_DATA),%a0
1551 lea %a0@(BIR_SIZE),%a0
1553 func_return get_bi_record
1557 * MMU Initialization Begins Here
1559 * The structure of the MMU tables on the 68k machines
1562 * Logical addresses are translated through
1563 * a hierarchical translation mechanism where the high-order
1564 * seven bits of the logical address (LA) are used as an
1565 * index into the "root table." Each entry in the root
1566 * table has a bit which specifies if it's a valid pointer to a
1567 * pointer table. Each entry defines a 32Meg range of memory.
1568 * If an entry is invalid then that logical range of 32M is
1569 * invalid and references to that range of memory (when the MMU
1570 * is enabled) will fault. If the entry is valid, then it does
1571 * one of two things. On 040/060 class machines, it points to
1572 * a pointer table which then describes more finely the memory
1573 * within that 32M range. On 020/030 class machines, a technique
1574 * called "early terminating descriptors" are used. This technique
1575 * allows an entire 32Meg to be described by a single entry in the
1576 * root table. Thus, this entry in the root table, contains the
1577 * physical address of the memory or I/O at the logical address
1578 * which the entry represents and it also contains the necessary
1579 * cache bits for this region.
1582 * Per the Root Table, there will be one or more
1583 * pointer tables. Each pointer table defines a 32M range.
1584 * Not all of the 32M range need be defined. Again, the next
1585 * seven bits of the logical address are used an index into
1586 * the pointer table to point to page tables (if the pointer
1587 * is valid). There will undoubtedly be more than one
1588 * pointer table for the kernel because each pointer table
1589 * defines a range of only 32M. Valid pointer table entries
1590 * point to page tables, or are early terminating entries
1594 * Per the Pointer Tables, each page table entry points
1595 * to the physical page in memory that supports the logical
1596 * address that translates to the particular index.
1598 * In short, the Logical Address gets translated as follows:
1599 * bits 31..26 - index into the Root Table
1600 * bits 25..18 - index into the Pointer Table
1601 * bits 17..12 - index into the Page Table
1602 * bits 11..0 - offset into a particular 4K page
1604 * The algorithms which follow do one thing: they abstract
1605 * the MMU hardware. For example, there are three kinds of
1606 * cache settings that are relevant. Either, memory is
1607 * being mapped in which case it is either Kernel Code (or
1608 * the RamDisk) or it is MMU data. On the 030, the MMU data
1609 * option also describes the kernel. Or, I/O is being mapped
1610 * in which case it has its own kind of cache bits. There
1611 * are constants which abstract these notions from the code that
1612 * actually makes the call to map some range of memory.
1622 * This algorithm will print out the current MMU mappings.
1625 * %a5 points to the root table. Everything else is calculated
1629 #define mmu_next_valid 0
1630 #define mmu_start_logical 4
1631 #define mmu_next_logical 8
1632 #define mmu_start_physical 12
1633 #define mmu_next_physical 16
1635 #define MMU_PRINT_INVALID -1
1636 #define MMU_PRINT_VALID 1
1637 #define MMU_PRINT_UNINITED 0
1639 #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
1641 func_start mmu_print,%a0-%a6/%d0-%d7
1643 movel %pc@(L(kernel_pgdir_ptr)),%a5
1644 lea %pc@(L(mmu_print_data)),%a0
1645 movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
1647 is_not_040_or_060(mmu_030_print)
1656 * The following #if/#endif block is a tight algorithm for dumping the 040
1657 * MMU Map in gory detail. It really isn't that practical unless the
1658 * MMU Map algorithm appears to go awry and you need to debug it at the
1659 * entry per entry level.
1661 movel #ROOT_TABLE_SIZE,%d5
1663 movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
1664 subql #1,%d5 | they (might) work
1674 andil #0xFFFFFE00,%d7
1676 movel #PTR_TABLE_SIZE,%d4
1686 andil #0xFFFFFF00,%d7
1688 movel #PAGE_TABLE_SIZE,%d3
1702 movel #8+1+8+1+1,%d2
1717 #endif /* MMU 040 Dumping code that's gory and detailed */
1719 lea %pc@(kernel_pg_dir),%a5
1720 movel %a5,%a0 /* a0 has the address of the root table ptr */
1721 movel #0x00000000,%a4 /* logical address */
1724 /* Increment the logical address and preserve in d5 */
1726 addil #PAGESIZE<<13,%d5
1730 jbsr mmu_print_tuple_invalidate
1734 andil #0xfffffe00,%d6
1738 addil #PAGESIZE<<6,%d5
1742 jbsr mmu_print_tuple_invalidate
1746 andil #0xffffff00,%d6
1754 jbsr mmu_print_tuple_invalidate
1757 moveml %d0-%d1,%sp@-
1760 andil #0xfffff4e0,%d1
1761 lea %pc@(mmu_040_print_flags),%a6
1762 jbsr mmu_print_tuple
1763 moveml %sp@+,%d0-%d1
1775 movel %d5,%a4 /* move to the next logical address */
1783 andiw #0x8000,%d1 /* is it valid ? */
1784 jbeq 1f /* No, bail out */
1787 andil #0xff000000,%d1 /* Get the address */
1793 jbsr mmu_040_print_flags_tt
1797 andiw #0x8000,%d1 /* is it valid ? */
1798 jbeq 1f /* No, bail out */
1801 andil #0xff000000,%d1 /* Get the address */
1807 jbsr mmu_040_print_flags_tt
1813 mmu_040_print_flags:
1815 putZc(' ','G') /* global bit */
1817 putZc(' ','S') /* supervisor bit */
1818 mmu_040_print_flags_tt:
1823 putZc('w','c') /* write through or copy-back */
1828 putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
1832 mmu_030_print_flags:
1834 putZc('C','I') /* write through or copy-back */
1843 andil #0xfffffff0,%d0
1845 movel #0x00000000,%a4 /* logical address */
1849 addil #PAGESIZE<<13,%d5
1851 btst #1,%d6 /* is it a table ptr? */
1853 btst #0,%d6 /* is it early terminating? */
1855 jbsr mmu_030_print_helper
1858 jbsr mmu_print_tuple_invalidate
1862 andil #0xfffffff0,%d6
1866 addil #PAGESIZE<<6,%d5
1868 btst #1,%d6 /* is it a table ptr? */
1870 btst #0,%d6 /* is it a page descriptor? */
1872 jbsr mmu_030_print_helper
1875 jbsr mmu_print_tuple_invalidate
1879 andil #0xfffffff0,%d6
1887 jbsr mmu_print_tuple_invalidate
1890 jbsr mmu_030_print_helper
1902 movel %d5,%a4 /* move to the next logical address */
1910 func_return mmu_print
1913 mmu_030_print_helper:
1914 moveml %d0-%d1,%sp@-
1917 lea %pc@(mmu_030_print_flags),%a6
1918 jbsr mmu_print_tuple
1919 moveml %sp@+,%d0-%d1
1922 mmu_print_tuple_invalidate:
1923 moveml %a0/%d7,%sp@-
1925 lea %pc@(L(mmu_print_data)),%a0
1926 tstl %a0@(mmu_next_valid)
1927 jbmi mmu_print_tuple_invalidate_exit
1929 movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
1935 mmu_print_tuple_invalidate_exit:
1936 moveml %sp@+,%a0/%d7
1941 moveml %d0-%d7/%a0,%sp@-
1943 lea %pc@(L(mmu_print_data)),%a0
1945 tstl %a0@(mmu_next_valid)
1946 jble mmu_print_tuple_print
1948 cmpl %a0@(mmu_next_physical),%d1
1949 jbeq mmu_print_tuple_increment
1951 mmu_print_tuple_print:
1959 mmu_print_tuple_record:
1960 movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
1962 movel %d1,%a0@(mmu_next_physical)
1964 mmu_print_tuple_increment:
1967 addl %d7,%a0@(mmu_next_physical)
1969 mmu_print_tuple_exit:
1970 moveml %sp@+,%d0-%d7/%a0
1973 mmu_print_machine_cpu_types:
1995 is_not_040_or_060(2f)
2003 #endif /* MMU_PRINT */
2008 * This is a specific function which works on all 680x0 machines.
2009 * On 030, 040 & 060 it will attempt to use Transparent Translation
2011 * On 020 it will call the standard mmu_map which will use early
2012 * terminating descriptors.
2014 func_start mmu_map_tt,%d0/%d1/%a0,4
2025 /* Extract the highest bit set
2027 bfffo ARG3{#0,#32},%d1
2043 /* Generate the upper 16bit of the tt register
2049 is_040_or_060(L(mmu_map_tt_040))
2051 /* set 030 specific bits (read/write access for supervisor mode
2052 * (highest function code set, lower two bits masked))
2054 orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
2070 jra L(mmu_map_tt_done)
2072 /* set 040 specific bits
2075 orw #TTR_ENABLE+TTR_KERNELMODE,%d1
2089 jra L(mmu_map_tt_done)
2092 mmu_map_eq ARG2,ARG3,ARG4
2096 func_return mmu_map_tt
2101 * This routine will map a range of memory using a pointer
2102 * table and allocate the pages on the fly from the kernel.
2103 * The pointer table does not have to be already linked into
2104 * the root table, this routine will do that if necessary.
2107 * This routine will assert failure and use the serial_putc
2108 * routines in the case of a run-time error. For example,
2109 * if the address is already mapped.
2112 * This routine will use early terminating descriptors
2113 * where possible for the 68020+68851 and 68030 type
2116 func_start mmu_map,%d0-%d4/%a0-%a4
2125 /* Get logical address and round it down to 256KB
2128 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2131 /* Get the end address
2137 /* Get physical address and round it down to 256KB
2140 andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
2143 /* Add page attributes to the physical address
2146 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2153 is_not_040_or_060(L(mmu_map_030))
2155 addw #_PAGE_GLOBAL040,%a2
2157 * MMU 040 & 060 Support
2159 * The MMU usage for the 040 and 060 is different enough from
2160 * the 030 and 68851 that there is separate code. This comment
2161 * block describes the data structures and algorithms built by
2164 * The 040 does not support early terminating descriptors, as
2165 * the 030 does. Therefore, a third level of table is needed
2166 * for the 040, and that would be the page table. In Linux,
2167 * page tables are allocated directly from the memory above the
2173 /* Calculate the offset into the root table
2176 moveq #ROOT_INDEX_SHIFT,%d1
2178 mmu_get_root_table_entry %d0
2180 /* Calculate the offset into the pointer table
2183 moveq #PTR_INDEX_SHIFT,%d1
2185 andl #PTR_TABLE_SIZE-1,%d0
2186 mmu_get_ptr_table_entry %a0,%d0
2188 /* Calculate the offset into the page table
2191 moveq #PAGE_INDEX_SHIFT,%d1
2193 andl #PAGE_TABLE_SIZE-1,%d0
2194 mmu_get_page_table_entry %a0,%d0
2196 /* The page table entry must not no be busy
2199 jne L(mmu_map_error)
2201 /* Do the mapping and advance the pointers
2208 /* Ready with mapping?
2216 /* Calculate the offset into the root table
2219 moveq #ROOT_INDEX_SHIFT,%d1
2221 mmu_get_root_table_entry %d0
2223 /* Check if logical address 32MB aligned,
2224 * so we can try to map it once
2227 andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
2230 /* Is there enough to map for 32MB at once
2232 lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
2238 /* The root table entry must not no be busy
2241 jne L(mmu_map_error)
2243 /* Do the mapping and advance the pointers
2253 lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
2254 jra L(mmu_mapnext_030)
2256 /* Calculate the offset into the pointer table
2259 moveq #PTR_INDEX_SHIFT,%d1
2261 andl #PTR_TABLE_SIZE-1,%d0
2262 mmu_get_ptr_table_entry %a0,%d0
2264 /* The pointer table entry must not no be busy
2267 jne L(mmu_map_error)
2269 /* Do the mapping and advance the pointers
2277 addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
2278 addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
2281 /* Ready with mapping?
2290 dputs "mmu_map error:"
2302 * On the 040 class machines, all pages that are used for the
2303 * mmu have to be fixed up.
2306 func_start mmu_fixup_page_mmu_cache,%d0/%a0
2308 dputs "mmu_fixup_page_mmu_cache"
2311 /* Calculate the offset into the root table
2314 moveq #ROOT_INDEX_SHIFT,%d1
2316 mmu_get_root_table_entry %d0
2318 /* Calculate the offset into the pointer table
2321 moveq #PTR_INDEX_SHIFT,%d1
2323 andl #PTR_TABLE_SIZE-1,%d0
2324 mmu_get_ptr_table_entry %a0,%d0
2326 /* Calculate the offset into the page table
2329 moveq #PAGE_INDEX_SHIFT,%d1
2331 andl #PAGE_TABLE_SIZE-1,%d0
2332 mmu_get_page_table_entry %a0,%d0
2335 andil #_CACHEMASK040,%d0
2336 orl %pc@(m68k_pgtable_cachemode),%d0
2341 func_return mmu_fixup_page_mmu_cache
2346 * create a temporary mapping to enable the mmu,
2347 * this we don't need any transparation translation tricks.
2350 func_start mmu_temp_map,%d0/%d1/%a0/%a1
2352 dputs "mmu_temp_map"
2357 lea %pc@(L(temp_mmap_mem)),%a1
2359 /* Calculate the offset in the root table
2362 moveq #ROOT_INDEX_SHIFT,%d1
2364 mmu_get_root_table_entry %d0
2366 /* Check if the table is temporary allocated, so we have to reuse it
2369 cmpl %pc@(L(memory_start)),%d0
2372 /* Temporary allocate a ptr table and insert it into the root table
2375 addl #PTR_TABLE_SIZE*4,%a1@
2376 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2381 /* Mask the root table entry for the ptr table
2383 andw #-ROOT_TABLE_SIZE,%d0
2386 /* Calculate the offset into the pointer table
2389 moveq #PTR_INDEX_SHIFT,%d1
2391 andl #PTR_TABLE_SIZE-1,%d0
2395 /* Check if a temporary page table is already allocated
2400 /* Temporary allocate a page table and insert it into the ptr table
2403 /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
2404 alignment restriction for pointer tables on the '0[46]0. */
2406 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2411 /* Mask the ptr table entry for the page table
2413 andw #-PTR_TABLE_SIZE,%d0
2416 /* Calculate the offset into the page table
2419 moveq #PAGE_INDEX_SHIFT,%d1
2421 andl #PAGE_TABLE_SIZE-1,%d0
2425 /* Insert the address into the page table
2429 orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
2435 func_return mmu_temp_map
2437 func_start mmu_engage,%d0-%d2/%a0-%a3
2439 moveq #ROOT_TABLE_SIZE-1,%d0
2440 /* Temporarily use a different root table. */
2441 lea %pc@(L(kernel_pgdir_ptr)),%a0
2443 movel %pc@(L(memory_start)),%a1
2450 lea %pc@(L(temp_mmap_mem)),%a0
2453 movew #PAGESIZE-1,%d0
2460 /* Skip temp mappings if phys == virt */
2464 mmu_temp_map %a0,%a0
2465 mmu_temp_map %a0,%a1
2469 mmu_temp_map %a0,%a0
2470 mmu_temp_map %a0,%a1
2472 movel %pc@(L(memory_start)),%a3
2473 movel %pc@(L(phys_kernel_start)),%d2
2475 is_not_040_or_060(L(mmu_engage_030))
2485 movel #TC_ENABLE+TC_PAGE4K,%d0
2486 movec %d0,%tc /* enable the MMU */
2495 jra L(mmu_engage_cleanup)
2497 L(mmu_engage_030_temp):
2501 lea %pc@(L(mmu_engage_030_temp)),%a0
2502 movel #0x80000002,%a0@
2509 * enable,super root enable,4096 byte pages,7 bit root index,
2510 * 7 bit pointer index, 6 bit page table index.
2512 movel #0x82c07760,%a0@(8)
2513 pmove %a0@(8),%tc /* enable the MMU */
2515 1: movel %a2,%a0@(4)
2522 L(mmu_engage_cleanup):
2523 subl #PAGE_OFFSET,%d2
2525 movel %a2,L(kernel_pgdir_ptr)
2530 func_return mmu_engage
2532 func_start mmu_get_root_table_entry,%d0/%a1
2535 dputs "mmu_get_root_table_entry:"
2540 movel %pc@(L(kernel_pgdir_ptr)),%a0
2546 /* Find the start of free memory, get_bi_record does this for us,
2547 * as the bootinfo structure is located directly behind the kernel
2548 * we simply search for the last entry.
2550 get_bi_record BI_LAST
2551 addw #PAGESIZE-1,%a0
2557 lea %pc@(L(memory_start)),%a0
2559 lea %pc@(L(kernel_end)),%a0
2562 /* we have to return the first page at _stext since the init code
2563 * in mm/init.c simply expects kernel_pg_dir there, the rest of
2564 * page is used for further ptr tables in get_ptr_table.
2566 lea %pc@(_stext),%a0
2567 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2569 addl #ROOT_TABLE_SIZE*4,%a1@
2571 lea %pc@(L(mmu_num_pointer_tables)),%a1
2577 movew #PAGESIZE/4-1,%d0
2582 lea %pc@(L(kernel_pgdir_ptr)),%a1
2596 func_return mmu_get_root_table_entry
2600 func_start mmu_get_ptr_table_entry,%d0/%a1
2603 dputs "mmu_get_ptr_table_entry:"
2613 /* Keep track of the number of pointer tables we use
2615 dputs "\nmmu_get_new_ptr_table:"
2616 lea %pc@(L(mmu_num_pointer_tables)),%a0
2620 /* See if there is a free pointer table in our cache of pointer tables
2622 lea %pc@(L(mmu_cached_pointer_tables)),%a1
2626 /* Get a new pointer table page from above the kernel memory
2631 /* There is an unused pointer table in our cache... use it
2634 addl #PTR_TABLE_SIZE*4,%a1@
2639 /* Insert the new pointer table into the root table
2642 orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
2645 /* Extract the pointer table entry
2647 andw #-PTR_TABLE_SIZE,%d0
2657 func_return mmu_get_ptr_table_entry
2660 func_start mmu_get_page_table_entry,%d0/%a1
2663 dputs "mmu_get_page_table_entry:"
2673 /* If the page table entry doesn't exist, we allocate a complete new
2674 * page and use it as one continuous big page table which can cover
2675 * 4MB of memory, nearly almost all mappings have that alignment.
2678 addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
2680 /* align pointer table entry for a page of page tables
2683 andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
2686 /* Insert the page tables into the pointer entries
2688 moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
2691 lea %a0@(PAGE_TABLE_SIZE*4),%a0
2694 /* Now we can get the initialized pointer table entry
2699 /* Extract the page table entry
2701 andw #-PAGE_TABLE_SIZE,%d0
2711 func_return mmu_get_page_table_entry
2716 * Return a new page from the memory start and clear it.
2718 func_start get_new_page,%d0/%a1
2720 dputs "\nget_new_page:"
2722 /* allocate the page and adjust memory_start
2724 lea %pc@(L(memory_start)),%a0
2728 /* clear the new page
2731 movew #PAGESIZE/4-1,%d0
2739 func_return get_new_page
2744 * Debug output support
2745 * Atarians have a choice between the parallel port, the serial port
2746 * from the MFP or a serial port of the SCC
2750 /* You may define either or both of these. */
2751 #define MAC_USE_SCC_A /* Modem port */
2752 #define MAC_USE_SCC_B /* Printer port */
2754 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
2755 /* Initialisation table for SCC with 3.6864 MHz PCLK */
2756 L(scc_initable_mac):
2757 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2758 .byte 3,0xc0 /* receiver: 8 bpc */
2759 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2760 .byte 10,0 /* NRZ */
2761 .byte 11,0x50 /* use baud rate generator */
2762 .byte 12,1,13,0 /* 38400 baud */
2763 .byte 14,1 /* Baud rate generator enable */
2764 .byte 3,0xc1 /* enable receiver */
2765 .byte 5,0xea /* enable transmitter */
2769 #endif /* CONFIG_MAC */
2772 /* #define USE_PRINTER */
2773 /* #define USE_SCC_B */
2774 /* #define USE_SCC_A */
2777 #if defined(USE_SCC_A) || defined(USE_SCC_B)
2778 /* Initialisation table for SCC with 7.9872 MHz PCLK */
2779 /* PCLK == 8.0539 gives baud == 9680.1 */
2780 L(scc_initable_atari):
2781 .byte 4,0x44 /* x16, 1 stopbit, no parity */
2782 .byte 3,0xc0 /* receiver: 8 bpc */
2783 .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
2784 .byte 10,0 /* NRZ */
2785 .byte 11,0x50 /* use baud rate generator */
2786 .byte 12,24,13,0 /* 9600 baud */
2787 .byte 14,2,14,3 /* use master clock for BRG, enable */
2788 .byte 3,0xc1 /* enable receiver */
2789 .byte 5,0xea /* enable transmitter */
2796 LPSG_SELECT = 0xff8800
2797 LPSG_READ = 0xff8800
2798 LPSG_WRITE = 0xff8802
2802 LSTMFP_GPIP = 0xfffa01
2803 LSTMFP_DDR = 0xfffa05
2804 LSTMFP_IERB = 0xfffa09
2806 #elif defined(USE_SCC_B)
2808 LSCC_CTRL = 0xff8c85
2809 LSCC_DATA = 0xff8c87
2811 #elif defined(USE_SCC_A)
2813 LSCC_CTRL = 0xff8c81
2814 LSCC_DATA = 0xff8c83
2816 #elif defined(USE_MFP)
2819 LMFP_TDCDR = 0xfffa1d
2820 LMFP_TDDR = 0xfffa25
2825 #endif /* CONFIG_ATARI */
2828 * Serial port output support.
2832 * Initialize serial port hardware
2834 func_start serial_init,%d0/%d1/%a0/%a1
2836 * Some of the register usage that follows
2838 * a0 = pointer to boot info record
2839 * d0 = boot info offset
2841 * a0 = address of SCC
2842 * a1 = Liobase address/address of scc_initable_atari
2843 * d0 = init data for serial port
2845 * a0 = address of SCC
2846 * a1 = address of scc_initable_mac
2847 * d0 = init data for serial port
2851 #define SERIAL_DTR 7
2852 #define SERIAL_CNTRL CIABBASE+C_PRA
2855 lea %pc@(L(custom)),%a0
2856 movel #-ZTWOBASE,%a0@
2857 bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
2858 get_bi_record BI_AMIGA_SERPER
2859 movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
2860 | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
2866 movel %pc@(L(iobase)),%a1
2867 #if defined(USE_PRINTER)
2868 bclr #0,%a1@(LSTMFP_IERB)
2869 bclr #0,%a1@(LSTMFP_DDR)
2870 moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
2871 moveb #0xff,%a1@(LPSG_WRITE)
2872 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
2873 clrb %a1@(LPSG_WRITE)
2874 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
2875 moveb %a1@(LPSG_READ),%d0
2877 moveb %d0,%a1@(LPSG_WRITE)
2878 #elif defined(USE_SCC_A) || defined(USE_SCC_B)
2879 lea %a1@(LSCC_CTRL),%a0
2880 /* Reset SCC register pointer */
2882 /* Reset SCC device: write register pointer then register value */
2885 /* Wait for 5 PCLK cycles, which is about 63 CPU cycles */
2886 /* 5 / 7.9872 MHz = approx. 0.63 us = 63 / 100 MHz */
2891 /* Initialize channel */
2892 lea %pc@(L(scc_initable_atari)),%a1
2899 #elif defined(USE_MFP)
2900 bclr #1,%a1@(LMFP_TSR)
2901 moveb #0x88,%a1@(LMFP_UCR)
2902 andb #0x70,%a1@(LMFP_TDCDR)
2903 moveb #2,%a1@(LMFP_TDDR)
2904 orb #1,%a1@(LMFP_TDCDR)
2905 bset #1,%a1@(LMFP_TSR)
2907 jra L(serial_init_done)
2912 is_not_mac(L(serial_init_not_mac))
2913 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
2914 #define mac_scc_cha_b_ctrl_offset 0x0
2915 #define mac_scc_cha_a_ctrl_offset 0x2
2916 #define mac_scc_cha_b_data_offset 0x4
2917 #define mac_scc_cha_a_data_offset 0x6
2918 movel %pc@(L(mac_sccbase)),%a0
2919 /* Reset SCC register pointer */
2920 moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0
2921 /* Reset SCC device: write register pointer then register value */
2922 moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
2923 moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
2924 /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
2925 /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
2931 #ifdef MAC_USE_SCC_A
2932 /* Initialize channel A */
2933 lea %pc@(L(scc_initable_mac)),%a1
2936 moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
2937 moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
2940 #endif /* MAC_USE_SCC_A */
2941 #ifdef MAC_USE_SCC_B
2942 /* Initialize channel B */
2943 lea %pc@(L(scc_initable_mac)),%a1
2946 moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
2947 moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
2950 #endif /* MAC_USE_SCC_B */
2951 jra L(serial_init_done)
2952 L(serial_init_not_mac):
2953 #endif /* CONFIG_MAC */
2957 /* debug output goes into SRAM, so we don't do it unless requested
2958 - check for '%LX$' signature in SRAM */
2959 lea %pc@(q40_mem_cptr),%a1
2960 move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
2961 move.l #0xff020000,%a1
2974 lea %pc@(L(q40_do_debug)),%a1
2976 /*nodbg: q40_do_debug is 0 by default*/
2980 #ifdef CONFIG_MVME16x
2981 is_not_mvme16x(L(serial_init_not_mvme16x))
2982 moveb #0x10,M167_PCSCCMICR
2983 moveb #0x10,M167_PCSCCTICR
2984 moveb #0x10,M167_PCSCCRICR
2985 jra L(serial_init_done)
2986 L(serial_init_not_mvme16x):
2989 #ifdef CONFIG_APOLLO
2990 /* We count on the PROM initializing SIO1 */
2994 /* We count on the boot loader initialising the UART */
2997 L(serial_init_done):
2998 func_return serial_init
3001 * Output character on serial port.
3003 func_start serial_putc,%d0/%d1/%a0/%a1
3009 /* A little safe recursion is good for the soul */
3017 movel %pc@(L(custom)),%a0
3018 movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
3019 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
3022 jra L(serial_putc_done)
3028 #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
3029 movel %pc@(L(mac_sccbase)),%a1
3031 #ifdef MAC_USE_SCC_A
3032 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
3034 moveb %d0,%a1@(mac_scc_cha_a_data_offset)
3035 #endif /* MAC_USE_SCC_A */
3036 #ifdef MAC_USE_SCC_B
3037 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
3039 moveb %d0,%a1@(mac_scc_cha_b_data_offset)
3040 #endif /* MAC_USE_SCC_B */
3041 jra L(serial_putc_done)
3043 #endif /* CONFIG_MAC */
3047 movel %pc@(L(iobase)),%a1
3048 #if defined(USE_PRINTER)
3049 3: btst #0,%a1@(LSTMFP_GPIP)
3051 moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
3052 moveb %d0,%a1@(LPSG_WRITE)
3053 moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
3054 moveb %a1@(LPSG_READ),%d0
3056 moveb %d0,%a1@(LPSG_WRITE)
3060 moveb %d0,%a1@(LPSG_WRITE)
3061 #elif defined(USE_SCC_A) || defined(USE_SCC_B)
3062 3: btst #2,%a1@(LSCC_CTRL)
3064 moveb %d0,%a1@(LSCC_DATA)
3065 #elif defined(USE_MFP)
3066 3: btst #7,%a1@(LMFP_TSR)
3068 moveb %d0,%a1@(LMFP_UDR)
3070 jra L(serial_putc_done)
3072 #endif /* CONFIG_ATARI */
3074 #ifdef CONFIG_MVME147
3076 1: btst #2,M147_SCC_CTRL_A
3078 moveb %d0,M147_SCC_DATA_A
3079 jbra L(serial_putc_done)
3083 #ifdef CONFIG_MVME16x
3086 * If the loader gave us a board type then we can use that to
3087 * select an appropriate output routine; otherwise we just use
3088 * the Bug code. If we have to use the Bug that means the Bug
3089 * workspace has to be valid, which means the Bug has to use
3090 * the SRAM, which is non-standard.
3092 moveml %d0-%d7/%a2-%a6,%sp@-
3093 movel vme_brdtype,%d1
3094 jeq 1f | No tag - use the Bug
3095 cmpi #VME_TYPE_MVME162,%d1
3097 cmpi #VME_TYPE_MVME172,%d1
3099 /* 162/172; it's an SCC */
3100 6: btst #2,M162_SCC_CTRL_A
3105 moveb #8,M162_SCC_CTRL_A
3109 moveb %d0,M162_SCC_CTRL_A
3112 /* 166/167/177; it's a CD2401 */
3114 moveb M167_CYIER,%d2
3115 moveb #0x02,M167_CYIER
3117 btst #5,M167_PCSCCTICR
3119 moveb M167_PCTPIACKR,%d1
3120 moveb M167_CYLICR,%d1
3122 moveb #0x08,M167_CYTEOIR
3125 moveb %d0,M167_CYTDR
3126 moveb #0,M167_CYTEOIR
3127 moveb %d2,M167_CYIER
3132 .word 0x0020 /* TRAP 0x020 */
3134 moveml %sp@+,%d0-%d7/%a2-%a6
3135 jbra L(serial_putc_done)
3137 #endif /* CONFIG_MVME16x */
3139 #ifdef CONFIG_BVME6000
3142 * The BVME6000 machine has a serial port ...
3144 1: btst #2,BVME_SCC_CTRL_A
3146 moveb %d0,BVME_SCC_DATA_A
3147 jbra L(serial_putc_done)
3154 movel 0xFEFE0018,%a1
3157 jbra L(serial_putc_done)
3163 tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
3165 lea %pc@(q40_mem_cptr),%a1
3170 jbra L(serial_putc_done)
3174 #ifdef CONFIG_APOLLO
3176 movl %pc@(L(iobase)),%a1
3177 moveb %d0,%a1@(LTHRB0)
3178 1: moveb %a1@(LSRB0),%d0
3181 jbra L(serial_putc_done)
3187 movl %pc@(L(iobase)),%a1
3188 addl %pc@(L(uartbase)),%a1
3189 movel %pc@(L(uart_scode)),%d1 /* Check the scode */
3190 jmi 3f /* Unset? Exit */
3191 cmpi #256,%d1 /* APCI scode? */
3193 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
3196 moveb %d0,%a1@(DCADATA)
3197 jbra L(serial_putc_done)
3198 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
3201 moveb %d0,%a1@(APCIDATA)
3202 jbra L(serial_putc_done)
3209 movel L(virt_gf_tty_base),%a1
3210 movel %d0,%a1@(GF_PUT_CHAR)
3214 L(serial_putc_done):
3215 func_return serial_putc
3220 func_start puts,%d0/%a0
3225 #ifdef CONSOLE_DEBUG
3237 * Output number in hex notation.
3240 func_start putn,%d0-%d2
3252 addb #'A'-('9'+1),%d2
3254 #ifdef CONSOLE_DEBUG
3264 #ifdef CONFIG_EARLY_PRINTK
3266 * This routine takes its parameters on the stack. It then
3267 * turns around and calls the internal routines. This routine
3268 * is used by the boot console.
3270 * The calling parameters are:
3271 * void debug_cons_nputs(const char *str, unsigned length)
3273 * This routine does NOT understand variable arguments only
3276 ENTRY(debug_cons_nputs)
3277 moveml %d0/%d1/%a0,%sp@-
3280 movel %sp@(18),%a0 /* fetch parameter */
3281 movel %sp@(22),%d1 /* fetch parameter */
3284 #ifdef CONSOLE_DEBUG
3296 moveml %sp@+,%d0/%d1/%a0
3298 #endif /* CONFIG_EARLY_PRINTK */
3300 #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3301 func_start set_leds,%d0/%a0
3305 movel %pc@(L(iobase)),%a0
3306 moveb %d0,%a0@(0x1ffff)
3310 #ifdef CONFIG_APOLLO
3311 movel %pc@(L(iobase)),%a0
3314 moveb %d0,%a0@(LCPUCTRL)
3317 func_return set_leds
3320 #ifdef CONSOLE_DEBUG
3322 * For continuity, see the data alignment
3323 * to which this structure is tied.
3325 #define Lconsole_struct_cur_column 0
3326 #define Lconsole_struct_cur_row 4
3327 #define Lconsole_struct_num_columns 8
3328 #define Lconsole_struct_num_rows 12
3329 #define Lconsole_struct_left_edge 16
3331 func_start console_init,%a0-%a4/%d0-%d7
3333 * Some of the register usage that follows
3334 * a0 = pointer to boot_info
3335 * a1 = pointer to screen
3336 * a2 = pointer to console_globals
3337 * d3 = pixel width of screen
3338 * d4 = pixel height of screen
3339 * (d3,d4) ~= (x,y) of a point just below
3340 * and to the right of the screen
3341 * NOT on the screen!
3342 * d5 = number of bytes per scan line
3343 * d6 = number of bytes on the entire screen
3346 lea %pc@(L(console_globals)),%a2
3347 movel %pc@(L(mac_videobase)),%a1
3348 movel %pc@(L(mac_rowbytes)),%d5
3349 movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
3351 swap %d4 /* -> high byte */
3352 andl #0xffff,%d3 /* d3 = screen width in pixels */
3353 andl #0xffff,%d4 /* d4 = screen height in pixels */
3357 mulul %d4,%d6 /* scan line bytes x num scan lines */
3358 divul #8,%d6 /* we'll clear 8 bytes at a time */
3359 moveq #-1,%d0 /* Mac_black */
3362 L(console_clear_loop):
3365 dbra %d6,L(console_clear_loop)
3367 /* Calculate font size */
3369 #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
3370 lea %pc@(font_vga_8x8),%a0
3371 #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
3372 lea %pc@(font_vga_8x16),%a0
3373 #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
3374 lea %pc@(font_vga_6x11),%a0
3375 #elif defined(CONFIG_FONT_8x8) /* default */
3376 lea %pc@(font_vga_8x8),%a0
3377 #else /* no compiled-in font */
3382 * At this point we make a shift in register usage
3383 * a1 = address of console_font pointer
3385 lea %pc@(L(console_font)),%a1
3386 movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
3389 lea %pc@(L(console_font_data)),%a4
3390 movel %a0@(FONT_DESC_DATA),%d0
3391 subl #L(console_font),%a1
3396 * Calculate global maxs
3397 * Note - we can use either an
3398 * 8 x 16 or 8 x 8 character font
3399 * 6 x 11 also supported
3401 /* ASSERT: a0 = contents of Lconsole_font */
3402 movel %d3,%d0 /* screen width in pixels */
3403 divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
3405 movel %d4,%d1 /* screen height in pixels */
3406 divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
3408 movel %d0,%a2@(Lconsole_struct_num_columns)
3409 movel %d1,%a2@(Lconsole_struct_num_rows)
3412 * Clear the current row and column
3414 clrl %a2@(Lconsole_struct_cur_column)
3415 clrl %a2@(Lconsole_struct_cur_row)
3416 clrl %a2@(Lconsole_struct_left_edge)
3419 * Initialization is complete
3422 func_return console_init
3425 func_start console_put_penguin,%a0-%a1/%d0-%d7
3427 * Get 'that_penguin' onto the screen in the upper right corner
3428 * penguin is 64 x 74 pixels, align against right edge of screen
3430 lea %pc@(L(mac_dimensions)),%a0
3433 subil #64,%d0 /* snug up against the right edge */
3434 clrl %d1 /* start at the top */
3436 lea %pc@(L(that_penguin)),%a1
3437 L(console_penguin_row):
3439 L(console_penguin_pixel_pair):
3442 console_plot_pixel %d0,%d1,%d2
3445 console_plot_pixel %d0,%d1,%d2
3447 dbra %d6,L(console_penguin_pixel_pair)
3451 dbra %d7,L(console_penguin_row)
3453 func_return console_put_penguin
3455 /* include penguin bitmap */
3457 #include "../mac/mac_penguin.S"
3461 * Calculate source and destination addresses
3466 func_start console_scroll,%a0-%a4/%d0-%d7
3467 lea %pc@(L(mac_videobase)),%a0
3470 lea %pc@(L(mac_rowbytes)),%a0
3472 movel %pc@(L(console_font)),%a0
3475 mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
3481 lea %pc@(L(mac_dimensions)),%a0
3485 andl #0xffff,%d3 /* d3 = screen width in pixels */
3486 andl #0xffff,%d4 /* d4 = screen height in pixels */
3489 * Calculate number of bytes to move
3491 lea %pc@(L(mac_rowbytes)),%a0
3493 movel %pc@(L(console_font)),%a0
3494 subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
3495 mulul %d4,%d6 /* scan line bytes x num scan lines */
3496 divul #32,%d6 /* we'll move 8 longs at a time */
3499 L(console_scroll_loop):
3508 dbra %d6,L(console_scroll_loop)
3510 lea %pc@(L(mac_rowbytes)),%a0
3512 movel %pc@(L(console_font)),%a0
3513 mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
3514 divul #32,%d6 /* we'll move 8 words at a time */
3518 L(console_scroll_clear_loop):
3527 dbra %d6,L(console_scroll_clear_loop)
3530 func_return console_scroll
3533 func_start console_putc,%a0/%a1/%d0-%d7
3535 is_not_mac(L(console_exit))
3536 tstl %pc@(L(console_font))
3539 /* Output character in d7 on console.
3545 /* A little safe recursion is good for the soul */
3548 lea %pc@(L(console_globals)),%a0
3551 jne L(console_not_lf)
3552 movel %a0@(Lconsole_struct_cur_row),%d0
3554 movel %d0,%a0@(Lconsole_struct_cur_row)
3555 movel %a0@(Lconsole_struct_num_rows),%d1
3559 movel %d0,%a0@(Lconsole_struct_cur_row)
3566 jne L(console_not_cr)
3567 clrl %a0@(Lconsole_struct_cur_column)
3572 jne L(console_not_home)
3573 clrl %a0@(Lconsole_struct_cur_row)
3574 clrl %a0@(Lconsole_struct_cur_column)
3578 * At this point we know that the %d7 character is going to be
3579 * rendered on the screen. Register usage is -
3580 * a0 = pointer to console globals
3582 * d0 = cursor column
3583 * d1 = cursor row to draw the character
3584 * d7 = character number
3586 L(console_not_home):
3587 movel %a0@(Lconsole_struct_cur_column),%d0
3588 addql #1,%a0@(Lconsole_struct_cur_column)
3589 movel %a0@(Lconsole_struct_num_columns),%d1
3592 console_putc #'\n' /* recursion is OK! */
3594 movel %a0@(Lconsole_struct_cur_row),%d1
3597 * At this point we make a shift in register usage
3598 * a0 = address of pointer to font data (fbcon_font_desc)
3600 movel %pc@(L(console_font)),%a0
3601 movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
3602 andl #0x000000ff,%d7
3603 /* ASSERT: a0 = contents of Lconsole_font */
3604 mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
3605 addl %d7,%a1 /* a1 = points to char image */
3608 * At this point we make a shift in register usage
3609 * d0 = pixel coordinate, x
3610 * d1 = pixel coordinate, y
3611 * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
3612 * d3 = font scan line data (8 pixels)
3613 * d6 = count down for the font's pixel width (8)
3614 * d7 = count down for the font's pixel count in height
3616 /* ASSERT: a0 = contents of Lconsole_font */
3617 mulul %a0@(FONT_DESC_WIDTH),%d0
3618 mulul %a0@(FONT_DESC_HEIGHT),%d1
3619 movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
3621 L(console_read_char_scanline):
3624 /* ASSERT: a0 = contents of Lconsole_font */
3625 movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
3628 L(console_do_font_scanline):
3630 scsb %d2 /* convert 1 bit into a byte */
3631 console_plot_pixel %d0,%d1,%d2
3633 dbra %d6,L(console_do_font_scanline)
3635 /* ASSERT: a0 = contents of Lconsole_font */
3636 subl %a0@(FONT_DESC_WIDTH),%d0
3638 dbra %d7,L(console_read_char_scanline)
3641 func_return console_putc
3647 * d2 = (bit 0) 1/0 for white/black (!)
3648 * All registers are preserved
3650 func_start console_plot_pixel,%a0-%a1/%d0-%d4
3652 movel %pc@(L(mac_videobase)),%a1
3653 movel %pc@(L(mac_videodepth)),%d3
3656 mulul %pc@(L(mac_rowbytes)),%d1
3661 * d0 = x coord becomes byte offset into frame buffer
3663 * d2 = black or white (0/1)
3665 * d4 = temp of x (d0) for many bit depths
3670 movel %d0,%d4 /* we need the low order 3 bits! */
3675 eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
3679 jbra L(console_plot_pixel_exit)
3682 jbra L(console_plot_pixel_exit)
3687 movel %d0,%d4 /* we need the low order 2 bits! */
3692 eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
3699 jbra L(console_plot_pixel_exit)
3704 jbra L(console_plot_pixel_exit)
3709 movel %d0,%d4 /* we need the low order bit! */
3725 jbra L(console_plot_pixel_exit)
3734 jbra L(console_plot_pixel_exit)
3744 jbra L(console_plot_pixel_exit)
3747 jbra L(console_plot_pixel_exit)
3751 jbne L(console_plot_pixel_exit)
3758 jbra L(console_plot_pixel_exit)
3761 jbra L(console_plot_pixel_exit)
3763 L(console_plot_pixel_exit):
3764 func_return console_plot_pixel
3765 #endif /* CONSOLE_DEBUG */
3771 m68k_init_mapped_size:
3774 #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
3775 defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
3781 #ifdef CONSOLE_DEBUG
3783 .long 0 /* cursor column */
3784 .long 0 /* cursor row */
3785 .long 0 /* max num columns */
3786 .long 0 /* max num rows */
3787 .long 0 /* left edge */
3789 .long 0 /* pointer to console font (struct font_desc) */
3790 L(console_font_data):
3791 .long 0 /* pointer to console font data */
3792 #endif /* CONSOLE_DEBUG */
3794 #if defined(MMU_PRINT)
3796 .long 0 /* valid flag */
3797 .long 0 /* start logical */
3798 .long 0 /* next logical */
3799 .long 0 /* start physical */
3800 .long 0 /* next physical */
3801 #endif /* MMU_PRINT */
3805 L(mmu_cached_pointer_tables):
3807 L(mmu_num_pointer_tables):
3809 L(phys_kernel_start):
3815 L(kernel_pgdir_ptr):
3820 #if defined (CONFIG_MVME147)
3821 M147_SCC_CTRL_A = 0xfffe3002
3822 M147_SCC_DATA_A = 0xfffe3003
3825 #if defined (CONFIG_MVME16x)
3826 M162_SCC_CTRL_A = 0xfff45005
3827 M167_CYCAR = 0xfff450ee
3828 M167_CYIER = 0xfff45011
3829 M167_CYLICR = 0xfff45026
3830 M167_CYTEOIR = 0xfff45085
3831 M167_CYTDR = 0xfff450f8
3832 M167_PCSCCMICR = 0xfff4201d
3833 M167_PCSCCTICR = 0xfff4201e
3834 M167_PCSCCRICR = 0xfff4201f
3835 M167_PCTPIACKR = 0xfff42025
3838 #if defined (CONFIG_BVME6000)
3839 BVME_SCC_CTRL_A = 0xffb0000b
3840 BVME_SCC_DATA_A = 0xffb0000f
3843 #if defined(CONFIG_MAC)
3854 #endif /* CONFIG_MAC */
3856 #if defined (CONFIG_APOLLO)
3862 #if defined(CONFIG_HP300)
3879 m68k_pgtable_cachemode:
3881 m68k_supervisor_cachemode:
3883 #if defined(CONFIG_MVME16x)
3885 .long 0,0,0,0,0,0,0,0
3887 #if defined(CONFIG_Q40)
3894 #if defined(CONFIG_VIRT)
3896 L(virt_gf_tty_base):
3898 #endif /* CONFIG_VIRT */