1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007, 2012 Freescale Semiconductor, Inc.
4 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
11 #include <asm/timer.h>
12 #include <asm/immap.h>
15 DECLARE_GLOBAL_DATA_PTR;
17 static ulong timestamp;
19 #if defined(CONFIG_SLTTMR)
20 #ifndef CONFIG_SYS_UDELAY_BASE
21 # error "uDelay base not defined!"
24 #if !defined(CONFIG_SYS_TMR_BASE) || !defined(CONFIG_SYS_INTR_BASE) || !defined(CONFIG_SYS_TMRINTR_NO) || !defined(CONFIG_SYS_TMRINTR_MASK)
25 # error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
27 extern void dtimer_intr_setup(void);
29 void __udelay(unsigned long usec)
31 slt_t *timerp = (slt_t *) (CONFIG_SYS_UDELAY_BASE);
35 freq = CONFIG_SYS_TIMER_PRESCALER;
38 out_be32(&timerp->cr, 0);
39 out_be32(&timerp->tcnt, usec * freq);
40 out_be32(&timerp->cr, SLT_CR_TEN);
42 now = in_be32(&timerp->cnt);
44 now = in_be32(&timerp->cnt);
46 setbits_be32(&timerp->sr, SLT_SR_ST);
47 out_be32(&timerp->cr, 0);
50 void dtimer_interrupt(void *not_used)
52 slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
54 /* check for timer interrupt asserted */
55 if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) {
56 setbits_be32(&timerp->sr, SLT_SR_ST);
64 slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);
69 out_be32(&timerp->cr, 0);
70 out_be32(&timerp->tcnt, 0);
72 out_be32(&timerp->sr, SLT_SR_BE | SLT_SR_ST);
74 /* initialize and enable timer interrupt */
75 irq_install_handler(CONFIG_SYS_TMRINTR_NO, dtimer_interrupt, 0);
77 /* Interrupt every ms */
78 out_be32(&timerp->tcnt, 1000 * CONFIG_SYS_TIMER_PRESCALER);
82 /* set a period of 1us, set timer mode to restart and
83 enable timer and interrupt */
84 out_be32(&timerp->cr, SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN);
88 ulong get_timer(ulong base)
90 return (timestamp - base);
93 #endif /* CONFIG_SLTTMR */