1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
6 * Copyright 2010-2012 Freescale Semiconductor, Inc.
7 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
11 #include <asm-offsets.h>
14 #include <asm/cache.h>
20 move.w #0x2700,%sr; /* disable intrs */ \
21 subl #60,%sp; /* space for 15 regs */ \
22 moveml %d0-%d7/%a0-%a6,%sp@;
25 moveml %sp@,%d0-%d7/%a0-%a6; \
26 addl #60,%sp; /* space for 15 regs */ \
29 #if defined(CONFIG_SERIAL_BOOT)
30 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
31 CONFIG_SYS_INIT_RAM_ADDR)
32 #define ASM_DRAMINIT_N (asm_dram_init - CONFIG_SYS_TEXT_BASE)
33 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
34 CONFIG_SYS_INIT_RAM_ADDR)
40 * Vector table. This is used for initial platform startup.
41 * These vectors are to catch any un-intended traps.
44 #if defined(CONFIG_SERIAL_BOOT)
46 INITSP: .long 0 /* Initial SP */
48 INITPC: .long ASM_DRAMINIT /* Initial PC */
50 #ifdef CONFIG_SYS_NAND_BOOT
51 INITPC: .long ASM_DRAMINIT_N /* Initial PC */
56 INITSP: .long 0 /* Initial SP */
57 INITPC: .long _START /* Initial PC */
62 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
63 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 #if !defined(CONFIG_SERIAL_BOOT)
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
115 #if defined(CONFIG_SERIAL_BOOT)
116 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
118 .long 0x00000000 /* checksum, not yet implemented */
119 .long 0x00040000 /* image length */
120 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
123 move.w #0x2700,%sr /* Mask off Interrupt */
125 #ifdef CONFIG_SYS_NAND_BOOT
126 /* for assembly stack */
127 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
130 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
135 move.l #CONFIG_SYS_INIT_RAM_ADDR, %d0
138 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
141 /* initialize general use internal ram */
143 move.l #(ICACHE_STATUS), %a1 /* icache */
144 move.l #(DCACHE_STATUS), %a2 /* dcache */
148 /* invalidate and disable cache */
149 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
150 movec %d0, %CACR /* Invalidate cache */
157 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
160 #ifdef CONFIG_SYS_CS0_BASE
161 /* Must disable global address */
162 move.l #0xFC008000, %a1
163 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
164 move.l #0xFC008008, %a1
165 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
166 move.l #0xFC008004, %a1
167 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
169 #endif /* CONFIG_CF_SBF */
171 #ifdef CONFIG_MCF5441x
172 /* TC: enable all peripherals,
173 in the future only enable certain peripherals */
174 move.l #0xFC04002D, %a1
176 #if defined(CONFIG_CF_SBF)
177 move.b #23, (%a1) /* dspi */
179 #endif /* CONFIG_MCF5441x */
181 /* mandatory board level ddr-sdram init,
182 * for both 5441x and 5445x
188 * DSPI Initialization
189 * a0 - general, sram - 0x80008000 - 32, see M54455EVB.h
195 /* Enable pins for DSPI mode - chip-selects are enabled later */
197 #ifdef CONFIG_MCF5441x
198 move.l #0xEC09404E, %a1
199 move.l #0xEC09404F, %a2
204 /* Configure DSPI module */
205 move.l #0xFC05C000, %a0
206 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
208 move.l #0xFC05C00C, %a0
209 #ifdef CONFIG_MCF5441x
210 move.l #0x3E000016, (%a0)
213 move.l #0xFC05C034, %a2 /* dtfr */
214 move.l #0xFC05C03B, %a3 /* drfr */
216 move.l #(ASM_SBF_IMG_HDR + 4), %a1
220 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
221 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
223 move.l #0xFC05C02C, %a1 /* dspi status */
225 /* Issue commands and address */
226 move.l #0x8002000B, %d2 /* Fast Read Cmd */
227 jsr asm_dspi_wr_status
228 jsr asm_dspi_rd_status
230 move.l #0x80020000, %d2 /* Address byte 2 */
231 jsr asm_dspi_wr_status
232 jsr asm_dspi_rd_status
234 move.l #0x80020000, %d2 /* Address byte 1 */
235 jsr asm_dspi_wr_status
236 jsr asm_dspi_rd_status
238 move.l #0x80020000, %d2 /* Address byte 0 */
239 jsr asm_dspi_wr_status
240 jsr asm_dspi_rd_status
242 move.l #0x80020000, %d2 /* Dummy Wr and Rd */
243 jsr asm_dspi_wr_status
244 jsr asm_dspi_rd_status
246 /* Transfer serial boot header to sram */
248 move.l #0x80020000, %d2
249 jsr asm_dspi_wr_status
250 jsr asm_dspi_rd_status
252 move.b %d1, (%a0) /* read, copy to dst */
254 add.l #1, %a0 /* inc dst by 1 */
255 sub.l #1, %d4 /* dec cnt by 1 */
256 bne asm_dspi_rd_loop1
258 /* Transfer u-boot from serial flash to memory */
260 move.l #0x80020000, %d2
261 jsr asm_dspi_wr_status
262 jsr asm_dspi_rd_status
264 move.b %d1, (%a4) /* read, copy to dst */
266 add.l #1, %a4 /* inc dst by 1 */
267 sub.l #1, %d5 /* dec cnt by 1 */
268 bne asm_dspi_rd_loop2
270 move.l #0x00020000, %d2 /* Terminate */
271 jsr asm_dspi_wr_status
272 jsr asm_dspi_rd_status
274 /* jump to memory and execute */
275 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
279 move.l (%a1), %d0 /* status */
280 and.l #0x0000F000, %d0
281 cmp.l #0x00003000, %d0
282 bgt asm_dspi_wr_status
288 move.l (%a1), %d0 /* status */
289 and.l #0x000000F0, %d0
292 beq asm_dspi_rd_status
296 #endif /* CONFIG_CF_SBF */
298 #ifdef CONFIG_SYS_NAND_BOOT
299 /* copy 4 boot pages to dram as soon as possible */
300 /* each page is 996 bytes (1056 total with 60 ECC bytes */
301 move.l #0x00000000, %a1 /* src */
302 move.l #CONFIG_SYS_TEXT_BASE, %a2 /* dst */
303 move.l #0x3E0, %d0 /* sz in long */
306 move.l (%a1)+, (%a2)+
308 bne asm_boot_nand_copy
310 /* jump to memory and execute */
311 move.l #(asm_nand_init), %a0
315 /* exit nand boot-mode */
316 move.l #0xFC0FFF30, %a1
317 or.l #0x00000040, %d1
320 /* initialize general use internal ram */
322 move.l #(CACR_STATUS), %a1 /* CACR */
323 move.l #(ICACHE_STATUS), %a2 /* icache */
324 move.l #(DCACHE_STATUS), %a3 /* dcache */
329 /* invalidate and disable cache */
330 move.l #0x01004100, %d0 /* Invalidate cache cmd */
331 movec %d0, %CACR /* Invalidate cache */
338 #ifdef CONFIG_SYS_CS0_BASE
339 /* Must disable global address */
340 move.l #0xFC008000, %a1
341 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
342 move.l #0xFC008008, %a1
343 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
344 move.l #0xFC008004, %a1
345 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
348 /* NAND port configuration */
349 move.l #0xEC094048, %a1
355 move.l #0xFC0FFF38, %a1 /* isr */
356 move.l #0x000e0000, (%a1)
357 move.l #0xFC0FFF08, %a2
358 move.l #0x00000000, (%a2)+ /* car */
359 move.l #0x11000000, (%a2)+ /* rar */
360 move.l #0x00000000, (%a2)+ /* rpt */
361 move.l #0x00000000, (%a2)+ /* rai */
362 move.l #0xFC0FFF2c, %a2 /* cfg */
363 move.l #0x00000000, (%a2)+ /* secsz */
364 move.l #0x000e0681, (%a2)+
365 move.l #0xFC0FFF04, %a2 /* cmd2 */
366 move.l #0xFF404001, (%a2)
367 move.l #0x000e0000, (%a1)
373 move.l #0xFC0FFF00, %a1
374 move.l #0x30700000, (%a1)+ /* cmd1 */
375 move.l #0x007EF000, (%a1)+ /* cmd2 */
377 move.l #0xFC0FFF2C, %a1
378 move.l #0x00000841, (%a1)+ /* secsz */
379 move.l #0x000e0681, (%a1)+ /* cfg */
381 move.l #100, %d4 /* 100 pages ~200KB */
382 move.l #4, %d2 /* start at 4 */
383 move.l #0xFC0FFF04, %a0 /* cmd2 */
384 move.l #0xFC0FFF0C, %a1 /* rar */
385 move.l #(CONFIG_SYS_TEXT_BASE + 0xF80), %a2
388 move.l #0x11000000, %d0 /* rar */
393 move.l (%a0), %d0 /* cmd2 */
401 move.l #0xFC0FFF38, %a4 /* isr */
403 and.l #0x40000000, %d0
405 beq asm_nand_chk_status
407 move.l #0xFC0FFF38, %a4 /* isr */
409 or.l #0x000E0000, %d0
413 move.l #0xFC0FC000, %a3 /* buf 1 */
415 move.l (%a3)+, (%a2)+
422 /* jump to memory and execute */
423 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
426 #endif /* CONFIG_SYS_NAND_BOOT */
434 #endif /* CONFIG_CF_SBF || CONFIG_NAND_U_BOOT */
440 #if !defined(CONFIG_SERIAL_BOOT)
443 move.w #0x2700,%sr /* Mask off Interrupt */
445 /* Set vector base register at the beginning of the Flash */
446 move.l #CONFIG_SYS_FLASH_BASE, %d0
449 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
452 /* initialize general use internal ram */
454 move.l #(ICACHE_STATUS), %a1 /* icache */
455 move.l #(DCACHE_STATUS), %a2 /* dcache */
459 /* invalidate and disable cache */
460 move.l #(CONFIG_SYS_ICACHE_INV + CONFIG_SYS_DCACHE_INV), %d0
461 movec %d0, %CACR /* Invalidate cache */
468 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
472 /* put relocation table address to a5 */
473 move.l #__got_start, %a5
475 /* setup stack initially on top of internal static ram */
476 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
479 * if configured, malloc_f arena will be reserved first,
480 * then (and always) gd struct space will be reserved
483 move.l #board_init_f_alloc_reserve, %a1
486 /* update stack and frame-pointers */
490 /* initialize reserved area */
492 move.l #board_init_f_init_reserve, %a1
495 /* run low-level CPU init code (from flash) */
496 move.l #cpu_init_f, %a1
499 /* run low-level board init code (from flash) */
501 move.l #board_init_f, %a1
504 /* board_init_f() does not return */
506 /******************************************************************************/
509 * void relocate_code(addr_sp, gd, addr_moni)
511 * This "function" does not return, instead it continues in RAM
512 * after relocating the monitor code.
516 * r5 = length in bytes
522 move.l 8(%a6), %sp /* set new stack pointer */
524 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
525 move.l 16(%a6), %a0 /* Save copy of Destination Address */
527 move.l #CONFIG_SYS_MONITOR_BASE, %a1
528 move.l #__init_end, %a2
531 /* copy the code to RAM */
533 move.l (%a1)+, (%a3)+
538 * We are done. Do not return, instead branch to second part of board
539 * initialization, now running from RAM.
542 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
549 * Now clear BSS segment
552 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
554 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
561 * fix got table in RAM
564 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
565 move.l %a1,%a5 /* fix got pointer register a5 */
568 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
578 /* calculate relative jump to board_init_r in ram */
580 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
582 /* set parameters for board_init_r */
583 move.l %a0,-(%sp) /* dest_addr */
584 move.l %d0,-(%sp) /* gd */
587 /******************************************************************************/
610 /******************************************************************************/
612 .globl version_string
614 .ascii U_BOOT_VERSION_STRING, "\0"