1 // SPDX-License-Identifier: GPL-2.0+
4 * Josef Baumgartner <josef.baumgartner@telex.de>
8 * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
11 * Copyright (C) 2008 Arthur Shipkowski (art@videon-central.com)
13 * Copyright (C) 2012 Freescale Semiconductor, Inc. All Rights Reserved.
21 #include <asm/global_data.h>
22 #include <asm/immap.h>
25 #include <linux/delay.h>
28 DECLARE_GLOBAL_DATA_PTR;
31 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
33 rcm_t *rcm = (rcm_t *)(MMAP_RCM);
37 out_8(&rcm->rcr, RCM_RCR_SOFTRST);
39 /* we don't return! */
43 #if defined(CONFIG_DISPLAY_CPUINFO)
44 int print_cpuinfo(void)
46 char buf1[32], buf2[32];
48 printf("CPU: Freescale Coldfire MCF5208\n"
49 " CPU CLK %s MHz BUS CLK %s MHz\n",
50 strmhz(buf1, gd->cpu_clk),
51 strmhz(buf2, gd->bus_clk));
54 #endif /* CONFIG_DISPLAY_CPUINFO */
55 #endif /* #ifdef CONFIG_M5208 */
58 #if defined(CONFIG_DISPLAY_CPUINFO)
60 * Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
61 * determine which one we are running on, based on the Chip Identification
64 int print_cpuinfo(void)
67 unsigned short cir; /* Chip Identification Register */
68 unsigned short pin; /* Part identification number */
69 unsigned char prn; /* Part revision number */
72 cir = mbar_readShort(MCF_CCM_CIR);
73 pin = cir >> MCF_CCM_CIR_PIN_LEN;
74 prn = cir & MCF_CCM_CIR_PRN_MASK;
77 case MCF_CCM_CIR_PIN_MCF5270:
80 case MCF_CCM_CIR_PIN_MCF5271:
89 printf("CPU: Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
90 cpu_model, prn, strmhz(buf, CFG_SYS_CLK));
92 printf("CPU: Unknown - Freescale ColdFire MCF5271 family"
93 " (PIN: 0x%x) rev. %hu, at %s MHz\n",
94 pin, prn, strmhz(buf, CFG_SYS_CLK));
98 #endif /* CONFIG_DISPLAY_CPUINFO */
100 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
102 /* Call the board specific reset actions first. */
107 mbar_writeByte(MCF_RCM_RCR,
108 MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
112 #if defined(CONFIG_WATCHDOG)
113 void watchdog_reset(void)
115 mbar_writeShort(MCF_WTM_WSR, 0x5555);
116 mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
119 int watchdog_disable(void)
121 mbar_writeShort(MCF_WTM_WCR, 0);
125 int watchdog_init(void)
127 mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
130 #endif /* #ifdef CONFIG_WATCHDOG */
135 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
137 wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
139 out_be16(&wdp->wdog_wrrr, 0);
142 /* enable watchdog, set timeout to 0 and wait */
143 out_be16(&wdp->wdog_wrrr, 1);
146 /* we don't return! */
150 #if defined(CONFIG_DISPLAY_CPUINFO)
151 int print_cpuinfo(void)
153 sysctrl_t *sysctrl = (sysctrl_t *) (MMAP_CFG);
158 msk = (in_be32(&sysctrl->sc_dir) > 28) & 0xf;
168 printf("Freescale MCF5272 (Mask:%01x)\n", msk);
173 printf("Freescale MCF5272 %s\n", suf);
176 #endif /* CONFIG_DISPLAY_CPUINFO */
178 #if defined(CONFIG_WATCHDOG)
179 /* Called by macro WATCHDOG_RESET */
180 void watchdog_reset(void)
182 wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
184 out_be16(&wdt->wdog_wcr, 0);
187 int watchdog_disable(void)
189 wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
191 /* reset watchdog counter */
192 out_be16(&wdt->wdog_wcr, 0);
193 /* disable watchdog interrupt */
194 out_be16(&wdt->wdog_wirr, 0);
195 /* disable watchdog timer */
196 out_be16(&wdt->wdog_wrrr, 0);
198 puts("WATCHDOG:disabled\n");
202 int watchdog_init(void)
204 wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
206 /* disable watchdog interrupt */
207 out_be16(&wdt->wdog_wirr, 0);
209 /* set timeout and enable watchdog */
210 out_be16(&wdt->wdog_wrrr,
211 (CONFIG_WATCHDOG_TIMEOUT_MSECS * CONFIG_SYS_HZ) / (32768 * 1000) - 1);
213 /* reset watchdog counter */
214 out_be16(&wdt->wdog_wcr, 0);
216 puts("WATCHDOG:enabled\n");
219 #endif /* #ifdef CONFIG_WATCHDOG */
221 #endif /* #ifdef CONFIG_M5272 */
224 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
226 rcm_t *rcm = (rcm_t *)(MMAP_RCM);
230 out_8(&rcm->rcr, RCM_RCR_SOFTRST);
232 /* we don't return! */
236 #if defined(CONFIG_DISPLAY_CPUINFO)
237 int print_cpuinfo(void)
241 printf("CPU: Freescale Coldfire MCF5275 at %s MHz\n",
242 strmhz(buf, CFG_SYS_CLK));
245 #endif /* CONFIG_DISPLAY_CPUINFO */
247 #if defined(CONFIG_WATCHDOG)
248 /* Called by macro WATCHDOG_RESET */
249 void watchdog_reset(void)
251 wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
253 out_be16(&wdt->wsr, 0x5555);
254 out_be16(&wdt->wsr, 0xaaaa);
257 int watchdog_disable(void)
259 wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
261 /* reset watchdog counter */
262 out_be16(&wdt->wsr, 0x5555);
263 out_be16(&wdt->wsr, 0xaaaa);
265 /* disable watchdog timer */
266 out_be16(&wdt->wcr, 0);
268 puts("WATCHDOG:disabled\n");
272 int watchdog_init(void)
274 wdog_t *wdt = (wdog_t *)(MMAP_WDOG);
276 /* disable watchdog */
277 out_be16(&wdt->wcr, 0);
279 /* set timeout and enable watchdog */
281 (CONFIG_WATCHDOG_TIMEOUT_MSECS * CONFIG_SYS_HZ) / (32768 * 1000) - 1);
283 /* reset watchdog counter */
284 out_be16(&wdt->wsr, 0x5555);
285 out_be16(&wdt->wsr, 0xaaaa);
287 puts("WATCHDOG:enabled\n");
290 #endif /* #ifdef CONFIG_WATCHDOG */
292 #endif /* #ifdef CONFIG_M5275 */
295 #if defined(CONFIG_DISPLAY_CPUINFO)
296 int print_cpuinfo(void)
298 unsigned char resetsource = MCFRESET_RSR;
300 printf("CPU: Freescale Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n",
301 MCFCCM_CIR >> 8, MCFCCM_CIR & MCFCCM_CIR_PRN_MASK);
302 printf("Reset:%s%s%s%s%s%s%s\n",
303 (resetsource & MCFRESET_RSR_LOL) ? " Loss of Lock" : "",
304 (resetsource & MCFRESET_RSR_LOC) ? " Loss of Clock" : "",
305 (resetsource & MCFRESET_RSR_EXT) ? " External" : "",
306 (resetsource & MCFRESET_RSR_POR) ? " Power On" : "",
307 (resetsource & MCFRESET_RSR_WDR) ? " Watchdog" : "",
308 (resetsource & MCFRESET_RSR_SOFT) ? " Software" : "",
309 (resetsource & MCFRESET_RSR_LVD) ? " Low Voltage" : "");
312 #endif /* CONFIG_DISPLAY_CPUINFO */
314 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
316 MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
322 #if defined(CONFIG_DISPLAY_CPUINFO)
323 int print_cpuinfo(void)
327 printf("CPU: Freescale Coldfire MCF5249 at %s MHz\n",
328 strmhz(buf, CFG_SYS_CLK));
331 #endif /* CONFIG_DISPLAY_CPUINFO */
333 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
335 /* enable watchdog, set timeout to 0 and wait */
336 mbar_writeByte(MCFSIM_SYPCR, 0xc0);
339 /* we don't return! */
345 #if defined(CONFIG_DISPLAY_CPUINFO)
346 int print_cpuinfo(void)
350 unsigned char resetsource = mbar_readLong(SIM_RSR);
351 printf("CPU: Freescale Coldfire MCF5253 at %s MHz\n",
352 strmhz(buf, CFG_SYS_CLK));
354 if ((resetsource & SIM_RSR_HRST) || (resetsource & SIM_RSR_SWTR)) {
355 printf("Reset:%s%s\n",
356 (resetsource & SIM_RSR_HRST) ? " Hardware/ System Reset"
358 (resetsource & SIM_RSR_SWTR) ? " Software Watchdog" :
363 #endif /* CONFIG_DISPLAY_CPUINFO */
365 int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
367 /* enable watchdog, set timeout to 0 and wait */
368 mbar_writeByte(SIM_SYPCR, 0xc0);
371 /* we don't return! */
376 #if defined(CONFIG_MCFFEC)
377 /* Default initializations for MCFFEC controllers. To override,
378 * create a board-specific function called:
379 * int board_eth_init(struct bd_info *bis)
382 int cpu_eth_init(struct bd_info *bis)
384 return mcffec_initialize(bis);