1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
10 #include <asm/cache.h>
16 move.w #0x2700,%sr; /* disable intrs */ \
17 subl #60,%sp; /* space for 15 regs */ \
18 moveml %d0-%d7/%a0-%a6,%sp@;
21 moveml %sp@,%d0-%d7/%a0-%a6; \
22 addl #60,%sp; /* space for 15 regs */ \
25 #if defined(CONFIG_CF_SBF)
26 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
27 CONFIG_SYS_INIT_RAM_ADDR)
28 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
29 CONFIG_SYS_INIT_RAM_ADDR)
35 * Vector table. This is used for initial platform startup.
36 * These vectors are to catch any un-intended traps.
39 #if defined(CONFIG_CF_SBF)
40 INITSP: .long 0 /* Initial SP */
41 INITPC: .long ASM_DRAMINIT /* Initial PC */
43 INITSP: .long 0 /* Initial SP */
44 INITPC: .long _START /* Initial PC */
48 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
49 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
53 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
56 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
58 #if !defined(CONFIG_CF_SBF)
61 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
62 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100 #if defined(CONFIG_CF_SBF)
101 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
103 .long 0x00000000 /* checksum, not yet implemented */
104 .long 0x00020000 /* image length */
105 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
108 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
109 movec %d0, %RAMBAR1 /* init Rambar */
111 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
114 /* Must disable global address */
115 move.l #0xFC008000, %a1
116 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
117 move.l #0xFC008008, %a1
118 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
119 move.l #0xFC008004, %a1
120 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
123 * Dram Initialization
126 move.l #0xFC0A4074, %a1
127 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
130 /* SDRAM Chip 0 and 1 */
131 move.l #0xFC0B8110, %a1
132 move.l #0xFC0B8114, %a2
134 /* calculate the size */
136 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
137 #ifdef CONFIG_SYS_SDRAM_BASE1
147 /* SDRAM Chip 0 and 1 */
148 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
150 #ifdef CONFIG_SYS_SDRAM_BASE1
151 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
156 /* dram cfg1 and cfg2 */
157 move.l #0xFC0B8008, %a1
158 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
160 move.l #0xFC0B800C, %a2
161 move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
164 move.l #0xFC0B8000, %a1 /* Mode */
165 move.l #0xFC0B8004, %a2 /* Ctrl */
168 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
172 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
174 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
184 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
187 /* Perform two refresh cycles */
188 move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
194 move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
195 and.l #0x7FFFFFFF, %d0
196 or.l #0x10000c00, %d0
201 * DSPI Initialization
202 * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
209 /* Enable pins for DSPI mode - chip-selects are enabled later */
210 move.l #0xFC0A4036, %a0
215 #ifdef CONFIG_SYS_DSPI_CS0
220 #ifdef CONFIG_SYS_DSPI_CS2
221 move.l #0xFC0A4037, %a0
228 /* Configure DSPI module */
229 move.l #0xFC05C000, %a0
230 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
232 move.l #0xFC05C00C, %a0
233 move.l #0x3E000011, (%a0)
235 move.l #0xFC05C034, %a2 /* dtfr */
236 move.l #0xFC05C03B, %a3 /* drfr */
238 move.l #(ASM_SBF_IMG_HDR + 4), %a1
242 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
243 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
245 move.l #0xFC05C02C, %a1 /* dspi status */
247 /* Issue commands and address */
248 move.l #0x8004000B, %d2 /* Fast Read Cmd */
249 jsr asm_dspi_wr_status
250 jsr asm_dspi_rd_status
252 move.l #0x80040000, %d2 /* Address byte 2 */
253 jsr asm_dspi_wr_status
254 jsr asm_dspi_rd_status
256 move.l #0x80040000, %d2 /* Address byte 1 */
257 jsr asm_dspi_wr_status
258 jsr asm_dspi_rd_status
260 move.l #0x80040000, %d2 /* Address byte 0 */
261 jsr asm_dspi_wr_status
262 jsr asm_dspi_rd_status
264 move.l #0x80040000, %d2 /* Dummy Wr and Rd */
265 jsr asm_dspi_wr_status
266 jsr asm_dspi_rd_status
268 /* Transfer serial boot header to sram */
270 move.l #0x80040000, %d2
271 jsr asm_dspi_wr_status
272 jsr asm_dspi_rd_status
274 move.b %d1, (%a0) /* read, copy to dst */
276 add.l #1, %a0 /* inc dst by 1 */
277 sub.l #1, %d4 /* dec cnt by 1 */
278 bne asm_dspi_rd_loop1
280 /* Transfer u-boot from serial flash to memory */
282 move.l #0x80040000, %d2
283 jsr asm_dspi_wr_status
284 jsr asm_dspi_rd_status
286 move.b %d1, (%a4) /* read, copy to dst */
288 add.l #1, %a4 /* inc dst by 1 */
289 sub.l #1, %d5 /* dec cnt by 1 */
290 bne asm_dspi_rd_loop2
292 move.l #0x00040000, %d2 /* Terminate */
293 jsr asm_dspi_wr_status
294 jsr asm_dspi_rd_status
296 /* jump to memory and execute */
297 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
302 move.l (%a1), %d0 /* status */
303 and.l #0x0000F000, %d0
304 cmp.l #0x00003000, %d0
305 bgt asm_dspi_wr_status
311 move.l (%a1), %d0 /* status */
312 and.l #0x000000F0, %d0
315 beq asm_dspi_rd_status
319 #endif /* CONFIG_CF_SBF */
327 move.w #0x2700,%sr /* Mask off Interrupt */
329 /* Set vector base register at the beginning of the Flash */
330 #if defined(CONFIG_CF_SBF)
331 move.l #CONFIG_SYS_TEXT_BASE, %d0
334 move.l #CONFIG_SYS_FLASH_BASE, %d0
337 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
341 /* invalidate and disable cache */
342 move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
343 movec %d0, %CACR /* Invalidate cache */
348 /* initialize general use internal ram */
350 move.l #(ICACHE_STATUS), %a1 /* icache */
351 move.l #(DCACHE_STATUS), %a2 /* icache */
355 /* put relocation table address to a5 */
356 move.l #__got_start, %a5
358 /* setup stack initially on top of internal static ram */
359 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
362 * if configured, malloc_f arena will be reserved first,
363 * then (and always) gd struct space will be reserved
366 bsr board_init_f_alloc_reserve
368 /* update stack and frame-pointers */
372 /* initialize reserved area */
374 bsr board_init_f_init_reserve
376 /* run low-level CPU init code (from flash) */
380 /* run low-level board init code (from flash) */
383 /* board_init_f() does not return */
385 /******************************************************************************/
388 * void relocate_code (addr_sp, gd, addr_moni)
390 * This "function" does not return, instead it continues in RAM
391 * after relocating the monitor code.
395 * r5 = length in bytes
401 move.l 8(%a6), %sp /* set new stack pointer */
403 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
404 move.l 16(%a6), %a0 /* Save copy of Destination Address */
406 move.l #CONFIG_SYS_MONITOR_BASE, %a1
407 move.l #__init_end, %a2
410 /* copy the code to RAM */
412 move.l (%a1)+, (%a3)+
417 * We are done. Do not return, instead branch to second part of board
418 * initialization, now running from RAM.
421 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
428 * Now clear BSS segment
431 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
433 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
440 * fix got table in RAM
443 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
444 move.l %a1,%a5 /* fix got pointer register a5 */
447 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
457 /* calculate relative jump to board_init_r in ram */
459 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
461 /* set parameters for board_init_r */
462 move.l %a0,-(%sp) /* dest_addr */
463 move.l %d0,-(%sp) /* gd */
466 /******************************************************************************/
489 /******************************************************************************/
491 .globl version_string
493 .ascii U_BOOT_VERSION_STRING, "\0"