1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
4 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
7 #include <asm-offsets.h>
15 move.w #0x2700,%sr; /* disable intrs */ \
16 subl #60,%sp; /* space for 15 regs */ \
17 moveml %d0-%d7/%a0-%a6,%sp@;
20 moveml %sp@,%d0-%d7/%a0-%a6; \
21 addl #60,%sp; /* space for 15 regs */ \
24 #if defined(CONFIG_CF_SBF)
25 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
26 CONFIG_SYS_INIT_RAM_ADDR)
27 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
28 CONFIG_SYS_INIT_RAM_ADDR)
34 * Vector table. This is used for initial platform startup.
35 * These vectors are to catch any un-intended traps.
38 #if defined(CONFIG_CF_SBF)
39 INITSP: .long 0 /* Initial SP */
40 INITPC: .long ASM_DRAMINIT /* Initial PC */
42 INITSP: .long 0 /* Initial SP */
43 INITPC: .long _START /* Initial PC */
47 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
48 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
52 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
55 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
57 #if !defined(CONFIG_CF_SBF)
60 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
61 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
65 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
66 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
69 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
70 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
73 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
83 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
84 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
94 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 #if defined(CONFIG_CF_SBF)
100 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
102 .long 0x00000000 /* checksum, not yet implemented */
103 .long 0x00020000 /* image length */
104 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
107 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
108 movec %d0, %RAMBAR1 /* init Rambar */
110 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
113 /* Must disable global address */
114 move.l #0xFC008000, %a1
115 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
116 move.l #0xFC008008, %a1
117 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
118 move.l #0xFC008004, %a1
119 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
122 * Dram Initialization
125 move.l #0xFC0A4074, %a1
126 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
129 /* SDRAM Chip 0 and 1 */
130 move.l #0xFC0B8110, %a1
131 move.l #0xFC0B8114, %a2
133 /* calculate the size */
135 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
136 #ifdef CONFIG_SYS_SDRAM_BASE1
146 /* SDRAM Chip 0 and 1 */
147 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
149 #ifdef CONFIG_SYS_SDRAM_BASE1
150 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
155 /* dram cfg1 and cfg2 */
156 move.l #0xFC0B8008, %a1
157 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
159 move.l #0xFC0B800C, %a2
160 move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
163 move.l #0xFC0B8000, %a1 /* Mode */
164 move.l #0xFC0B8004, %a2 /* Ctrl */
167 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
171 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
173 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
183 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
186 /* Perform two refresh cycles */
187 move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
193 move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
194 and.l #0x7FFFFFFF, %d0
195 or.l #0x10000c00, %d0
200 * DSPI Initialization
201 * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
208 /* Enable pins for DSPI mode - chip-selects are enabled later */
209 move.l #0xFC0A4036, %a0
214 #ifdef CONFIG_SYS_DSPI_CS0
219 #ifdef CONFIG_SYS_DSPI_CS2
220 move.l #0xFC0A4037, %a0
227 /* Configure DSPI module */
228 move.l #0xFC05C000, %a0
229 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
231 move.l #0xFC05C00C, %a0
232 move.l #0x3E000011, (%a0)
234 move.l #0xFC05C034, %a2 /* dtfr */
235 move.l #0xFC05C03B, %a3 /* drfr */
237 move.l #(ASM_SBF_IMG_HDR + 4), %a1
241 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
242 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
244 move.l #0xFC05C02C, %a1 /* dspi status */
246 /* Issue commands and address */
247 move.l #0x8004000B, %d2 /* Fast Read Cmd */
248 jsr asm_dspi_wr_status
249 jsr asm_dspi_rd_status
251 move.l #0x80040000, %d2 /* Address byte 2 */
252 jsr asm_dspi_wr_status
253 jsr asm_dspi_rd_status
255 move.l #0x80040000, %d2 /* Address byte 1 */
256 jsr asm_dspi_wr_status
257 jsr asm_dspi_rd_status
259 move.l #0x80040000, %d2 /* Address byte 0 */
260 jsr asm_dspi_wr_status
261 jsr asm_dspi_rd_status
263 move.l #0x80040000, %d2 /* Dummy Wr and Rd */
264 jsr asm_dspi_wr_status
265 jsr asm_dspi_rd_status
267 /* Transfer serial boot header to sram */
269 move.l #0x80040000, %d2
270 jsr asm_dspi_wr_status
271 jsr asm_dspi_rd_status
273 move.b %d1, (%a0) /* read, copy to dst */
275 add.l #1, %a0 /* inc dst by 1 */
276 sub.l #1, %d4 /* dec cnt by 1 */
277 bne asm_dspi_rd_loop1
279 /* Transfer u-boot from serial flash to memory */
281 move.l #0x80040000, %d2
282 jsr asm_dspi_wr_status
283 jsr asm_dspi_rd_status
285 move.b %d1, (%a4) /* read, copy to dst */
287 add.l #1, %a4 /* inc dst by 1 */
288 sub.l #1, %d5 /* dec cnt by 1 */
289 bne asm_dspi_rd_loop2
291 move.l #0x00040000, %d2 /* Terminate */
292 jsr asm_dspi_wr_status
293 jsr asm_dspi_rd_status
295 /* jump to memory and execute */
296 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
301 move.l (%a1), %d0 /* status */
302 and.l #0x0000F000, %d0
303 cmp.l #0x00003000, %d0
304 bgt asm_dspi_wr_status
310 move.l (%a1), %d0 /* status */
311 and.l #0x000000F0, %d0
314 beq asm_dspi_rd_status
318 #endif /* CONFIG_CF_SBF */
326 move.w #0x2700,%sr /* Mask off Interrupt */
328 /* Set vector base register at the beginning of the Flash */
329 #if defined(CONFIG_CF_SBF)
330 move.l #CONFIG_SYS_TEXT_BASE, %d0
333 move.l #CONFIG_SYS_FLASH_BASE, %d0
336 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
340 /* invalidate and disable cache */
341 move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
342 movec %d0, %CACR /* Invalidate cache */
347 /* initialize general use internal ram */
349 move.l #(ICACHE_STATUS), %a1 /* icache */
350 move.l #(DCACHE_STATUS), %a2 /* icache */
354 /* put relocation table address to a5 */
355 move.l #__got_start, %a5
357 /* setup stack initially on top of internal static ram */
358 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
361 * if configured, malloc_f arena will be reserved first,
362 * then (and always) gd struct space will be reserved
365 bsr board_init_f_alloc_reserve
367 /* update stack and frame-pointers */
371 /* initialize reserved area */
373 bsr board_init_f_init_reserve
375 /* run low-level CPU init code (from flash) */
379 /* run low-level board init code (from flash) */
380 move.l #board_init_f, %a1
383 /* board_init_f() does not return */
385 /******************************************************************************/
388 * void relocate_code(addr_sp, gd, addr_moni)
390 * This "function" does not return, instead it continues in RAM
391 * after relocating the monitor code.
395 * r5 = length in bytes
401 move.l 8(%a6), %sp /* set new stack pointer */
403 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
404 move.l 16(%a6), %a0 /* Save copy of Destination Address */
406 move.l #CONFIG_SYS_MONITOR_BASE, %a1
407 move.l #__init_end, %a2
410 /* copy the code to RAM */
412 move.l (%a1)+, (%a3)+
417 * We are done. Do not return, instead branch to second part of board
418 * initialization, now running from RAM.
421 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
428 * Now clear BSS segment
431 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
433 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
440 * fix got table in RAM
443 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
444 move.l %a1,%a5 /* fix got pointer register a5 */
447 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
457 /* calculate relative jump to board_init_r in ram */
459 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
461 /* set parameters for board_init_r */
462 move.l %a0,-(%sp) /* dest_addr */
463 move.l %d0,-(%sp) /* gd */
466 /******************************************************************************/
489 /******************************************************************************/