2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <asm-offsets.h>
11 #include <asm/cache.h>
13 #ifndef CONFIG_IDENT_STRING
14 #define CONFIG_IDENT_STRING ""
21 move.w #0x2700,%sr; /* disable intrs */ \
22 subl #60,%sp; /* space for 15 regs */ \
23 moveml %d0-%d7/%a0-%a6,%sp@;
26 moveml %sp@,%d0-%d7/%a0-%a6; \
27 addl #60,%sp; /* space for 15 regs */ \
30 #if defined(CONFIG_CF_SBF)
31 #define ASM_DRAMINIT (asm_dram_init - CONFIG_SYS_TEXT_BASE + \
32 CONFIG_SYS_INIT_RAM_ADDR)
33 #define ASM_SBF_IMG_HDR (asm_sbf_img_hdr - CONFIG_SYS_TEXT_BASE + \
34 CONFIG_SYS_INIT_RAM_ADDR)
40 * Vector table. This is used for initial platform startup.
41 * These vectors are to catch any un-intended traps.
44 #if defined(CONFIG_CF_SBF)
45 INITSP: .long 0 /* Initial SP */
46 INITPC: .long ASM_DRAMINIT /* Initial PC */
48 INITSP: .long 0 /* Initial SP */
49 INITPC: .long _START /* Initial PC */
53 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
54 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
58 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
61 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
63 #if !defined(CONFIG_CF_SBF)
66 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
67 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
71 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
72 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
75 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
76 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
77 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
78 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
79 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
80 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
81 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
82 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
85 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
89 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
90 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
105 #if defined(CONFIG_CF_SBF)
106 /* Image header: chksum 4 bytes, len 4 bytes, img dest 4 bytes */
108 .long 0x00000000 /* checksum, not yet implemented */
109 .long 0x00020000 /* image length */
110 .long CONFIG_SYS_TEXT_BASE /* image to be relocated at */
113 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
114 movec %d0, %RAMBAR1 /* init Rambar */
116 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
119 /* Must disable global address */
120 move.l #0xFC008000, %a1
121 move.l #(CONFIG_SYS_CS0_BASE), (%a1)
122 move.l #0xFC008008, %a1
123 move.l #(CONFIG_SYS_CS0_CTRL), (%a1)
124 move.l #0xFC008004, %a1
125 move.l #(CONFIG_SYS_CS0_MASK), (%a1)
128 * Dram Initialization
131 move.l #0xFC0A4074, %a1
132 move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1)
135 /* SDRAM Chip 0 and 1 */
136 move.l #0xFC0B8110, %a1
137 move.l #0xFC0B8114, %a2
139 /* calculate the size */
141 move.l #(CONFIG_SYS_SDRAM_SIZE), %d2
142 #ifdef CONFIG_SYS_SDRAM_BASE1
152 /* SDRAM Chip 0 and 1 */
153 move.l #(CONFIG_SYS_SDRAM_BASE), (%a1)
155 #ifdef CONFIG_SYS_SDRAM_BASE1
156 move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2)
161 /* dram cfg1 and cfg2 */
162 move.l #0xFC0B8008, %a1
163 move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1)
165 move.l #0xFC0B800C, %a2
166 move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2)
169 move.l #0xFC0B8000, %a1 /* Mode */
170 move.l #0xFC0B8004, %a2 /* Ctrl */
173 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
177 move.l #(CONFIG_SYS_SDRAM_MODE), (%a1)
179 move.l #(CONFIG_SYS_SDRAM_EMOD), (%a1)
189 move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2)
192 /* Perform two refresh cycles */
193 move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0
199 move.l #(CONFIG_SYS_SDRAM_CTRL), %d0
200 and.l #0x7FFFFFFF, %d0
201 or.l #0x10000c00, %d0
206 * DSPI Initialization
207 * a0 - general, sram - 0x80008000 - 32, see M52277EVB.h
214 /* Enable pins for DSPI mode - chip-selects are enabled later */
215 move.l #0xFC0A4036, %a0
220 #ifdef CONFIG_SYS_DSPI_CS0
225 #ifdef CONFIG_SYS_DSPI_CS2
226 move.l #0xFC0A4037, %a0
233 /* Configure DSPI module */
234 move.l #0xFC05C000, %a0
235 move.l #0x80FF0C00, (%a0) /* Master, clear TX/RX FIFO */
237 move.l #0xFC05C00C, %a0
238 move.l #0x3E000011, (%a0)
240 move.l #0xFC05C034, %a2 /* dtfr */
241 move.l #0xFC05C03B, %a3 /* drfr */
243 move.l #(ASM_SBF_IMG_HDR + 4), %a1
247 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_SBFHDR_DATA_OFFSET), %a0
248 move.l #(CONFIG_SYS_SBFHDR_SIZE), %d4
250 move.l #0xFC05C02C, %a1 /* dspi status */
252 /* Issue commands and address */
253 move.l #0x8004000B, %d2 /* Fast Read Cmd */
254 jsr asm_dspi_wr_status
255 jsr asm_dspi_rd_status
257 move.l #0x80040000, %d2 /* Address byte 2 */
258 jsr asm_dspi_wr_status
259 jsr asm_dspi_rd_status
261 move.l #0x80040000, %d2 /* Address byte 1 */
262 jsr asm_dspi_wr_status
263 jsr asm_dspi_rd_status
265 move.l #0x80040000, %d2 /* Address byte 0 */
266 jsr asm_dspi_wr_status
267 jsr asm_dspi_rd_status
269 move.l #0x80040000, %d2 /* Dummy Wr and Rd */
270 jsr asm_dspi_wr_status
271 jsr asm_dspi_rd_status
273 /* Transfer serial boot header to sram */
275 move.l #0x80040000, %d2
276 jsr asm_dspi_wr_status
277 jsr asm_dspi_rd_status
279 move.b %d1, (%a0) /* read, copy to dst */
281 add.l #1, %a0 /* inc dst by 1 */
282 sub.l #1, %d4 /* dec cnt by 1 */
283 bne asm_dspi_rd_loop1
285 /* Transfer u-boot from serial flash to memory */
287 move.l #0x80040000, %d2
288 jsr asm_dspi_wr_status
289 jsr asm_dspi_rd_status
291 move.b %d1, (%a4) /* read, copy to dst */
293 add.l #1, %a4 /* inc dst by 1 */
294 sub.l #1, %d5 /* dec cnt by 1 */
295 bne asm_dspi_rd_loop2
297 move.l #0x00040000, %d2 /* Terminate */
298 jsr asm_dspi_wr_status
299 jsr asm_dspi_rd_status
301 /* jump to memory and execute */
302 move.l #(CONFIG_SYS_TEXT_BASE + 0x400), %a0
307 move.l (%a1), %d0 /* status */
308 and.l #0x0000F000, %d0
309 cmp.l #0x00003000, %d0
310 bgt asm_dspi_wr_status
316 move.l (%a1), %d0 /* status */
317 and.l #0x000000F0, %d0
320 beq asm_dspi_rd_status
324 #endif /* CONFIG_CF_SBF */
332 move.w #0x2700,%sr /* Mask off Interrupt */
334 /* Set vector base register at the beginning of the Flash */
335 #if defined(CONFIG_CF_SBF)
336 move.l #CONFIG_SYS_TEXT_BASE, %d0
339 move.l #CONFIG_SYS_FLASH_BASE, %d0
342 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
346 /* invalidate and disable cache */
347 move.l #CF_CACR_CINV, %d0 /* Invalidate cache cmd */
348 movec %d0, %CACR /* Invalidate cache */
353 /* initialize general use internal ram */
355 move.l #(ICACHE_STATUS), %a1 /* icache */
356 move.l #(DCACHE_STATUS), %a2 /* icache */
360 /* put relocation table address to a5 */
361 move.l #__got_start, %a5
363 /* setup stack initially on top of internal static ram */
364 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp
367 * if configured, malloc_f arena will be reserved first,
368 * then (and always) gd struct space will be reserved
371 bsr board_init_f_alloc_reserve
373 /* update stack and frame-pointers */
377 /* initialize reserved area */
379 bsr board_init_f_init_reserve
381 /* run low-level CPU init code (from flash) */
385 /* run low-level board init code (from flash) */
388 /* board_init_f() does not return */
390 /******************************************************************************/
393 * void relocate_code (addr_sp, gd, addr_moni)
395 * This "function" does not return, instead it continues in RAM
396 * after relocating the monitor code.
400 * r5 = length in bytes
406 move.l 8(%a6), %sp /* set new stack pointer */
408 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
409 move.l 16(%a6), %a0 /* Save copy of Destination Address */
411 move.l #CONFIG_SYS_MONITOR_BASE, %a1
412 move.l #__init_end, %a2
415 /* copy the code to RAM */
417 move.l (%a1)+, (%a3)+
422 * We are done. Do not return, instead branch to second part of board
423 * initialization, now running from RAM.
426 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
433 * Now clear BSS segment
436 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
438 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
445 * fix got table in RAM
448 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
449 move.l %a1,%a5 /* fix got pointer register a5 */
452 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
462 /* calculate relative jump to board_init_r in ram */
464 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
466 /* set parameters for board_init_r */
467 move.l %a0,-(%sp) /* dest_addr */
468 move.l %d0,-(%sp) /* gd */
471 /******************************************************************************/
494 /******************************************************************************/
496 .globl version_string
498 .ascii U_BOOT_VERSION_STRING, "\0"