1 # SPDX-License-Identifier: GPL-2.0
2 comment "Processor Type"
5 prompt "CPU family support"
6 default M68KCLASSIC if MMU
7 default COLDFIRE if !MMU
9 The Freescale (was Motorola) M68K family of processors implements
10 the full 68000 processor instruction set.
11 The Freescale ColdFire family of processors is a modern derivative
12 of the 68000 processor family. They are mainly targeted at embedded
13 applications, and are all System-On-Chip (SOC) devices, as opposed
14 to stand alone CPUs. They implement a subset of the original 68000
15 processor instruction set.
16 If you anticipate running this kernel on a computer with a classic
17 MC68xxx processor, select M68KCLASSIC.
18 If you anticipate running this kernel on a computer with a ColdFire
19 processor, select COLDFIRE.
22 bool "Classic M68K CPU family support"
23 select HAVE_ARCH_PFN_VALID
26 bool "Coldfire CPU family support"
27 select ARCH_HAVE_CUSTOM_GPIO_H
28 select CPU_HAS_NO_BITFIELDS
30 select CPU_HAS_NO_MULDIV64
33 select HAVE_LEGACY_CLK
42 select CPU_HAS_NO_BITFIELDS
44 select CPU_HAS_NO_MULDIV64
45 select CPU_HAS_NO_UNALIGNED
47 select CPU_NO_EFFICIENT_FFS
50 The Freescale (was Motorola) 68000 CPU is the first generation of
51 the well known M68K family of processors. The CPU core as well as
52 being available as a stand alone CPU was also used in many
53 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
60 select CPU_HAS_ADDRESS_SPACES
62 If you anticipate running this kernel on a computer with a MC68020
63 processor, say Y. Otherwise, say N. Note that the 68020 requires a
64 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
65 Sun 3, which provides its own version.
69 depends on MMU && !MMU_SUN3
71 select CPU_HAS_ADDRESS_SPACES
73 If you anticipate running this kernel on a computer with a MC68030
74 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
75 work, as it does not include an MMU (Memory Management Unit).
79 depends on MMU && !MMU_SUN3
81 select CPU_HAS_ADDRESS_SPACES
83 If you anticipate running this kernel on a computer with a MC68LC040
84 or MC68040 processor, say Y. Otherwise, say N. Note that an
85 MC68EC040 will not work, as it does not include an MMU (Memory
90 depends on MMU && !MMU_SUN3
92 select CPU_HAS_ADDRESS_SPACES
94 If you anticipate running this kernel on a computer with a MC68060
95 processor, say Y. Otherwise, say N.
100 select LEGACY_TIMER_TICK
103 Motorola 68328 processor support.
108 select LEGACY_TIMER_TICK
111 Motorola 68EX328 processor support.
116 select LEGACY_TIMER_TICK
119 Motorola 68VZ328 processor support.
126 prompt "ColdFire SoC type"
129 Select the type of ColdFire System-on-Chip (SoC) that you want
135 select COLDFIRE_SW_A7
136 select COLDFIRE_TIMERS
138 select CPU_NO_EFFICIENT_FFS
140 Motorola ColdFire 5206 processor support.
145 select COLDFIRE_SW_A7
146 select COLDFIRE_TIMERS
148 select CPU_NO_EFFICIENT_FFS
150 Motorola ColdFire 5206e processor support.
155 select COLDFIRE_PIT_TIMER
156 select HAVE_CACHE_SPLIT
158 Freescale Coldfire 5207/5208 processor support.
163 select COLDFIRE_PIT_TIMER
164 select HAVE_CACHE_SPLIT
167 Freescale Coldfire 5230/1/2/4/5 processor support
172 select COLDFIRE_SW_A7
173 select COLDFIRE_TIMERS
175 select CPU_NO_EFFICIENT_FFS
177 Motorola ColdFire 5249 processor support.
182 select COLDFIRE_SW_A7
183 select COLDFIRE_TIMERS
185 select CPU_NO_EFFICIENT_FFS
187 Freescale (Motorola) Coldfire 5251/5253 processor support.
192 select COLDFIRE_PIT_TIMER
194 select HAVE_CACHE_SPLIT
197 Freescale (Motorola) ColdFire 5270/5271 processor support.
202 select COLDFIRE_SW_A7
203 select COLDFIRE_TIMERS
205 select CPU_NO_EFFICIENT_FFS
207 Motorola ColdFire 5272 processor support.
212 select COLDFIRE_PIT_TIMER
214 select HAVE_CACHE_SPLIT
217 Freescale (Motorola) ColdFire 5274/5275 processor support.
222 select COLDFIRE_PIT_TIMER
223 select HAVE_CACHE_SPLIT
226 Motorola ColdFire 5280/5282 processor support.
231 select COLDFIRE_TIMERS
232 select COLDFIRE_SW_A7
235 select CPU_NO_EFFICIENT_FFS
237 Motorola ColdFire 5307 processor support.
242 select COLDFIRE_TIMERS
246 Freescale (Motorola) ColdFire 532x processor support.
251 select COLDFIRE_TIMERS
255 Freescale ColdFire 537x processor support.
260 select COLDFIRE_SW_A7
261 select COLDFIRE_TIMERS
264 select CPU_NO_EFFICIENT_FFS
266 Motorola ColdFire 5407 processor support.
271 select COLDFIRE_SLTIMERS
272 select MMU_COLDFIRE if MMU
276 select CPU_NO_EFFICIENT_FFS
278 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
282 select COLDFIRE_SLTIMERS
283 select MMU_COLDFIRE if MMU
288 select CPU_NO_EFFICIENT_FFS
290 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
294 select COLDFIRE_PIT_TIMER
295 select MMU_COLDFIRE if MMU
298 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
312 config COLDFIRE_PIT_TIMER
315 config COLDFIRE_TIMERS
317 select LEGACY_TIMER_TICK
319 config COLDFIRE_SLTIMERS
321 select LEGACY_TIMER_TICK
326 comment "Processor Specific Options"
329 bool "Math emulation support"
330 depends on M68KCLASSIC && FPU
332 At some point in the future, this will cause floating-point math
333 instructions to be emulated by the kernel on machines that lack a
334 floating-point math coprocessor. Thrill-seekers and chronically
335 sleep-deprived psychotic hacker types can say Y now, everyone else
336 should probably wait a while.
338 config M68KFPU_EMU_EXTRAPREC
339 bool "Math emulation extra precision"
340 depends on M68KFPU_EMU
342 The fpu uses normally a few bit more during calculations for
343 correct rounding, the emulator can (often) do the same but this
344 extra calculation can cost quite some time, so you can disable
345 it here. The emulator will then "only" calculate with a 64 bit
346 mantissa and round slightly incorrect, what is more than enough
349 config M68KFPU_EMU_ONLY
350 bool "Math emulation only kernel"
351 depends on M68KFPU_EMU
353 This option prevents any floating-point instructions from being
354 compiled into the kernel, thereby the kernel doesn't save any
355 floating point context anymore during task switches, so this
356 kernel will only be usable on machines without a floating-point
357 math coprocessor. This makes the kernel a bit faster as no tests
358 needs to be executed whether a floating-point instruction in the
359 kernel should be executed or not.
362 bool "Advanced configuration options"
365 This gives you access to some advanced options for the CPU. The
366 defaults should be fine for most users, but these options may make
367 it possible for you to improve performance somewhat if you know what
370 Note that the answer to this question won't directly affect the
371 kernel: saying N will just cause the configurator to skip all
372 the questions about these options.
374 Most users should say N to this question.
377 bool "Use read-modify-write instructions"
378 depends on ADVANCED && !CPU_HAS_NO_CAS
380 This allows to use certain instructions that work with indivisible
381 read-modify-write bus cycles. While this is faster than the
382 workaround of disabling interrupts, it can conflict with DMA
383 ( = direct memory access) on many Amiga systems, and it is also said
384 to destabilize other machines. It is very likely that this will
385 cause serious problems on any Amiga or Atari Medusa if set. The only
386 configuration where it should work are 68030-based Ataris, where it
387 apparently improves performance. But you've been warned! Unless you
388 really know what you are doing, say N. Try Y only if you're quite
391 config SINGLE_MEMORY_CHUNK
392 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
394 default y if SUN3 || MMU_COLDFIRE
396 Ignore all but the first contiguous chunk of physical memory for VM
397 purposes. This will save a few bytes kernel size and may speed up
399 When this option os set to N, you may want to lower "Maximum zone
400 order" to save memory that could be wasted for unused memory map.
403 config FORCE_MAX_ZONEORDER
404 int "Maximum zone order" if ADVANCED
405 depends on !SINGLE_MEMORY_CHUNK
408 The kernel memory allocator divides physically contiguous memory
409 blocks into "zones", where each zone is a power of two number of
410 pages. This option selects the largest power of two that the kernel
411 keeps in the memory allocator. If you need to allocate very large
412 blocks of physically contiguous memory, then you may need to
415 For systems that have holes in their physical address space this
416 value also defines the minimal size of the hole that allows
417 freeing unused memory map.
419 This config option is actually maximum order plus one. For example,
420 a value of 11 means that the largest free memory block is 2^10 pages.
422 config 060_WRITETHROUGH
423 bool "Use write-through caching for 68060 supervisor accesses"
424 depends on ADVANCED && M68060
426 The 68060 generally uses copyback caching of recently accessed data.
427 Copyback caching means that memory writes will be held in an on-chip
428 cache and only written back to memory some time later. Saying Y
429 here will force supervisor (kernel) accesses to use writethrough
430 caching. Writethrough caching means that data is written to memory
431 straight away, so that cache and memory data always agree.
432 Writethrough caching is less efficient, but is needed for some
433 drivers on 68060 based systems where the 68060 bus snooping signal
434 is hardwired on. The 53c710 SCSI driver is known to suffer from
442 config CPU_HAS_NO_BITFIELDS
445 config CPU_HAS_NO_CAS
448 config CPU_HAS_NO_MULDIV64
451 config CPU_HAS_NO_UNALIGNED
454 config CPU_HAS_ADDRESS_SPACES
456 select ALTERNATE_USER_ADDRESS_SPACE
461 config COLDFIRE_SW_A7
464 config HAVE_CACHE_SPLIT
477 int "Set the core clock frequency"
478 default "25000000" if M5206
479 default "54000000" if M5206e
480 default "166666666" if M520x
481 default "140000000" if M5249
482 default "150000000" if M527x || M523x
483 default "90000000" if M5307
484 default "50000000" if M5407
485 default "266000000" if M54xx
489 Define the CPU clock frequency in use. This is the core clock
490 frequency, it may or may not be the same as the external clock
491 crystal fitted to your board. Some processors have an internal
492 PLL and can have their frequency programmed at run time, others
493 use internal dividers. In general the kernel won't setup a PLL
494 if it is fitted (there are some exceptions). This value will be
495 specific to the exact CPU that you are using.
498 bool "Old mask 5307 (1H55J) silicon"
501 Build support for the older revision ColdFire 5307 silicon.
502 Specifically this is the 1H55J mask revision.
506 prompt "Split Cache Configuration"
512 Use all of the ColdFire CPU cache memory as an instruction cache.
517 Use all of the ColdFire CPU cache memory as a data cache.
522 Split the ColdFire CPU cache, and use half as an instruction cache
523 and half as a data cache.
529 prompt "Data cache mode"
530 default CACHE_WRITETHRU
532 config CACHE_WRITETHRU
535 The ColdFire CPU cache is set into Write-through mode.
537 config CACHE_COPYBACK
540 The ColdFire CPU cache is set into Copy-back mode.