1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
6 * Copyright (C) 2000, 2001 Kanoj Sarcar
7 * Copyright (C) 2000, 2001 Ralf Baechle
8 * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
9 * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
11 #include <linux/cpu.h>
12 #include <linux/cpumask.h>
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/seq_file.h>
16 #include <linux/smp.h>
17 #include <linux/threads.h>
18 #include <linux/export.h>
19 #include <linux/time.h>
20 #include <linux/tracepoint.h>
21 #include <linux/sched/hotplug.h>
22 #include <linux/sched/task_stack.h>
26 #include <asm/loongson.h>
27 #include <asm/mmu_context.h>
29 #include <asm/processor.h>
30 #include <asm/setup.h>
33 int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
34 EXPORT_SYMBOL(__cpu_number_map);
36 int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
37 EXPORT_SYMBOL(__cpu_logical_map);
39 /* Number of threads (siblings) per CPU core */
40 int smp_num_siblings = 1;
41 EXPORT_SYMBOL(smp_num_siblings);
43 /* Representing the threads (siblings) of each logical CPU */
44 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
45 EXPORT_SYMBOL(cpu_sibling_map);
47 /* Representing the core map of multi-core chips of each logical CPU */
48 cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
49 EXPORT_SYMBOL(cpu_core_map);
51 static DECLARE_COMPLETION(cpu_starting);
52 static DECLARE_COMPLETION(cpu_running);
55 * A logcal cpu mask containing only one VPE per core to
56 * reduce the number of IPIs on large MT systems.
58 cpumask_t cpu_foreign_map[NR_CPUS] __read_mostly;
59 EXPORT_SYMBOL(cpu_foreign_map);
61 /* representing cpus for which sibling maps can be computed */
62 static cpumask_t cpu_sibling_setup_map;
64 /* representing cpus for which core maps can be computed */
65 static cpumask_t cpu_core_setup_map;
67 struct secondary_data cpuboot_data;
68 static DEFINE_PER_CPU(int, cpu_state);
75 static const char *ipi_types[NR_IPI] __tracepoint_string = {
76 [IPI_RESCHEDULE] = "Rescheduling interrupts",
77 [IPI_CALL_FUNCTION] = "Function call interrupts",
80 void show_ipi_list(struct seq_file *p, int prec)
84 for (i = 0; i < NR_IPI; i++) {
85 seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i, prec >= 4 ? " " : "");
86 for_each_online_cpu(cpu)
87 seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).ipi_irqs[i]);
88 seq_printf(p, " LoongArch %d %s\n", i + 1, ipi_types[i]);
92 /* Send mailbox buffer via Mail_Send */
93 static void csr_mail_send(uint64_t data, int cpu, int mailbox)
97 /* Send high 32 bits */
98 val = IOCSR_MBUF_SEND_BLOCKING;
99 val |= (IOCSR_MBUF_SEND_BOX_HI(mailbox) << IOCSR_MBUF_SEND_BOX_SHIFT);
100 val |= (cpu << IOCSR_MBUF_SEND_CPU_SHIFT);
101 val |= (data & IOCSR_MBUF_SEND_H32_MASK);
102 iocsr_write64(val, LOONGARCH_IOCSR_MBUF_SEND);
104 /* Send low 32 bits */
105 val = IOCSR_MBUF_SEND_BLOCKING;
106 val |= (IOCSR_MBUF_SEND_BOX_LO(mailbox) << IOCSR_MBUF_SEND_BOX_SHIFT);
107 val |= (cpu << IOCSR_MBUF_SEND_CPU_SHIFT);
108 val |= (data << IOCSR_MBUF_SEND_BUF_SHIFT);
109 iocsr_write64(val, LOONGARCH_IOCSR_MBUF_SEND);
112 static u32 ipi_read_clear(int cpu)
116 /* Load the ipi register to figure out what we're supposed to do */
117 action = iocsr_read32(LOONGARCH_IOCSR_IPI_STATUS);
118 /* Clear the ipi register to clear the interrupt */
119 iocsr_write32(action, LOONGARCH_IOCSR_IPI_CLEAR);
125 static void ipi_write_action(int cpu, u32 action)
127 unsigned int irq = 0;
129 while ((irq = ffs(action))) {
130 uint32_t val = IOCSR_IPI_SEND_BLOCKING;
133 val |= (cpu << IOCSR_IPI_SEND_CPU_SHIFT);
134 iocsr_write32(val, LOONGARCH_IOCSR_IPI_SEND);
135 action &= ~BIT(irq - 1);
139 void loongson3_send_ipi_single(int cpu, unsigned int action)
141 ipi_write_action(cpu_logical_map(cpu), (u32)action);
144 void loongson3_send_ipi_mask(const struct cpumask *mask, unsigned int action)
148 for_each_cpu(i, mask)
149 ipi_write_action(cpu_logical_map(i), (u32)action);
152 irqreturn_t loongson3_ipi_interrupt(int irq, void *dev)
155 unsigned int cpu = smp_processor_id();
157 action = ipi_read_clear(cpu_logical_map(cpu));
159 if (action & SMP_RESCHEDULE) {
161 per_cpu(irq_stat, cpu).ipi_irqs[IPI_RESCHEDULE]++;
164 if (action & SMP_CALL_FUNCTION) {
165 generic_smp_call_function_interrupt();
166 per_cpu(irq_stat, cpu).ipi_irqs[IPI_CALL_FUNCTION]++;
172 void __init loongson3_smp_setup(void)
174 cpu_data[0].core = cpu_logical_map(0) % loongson_sysconf.cores_per_package;
175 cpu_data[0].package = cpu_logical_map(0) / loongson_sysconf.cores_per_package;
177 iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_EN);
178 pr_info("Detected %i available CPU(s)\n", loongson_sysconf.nr_cpus);
181 void __init loongson3_prepare_cpus(unsigned int max_cpus)
185 for (i = 0; i < loongson_sysconf.nr_cpus; i++) {
186 set_cpu_present(i, true);
187 csr_mail_send(0, __cpu_logical_map[i], 0);
190 per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
194 * Setup the PC, SP, and TP of a secondary processor and start it running!
196 void loongson3_boot_secondary(int cpu, struct task_struct *idle)
200 pr_info("Booting CPU#%d...\n", cpu);
202 entry = __pa_symbol((unsigned long)&smpboot_entry);
203 cpuboot_data.stack = (unsigned long)__KSTK_TOS(idle);
204 cpuboot_data.thread_info = (unsigned long)task_thread_info(idle);
206 csr_mail_send(entry, cpu_logical_map(cpu), 0);
208 loongson3_send_ipi_single(cpu, SMP_BOOT_CPU);
212 * SMP init and finish on secondary CPUs
214 void loongson3_init_secondary(void)
216 unsigned int cpu = smp_processor_id();
217 unsigned int imask = ECFGF_IP0 | ECFGF_IP1 | ECFGF_IP2 |
218 ECFGF_IPI | ECFGF_PMC | ECFGF_TIMER;
220 change_csr_ecfg(ECFG0_IM, imask);
222 iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_EN);
227 per_cpu(cpu_state, cpu) = CPU_ONLINE;
229 cpu_logical_map(cpu) % loongson_sysconf.cores_per_package;
230 cpu_data[cpu].package =
231 cpu_logical_map(cpu) / loongson_sysconf.cores_per_package;
234 void loongson3_smp_finish(void)
237 iocsr_write64(0, LOONGARCH_IOCSR_MBUF0);
238 pr_info("CPU#%d finished\n", smp_processor_id());
241 #ifdef CONFIG_HOTPLUG_CPU
243 static bool io_master(int cpu)
245 return test_bit(cpu, &loongson_sysconf.cores_io_master);
248 int loongson3_cpu_disable(void)
251 unsigned int cpu = smp_processor_id();
257 numa_remove_cpu(cpu);
259 set_cpu_online(cpu, false);
260 calculate_cpu_foreign_map();
261 local_irq_save(flags);
262 irq_migrate_all_off_this_cpu();
263 clear_csr_ecfg(ECFG0_IM);
264 local_irq_restore(flags);
265 local_flush_tlb_all();
270 void loongson3_cpu_die(unsigned int cpu)
272 while (per_cpu(cpu_state, cpu) != CPU_DEAD)
280 register uint64_t addr;
281 register void (*init_fn)(void);
285 set_csr_ecfg(ECFGF_IPI);
286 __this_cpu_write(cpu_state, CPU_DEAD);
290 __asm__ __volatile__("idle 0\n\t");
291 addr = iocsr_read64(LOONGARCH_IOCSR_MBUF0);
294 init_fn = (void *)TO_CACHE(addr);
295 iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_CLEAR);
308 static int loongson3_ipi_suspend(void)
313 static void loongson3_ipi_resume(void)
315 iocsr_write32(0xffffffff, LOONGARCH_IOCSR_IPI_EN);
318 static struct syscore_ops loongson3_ipi_syscore_ops = {
319 .resume = loongson3_ipi_resume,
320 .suspend = loongson3_ipi_suspend,
324 * Enable boot cpu ipi before enabling nonboot cpus
325 * during syscore_resume.
327 static int __init ipi_pm_init(void)
329 register_syscore_ops(&loongson3_ipi_syscore_ops);
333 core_initcall(ipi_pm_init);
336 static inline void set_cpu_sibling_map(int cpu)
340 cpumask_set_cpu(cpu, &cpu_sibling_setup_map);
342 if (smp_num_siblings <= 1)
343 cpumask_set_cpu(cpu, &cpu_sibling_map[cpu]);
345 for_each_cpu(i, &cpu_sibling_setup_map) {
346 if (cpus_are_siblings(cpu, i)) {
347 cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
348 cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
354 static inline void set_cpu_core_map(int cpu)
358 cpumask_set_cpu(cpu, &cpu_core_setup_map);
360 for_each_cpu(i, &cpu_core_setup_map) {
361 if (cpu_data[cpu].package == cpu_data[i].package) {
362 cpumask_set_cpu(i, &cpu_core_map[cpu]);
363 cpumask_set_cpu(cpu, &cpu_core_map[i]);
369 * Calculate a new cpu_foreign_map mask whenever a
370 * new cpu appears or disappears.
372 void calculate_cpu_foreign_map(void)
374 int i, k, core_present;
375 cpumask_t temp_foreign_map;
377 /* Re-calculate the mask */
378 cpumask_clear(&temp_foreign_map);
379 for_each_online_cpu(i) {
381 for_each_cpu(k, &temp_foreign_map)
382 if (cpus_are_siblings(i, k))
385 cpumask_set_cpu(i, &temp_foreign_map);
388 for_each_online_cpu(i)
389 cpumask_andnot(&cpu_foreign_map[i],
390 &temp_foreign_map, &cpu_sibling_map[i]);
393 /* Preload SMP state for boot cpu */
394 void smp_prepare_boot_cpu(void)
396 unsigned int cpu, node, rr_node;
398 set_cpu_possible(0, true);
399 set_cpu_online(0, true);
400 set_my_cpu_offset(per_cpu_offset(0));
402 rr_node = first_node(node_online_map);
403 for_each_possible_cpu(cpu) {
404 node = early_cpu_to_node(cpu);
407 * The mapping between present cpus and nodes has been
408 * built during MADT and SRAT parsing.
410 * If possible cpus = present cpus here, early_cpu_to_node
411 * will return valid node.
413 * If possible cpus > present cpus here (e.g. some possible
414 * cpus will be added by cpu-hotplug later), for possible but
415 * not present cpus, early_cpu_to_node will return NUMA_NO_NODE,
416 * and we just map them to online nodes in round-robin way.
417 * Once hotplugged, new correct mapping will be built for them.
419 if (node != NUMA_NO_NODE)
420 set_cpu_numa_node(cpu, node);
422 set_cpu_numa_node(cpu, rr_node);
423 rr_node = next_node_in(rr_node, node_online_map);
428 /* called from main before smp_init() */
429 void __init smp_prepare_cpus(unsigned int max_cpus)
431 init_new_context(current, &init_mm);
432 current_thread_info()->cpu = 0;
433 loongson3_prepare_cpus(max_cpus);
434 set_cpu_sibling_map(0);
436 calculate_cpu_foreign_map();
437 #ifndef CONFIG_HOTPLUG_CPU
438 init_cpu_present(cpu_possible_mask);
442 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
444 loongson3_boot_secondary(cpu, tidle);
446 /* Wait for CPU to start and be ready to sync counters */
447 if (!wait_for_completion_timeout(&cpu_starting,
448 msecs_to_jiffies(5000))) {
449 pr_crit("CPU%u: failed to start\n", cpu);
453 /* Wait for CPU to finish startup & mark itself online before return */
454 wait_for_completion(&cpu_running);
460 * First C code run on the secondary CPUs after being started up by
463 asmlinkage void start_secondary(void)
468 cpu = smp_processor_id();
469 set_my_cpu_offset(per_cpu_offset(cpu));
472 constant_clockevent_init();
473 loongson3_init_secondary();
475 set_cpu_sibling_map(cpu);
476 set_cpu_core_map(cpu);
478 notify_cpu_starting(cpu);
480 /* Notify boot CPU that we're starting */
481 complete(&cpu_starting);
483 /* The CPU is running, now mark it online */
484 set_cpu_online(cpu, true);
486 calculate_cpu_foreign_map();
489 * Notify boot CPU that we're up & online and it can safely return
492 complete(&cpu_running);
495 * irq will be enabled in loongson3_smp_finish(), enabling it too
496 * early is dangerous.
498 WARN_ON_ONCE(!irqs_disabled());
499 loongson3_smp_finish();
501 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
504 void __init smp_cpus_done(unsigned int max_cpus)
508 static void stop_this_cpu(void *dummy)
510 set_cpu_online(smp_processor_id(), false);
511 calculate_cpu_foreign_map();
516 void smp_send_stop(void)
518 smp_call_function(stop_this_cpu, NULL, 0);
521 int setup_profiling_timer(unsigned int multiplier)
526 static void flush_tlb_all_ipi(void *info)
528 local_flush_tlb_all();
531 void flush_tlb_all(void)
533 on_each_cpu(flush_tlb_all_ipi, NULL, 1);
536 static void flush_tlb_mm_ipi(void *mm)
538 local_flush_tlb_mm((struct mm_struct *)mm);
541 void flush_tlb_mm(struct mm_struct *mm)
543 if (atomic_read(&mm->mm_users) == 0)
544 return; /* happens as a result of exit_mmap() */
548 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
549 on_each_cpu_mask(mm_cpumask(mm), flush_tlb_mm_ipi, mm, 1);
553 for_each_online_cpu(cpu) {
554 if (cpu != smp_processor_id() && cpu_context(cpu, mm))
555 cpu_context(cpu, mm) = 0;
557 local_flush_tlb_mm(mm);
563 struct flush_tlb_data {
564 struct vm_area_struct *vma;
569 static void flush_tlb_range_ipi(void *info)
571 struct flush_tlb_data *fd = info;
573 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
576 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
578 struct mm_struct *mm = vma->vm_mm;
581 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
582 struct flush_tlb_data fd = {
588 on_each_cpu_mask(mm_cpumask(mm), flush_tlb_range_ipi, &fd, 1);
592 for_each_online_cpu(cpu) {
593 if (cpu != smp_processor_id() && cpu_context(cpu, mm))
594 cpu_context(cpu, mm) = 0;
596 local_flush_tlb_range(vma, start, end);
601 static void flush_tlb_kernel_range_ipi(void *info)
603 struct flush_tlb_data *fd = info;
605 local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
608 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
610 struct flush_tlb_data fd = {
615 on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
618 static void flush_tlb_page_ipi(void *info)
620 struct flush_tlb_data *fd = info;
622 local_flush_tlb_page(fd->vma, fd->addr1);
625 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
628 if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
629 struct flush_tlb_data fd = {
634 on_each_cpu_mask(mm_cpumask(vma->vm_mm), flush_tlb_page_ipi, &fd, 1);
638 for_each_online_cpu(cpu) {
639 if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
640 cpu_context(cpu, vma->vm_mm) = 0;
642 local_flush_tlb_page(vma, page);
646 EXPORT_SYMBOL(flush_tlb_page);
648 static void flush_tlb_one_ipi(void *info)
650 unsigned long vaddr = (unsigned long) info;
652 local_flush_tlb_one(vaddr);
655 void flush_tlb_one(unsigned long vaddr)
657 on_each_cpu(flush_tlb_one_ipi, (void *)vaddr, 1);
659 EXPORT_SYMBOL(flush_tlb_one);