1 # SPDX-License-Identifier: GPL-2.0
6 select ACPI_GENERIC_GSI if ACPI
7 select ACPI_MCFG if ACPI
8 select ACPI_PPTT if ACPI
9 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
10 select ARCH_BINFMT_ELF_STATE
11 select ARCH_ENABLE_MEMORY_HOTPLUG
12 select ARCH_ENABLE_MEMORY_HOTREMOVE
13 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
14 select ARCH_HAS_CPU_FINALIZE_INIT
15 select ARCH_HAS_FORTIFY_SOURCE
16 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
17 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
18 select ARCH_HAS_PTE_SPECIAL
19 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
20 select ARCH_INLINE_READ_LOCK if !PREEMPTION
21 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
22 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
23 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
24 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
25 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
26 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
27 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
28 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
29 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
30 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
31 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
32 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
33 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
34 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
35 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
36 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
37 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
38 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
39 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
40 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
41 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
42 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
43 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
44 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
45 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
46 select ARCH_KEEP_MEMBLOCK
47 select ARCH_MIGHT_HAVE_PC_PARPORT
48 select ARCH_MIGHT_HAVE_PC_SERIO
49 select ARCH_SPARSEMEM_ENABLE
51 select ARCH_SUPPORTS_ACPI
52 select ARCH_SUPPORTS_ATOMIC_RMW
53 select ARCH_SUPPORTS_HUGETLBFS
54 select ARCH_SUPPORTS_LTO_CLANG
55 select ARCH_SUPPORTS_LTO_CLANG_THIN
56 select ARCH_SUPPORTS_NUMA_BALANCING
57 select ARCH_USE_BUILTIN_BSWAP
58 select ARCH_USE_CMPXCHG_LOCKREF
59 select ARCH_USE_QUEUED_RWLOCKS
60 select ARCH_USE_QUEUED_SPINLOCKS
61 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
62 select ARCH_WANT_LD_ORPHAN_WARN
63 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEMMAP
64 select ARCH_WANTS_NO_INSTR
65 select BUILDTIME_TABLE_SORT
69 select GENERIC_CLOCKEVENTS
70 select GENERIC_CMOS_UPDATE
71 select GENERIC_CPU_AUTOPROBE
73 select GENERIC_GETTIMEOFDAY
74 select GENERIC_IOREMAP if !ARCH_IOREMAP
75 select GENERIC_IRQ_MULTI_HANDLER
76 select GENERIC_IRQ_PROBE
77 select GENERIC_IRQ_SHOW
78 select GENERIC_LIB_ASHLDI3
79 select GENERIC_LIB_ASHRDI3
80 select GENERIC_LIB_CMPDI2
81 select GENERIC_LIB_LSHRDI3
82 select GENERIC_LIB_UCMPDI2
83 select GENERIC_LIB_DEVMEM_IS_ALLOWED
84 select GENERIC_PCI_IOMAP
85 select GENERIC_SCHED_CLOCK
86 select GENERIC_SMP_IDLE_THREAD
87 select GENERIC_TIME_VSYSCALL
88 select GENERIC_VDSO_TIME_NS
91 select HAVE_ARCH_AUDITSYSCALL
92 select HAVE_ARCH_JUMP_LABEL
93 select HAVE_ARCH_JUMP_LABEL_RELATIVE
94 select HAVE_ARCH_MMAP_RND_BITS if MMU
95 select HAVE_ARCH_SECCOMP_FILTER
96 select HAVE_ARCH_TRACEHOOK
97 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
98 select HAVE_ASM_MODVERSIONS
99 select HAVE_CONTEXT_TRACKING_USER
100 select HAVE_C_RECORDMCOUNT
101 select HAVE_DEBUG_KMEMLEAK
102 select HAVE_DEBUG_STACKOVERFLOW
103 select HAVE_DMA_CONTIGUOUS
104 select HAVE_DYNAMIC_FTRACE
105 select HAVE_DYNAMIC_FTRACE_WITH_ARGS
106 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
107 select HAVE_DYNAMIC_FTRACE_WITH_REGS
109 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN
110 select HAVE_EXIT_THREAD
112 select HAVE_FTRACE_MCOUNT_RECORD
113 select HAVE_FUNCTION_ARG_ACCESS_API
114 select HAVE_FUNCTION_ERROR_INJECTION
115 select HAVE_FUNCTION_GRAPH_RETVAL if HAVE_FUNCTION_GRAPH_TRACER
116 select HAVE_FUNCTION_GRAPH_TRACER
117 select HAVE_FUNCTION_TRACER
118 select HAVE_GENERIC_VDSO
119 select HAVE_HW_BREAKPOINT if PERF_EVENTS
120 select HAVE_IOREMAP_PROT
121 select HAVE_IRQ_EXIT_ON_IRQ_STACK
122 select HAVE_IRQ_TIME_ACCOUNTING
124 select HAVE_KPROBES_ON_FTRACE
125 select HAVE_KRETPROBES
126 select HAVE_MOD_ARCH_SPECIFIC
129 select HAVE_PERF_EVENTS
130 select HAVE_PERF_REGS
131 select HAVE_PERF_USER_STACK_DUMP
132 select HAVE_REGS_AND_STACK_ACCESS_API
135 select HAVE_SAMPLE_FTRACE_DIRECT
136 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
137 select HAVE_SETUP_PER_CPU_AREA if NUMA
138 select HAVE_STACKPROTECTOR
139 select HAVE_SYSCALL_TRACEPOINTS
141 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP
142 select IRQ_FORCED_THREADING
143 select IRQ_LOONGARCH_CPU
144 select LOCK_MM_AND_FIND_VMA
145 select MMU_GATHER_MERGE_VMAS if MMU
146 select MODULES_USE_ELF_RELA if MODULES
147 select NEED_PER_CPU_EMBED_FIRST_CHUNK
148 select NEED_PER_CPU_PAGE_FIRST_CHUNK
150 select OF_EARLY_FLATTREE
152 select PCI_DOMAINS_GENERIC
153 select PCI_ECAM if ACPI
155 select PCI_MSI_ARCH_FALLBACKS
157 select PERF_USE_VMALLOC
161 select SYSCTL_ARCH_UNALIGN_ALLOW
162 select SYSCTL_ARCH_UNALIGN_NO_WARN
163 select SYSCTL_EXCEPTION_TRACE
165 select TRACE_IRQFLAGS_SUPPORT
166 select USE_PERCPU_NUMA_NODE_ID
167 select USER_STACKTRACE_SUPPORT
180 config GENERIC_BUG_RELATIVE_POINTERS
182 depends on GENERIC_BUG
184 config GENERIC_CALIBRATE_DELAY
190 config GENERIC_HWEIGHT
193 config L1_CACHE_SHIFT
197 config LOCKDEP_SUPPORT
201 config STACKTRACE_SUPPORT
205 # MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the
206 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
207 # are shared between architectures, and specifically expecting the symbols.
208 config MACH_LOONGSON32
211 config MACH_LOONGSON64
214 config FIX_EARLYCON_MEM
220 config PAGE_SIZE_16KB
223 config PAGE_SIZE_64KB
226 config PGTABLE_2LEVEL
229 config PGTABLE_3LEVEL
232 config PGTABLE_4LEVEL
235 config PGTABLE_LEVELS
237 default 2 if PGTABLE_2LEVEL
238 default 3 if PGTABLE_3LEVEL
239 default 4 if PGTABLE_4LEVEL
241 config SCHED_OMIT_FRAME_POINTER
245 config AS_HAS_EXPLICIT_RELOCS
246 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
248 config AS_HAS_FCSR_CLASS
249 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
251 config AS_HAS_LSX_EXTENSION
252 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
254 config AS_HAS_LASX_EXTENSION
255 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
257 menu "Kernel type and options"
259 source "kernel/Kconfig.hz"
262 prompt "Page Table Layout"
263 default 16KB_2LEVEL if 32BIT
264 default 16KB_3LEVEL if 64BIT
266 Allows choosing the page table layout, which is a combination
267 of page size and page table levels. The size of virtual memory
268 address space are determined by the page table layout.
271 bool "4KB with 3 levels"
273 select PGTABLE_3LEVEL
275 This option selects 4KB page size with 3 level page tables, which
276 support a maximum of 39 bits of application virtual memory.
279 bool "4KB with 4 levels"
281 select PGTABLE_4LEVEL
283 This option selects 4KB page size with 4 level page tables, which
284 support a maximum of 48 bits of application virtual memory.
287 bool "16KB with 2 levels"
288 select PAGE_SIZE_16KB
289 select PGTABLE_2LEVEL
291 This option selects 16KB page size with 2 level page tables, which
292 support a maximum of 36 bits of application virtual memory.
295 bool "16KB with 3 levels"
296 select PAGE_SIZE_16KB
297 select PGTABLE_3LEVEL
299 This option selects 16KB page size with 3 level page tables, which
300 support a maximum of 47 bits of application virtual memory.
303 bool "64KB with 2 levels"
304 select PAGE_SIZE_64KB
305 select PGTABLE_2LEVEL
307 This option selects 64KB page size with 2 level page tables, which
308 support a maximum of 42 bits of application virtual memory.
311 bool "64KB with 3 levels"
312 select PAGE_SIZE_64KB
313 select PGTABLE_3LEVEL
315 This option selects 64KB page size with 3 level page tables, which
316 support a maximum of 55 bits of application virtual memory.
321 string "Built-in kernel command line"
323 For most platforms, the arguments for the kernel's command line
324 are provided at run-time, during boot. However, there are cases
325 where either no arguments are being provided or the provided
326 arguments are insufficient or even invalid.
328 When that occurs, it is possible to define a built-in command
329 line here and choose how the kernel should use it later on.
332 prompt "Kernel command line type"
333 default CMDLINE_BOOTLOADER
335 Choose how the kernel will handle the provided built-in command
338 config CMDLINE_BOOTLOADER
339 bool "Use bootloader kernel arguments if available"
341 Prefer the command-line passed by the boot loader if available.
342 Use the built-in command line as fallback in case we get nothing
343 during boot. This is the default behaviour.
345 config CMDLINE_EXTEND
346 bool "Use built-in to extend bootloader kernel arguments"
348 The command-line arguments provided during boot will be
349 appended to the built-in command line. This is useful in
350 cases where the provided arguments are insufficient and
351 you don't want to or cannot modify them.
354 bool "Always use the built-in kernel command string"
356 Always use the built-in command line, even if we get one during
357 boot. This is useful in case you need to override the provided
358 command line on systems where you don't have or want control
364 bool "Enable DMI scanning"
365 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
368 This enables SMBIOS/DMI feature for systems, and scanning of
369 DMI to identify machine quirks.
372 bool "EFI runtime service support"
374 select EFI_RUNTIME_WRAPPERS
376 This enables the kernel to use EFI runtime services that are
377 available (such as the EFI variable services).
380 bool "EFI boot stub support"
383 select EFI_GENERIC_STUB
385 This kernel feature allows the kernel to be loaded directly by
386 EFI firmware without the use of a bootloader.
389 bool "SMT scheduler support"
392 Improves scheduler's performance when there are multiple
393 threads in one physical core.
396 bool "Multi-Processing support"
398 This enables support for systems with more than one CPU. If you have
399 a system with only one CPU, say N. If you have a system with more
402 If you say N here, the kernel will run on uni- and multiprocessor
403 machines, but will use only one CPU of a multiprocessor machine. If
404 you say Y here, the kernel will run on many, but not all,
405 uniprocessor machines. On a uniprocessor machine, the kernel
406 will run faster if you say N here.
408 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
410 If you don't know what to do here, say N.
413 bool "Support for hot-pluggable CPUs"
415 select GENERIC_IRQ_MIGRATION
417 Say Y here to allow turning CPUs off and on. CPUs can be
418 controlled through /sys/devices/system/cpu.
419 (Note: power management support will enable this option
420 automatically on SMP systems. )
421 Say N if you want to disable CPU hotplug.
424 int "Maximum number of CPUs (2-256)"
429 This allows you to specify the maximum number of CPUs which this
435 select ACPI_NUMA if ACPI
437 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
438 support. This option improves performance on systems with more
439 than one NUMA node; on single node systems it is generally better
440 to leave it disabled.
447 config ARCH_FORCE_MAX_ORDER
448 int "Maximum zone order"
449 default "13" if PAGE_SIZE_64KB
450 default "11" if PAGE_SIZE_16KB
453 The kernel memory allocator divides physically contiguous memory
454 blocks into "zones", where each zone is a power of two number of
455 pages. This option selects the largest power of two that the kernel
456 keeps in the memory allocator. If you need to allocate very large
457 blocks of physically contiguous memory, then you may need to
460 The page size is not necessarily 4KB. Keep this in mind
461 when choosing a value for this option.
464 bool "Enable LoongArch DMW-based ioremap()"
466 We use generic TLB-based ioremap() by default since it has page
467 protection support. However, you can enable LoongArch DMW-based
468 ioremap() for better performance.
470 config ARCH_WRITECOMBINE
471 bool "Enable WriteCombine (WUC) for ioremap()"
473 LoongArch maintains cache coherency in hardware, but when paired
474 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
475 is similar to WriteCombine) is out of the scope of cache coherency
476 machanism for PCIe devices (this is a PCIe protocol violation, which
477 may be fixed in newer chipsets).
479 This means WUC can only used for write-only memory regions now, so
480 this option is disabled by default, making WUC silently fallback to
481 SUC for ioremap(). You can enable this option if the kernel is ensured
482 to run on hardware without this bug.
484 You can override this setting via writecombine=on/off boot parameter.
486 config ARCH_STRICT_ALIGN
487 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
490 Not all LoongArch cores support h/w unaligned access, we can use
491 -mstrict-align build parameter to prevent unaligned accesses.
493 CPUs with h/w unaligned access support:
494 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
496 CPUs without h/w unaligned access support:
497 Loongson-2K500/2K1000.
499 This option is enabled by default to make the kernel be able to run
500 on all LoongArch systems. But you can disable it manually if you want
501 to run kernel only on systems with h/w unaligned access support in
502 order to optimise for performance.
509 bool "Support for the Loongson SIMD Extension"
510 depends on AS_HAS_LSX_EXTENSION
512 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers
513 and a set of SIMD instructions to operate on them. When this option
514 is enabled the kernel will support allocating & switching LSX
515 vector register contexts. If you know that your kernel will only be
516 running on CPUs which do not support LSX or that your userland will
517 not be making use of it then you may wish to say N here to reduce
518 the size & complexity of your kernel.
523 bool "Support for the Loongson Advanced SIMD Extension"
524 depends on CPU_HAS_LSX
525 depends on AS_HAS_LASX_EXTENSION
527 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector
528 registers and a set of SIMD instructions to operate on them. When this
529 option is enabled the kernel will support allocating & switching LASX
530 vector register contexts. If you know that your kernel will only be
531 running on CPUs which do not support LASX or that your userland will
532 not be making use of it then you may wish to say N here to reduce
533 the size & complexity of your kernel.
537 config CPU_HAS_PREFETCH
541 config ARCH_SUPPORTS_KEXEC
544 config ARCH_SUPPORTS_CRASH_DUMP
547 config ARCH_SELECTS_CRASH_DUMP
549 depends on CRASH_DUMP
553 bool "Relocatable kernel"
555 This builds the kernel as a Position Independent Executable (PIE),
556 which retains all relocation metadata required, so as to relocate
557 the kernel binary at runtime to a different virtual address from
560 config RANDOMIZE_BASE
561 bool "Randomize the address of the kernel (KASLR)"
562 depends on RELOCATABLE
564 Randomizes the physical and virtual address at which the
565 kernel image is loaded, as a security feature that
566 deters exploit attempts relying on knowledge of the location
569 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
573 config RANDOMIZE_BASE_MAX_OFFSET
574 hex "Maximum KASLR offset" if EXPERT
575 depends on RANDOMIZE_BASE
579 When KASLR is active, this provides the maximum offset that will
580 be applied to the kernel image. It should be set according to the
581 amount of physical RAM available in the target system.
583 This is limited by the size of the lower address memory, 256MB.
586 bool "Enable seccomp to safely compute untrusted bytecode"
590 This kernel feature is useful for number crunching applications
591 that may need to compute untrusted bytecode during their
592 execution. By using pipes or other transports made available to
593 the process as file descriptors supporting the read/write
594 syscalls, it's possible to isolate those applications in
595 their own address space using seccomp. Once seccomp is
596 enabled via /proc/<pid>/seccomp, it cannot be disabled
597 and the task is only allowed to execute a few safe syscalls
598 defined by each seccomp mode.
600 If unsure, say Y. Only embedded should say N here.
604 config ARCH_SELECT_MEMORY_MODEL
607 config ARCH_FLATMEM_ENABLE
611 config ARCH_SPARSEMEM_ENABLE
613 select SPARSEMEM_VMEMMAP_ENABLE
615 Say Y to support efficient handling of sparse physical memory,
616 for architectures which are either NUMA (Non-Uniform Memory Access)
617 or have huge holes in the physical address space for other reasons.
618 See <file:Documentation/mm/numa.rst> for more.
620 config ARCH_ENABLE_THP_MIGRATION
622 depends on TRANSPARENT_HUGEPAGE
624 config ARCH_MEMORY_PROBE
626 depends on MEMORY_HOTPLUG
632 config ARCH_MMAP_RND_BITS_MIN
635 config ARCH_MMAP_RND_BITS_MAX
638 config ARCH_SUPPORTS_UPROBES
641 menu "Power management options"
643 config ARCH_SUSPEND_POSSIBLE
646 config ARCH_HIBERNATION_POSSIBLE
649 source "kernel/power/Kconfig"
650 source "drivers/acpi/Kconfig"