1 # SPDX-License-Identifier: GPL-2.0
6 select ACPI_GENERIC_GSI if ACPI
7 select ACPI_MCFG if ACPI
8 select ACPI_PPTT if ACPI
9 select ACPI_SYSTEM_POWER_STATES_SUPPORT if ACPI
10 select ARCH_BINFMT_ELF_STATE
11 select ARCH_ENABLE_MEMORY_HOTPLUG
12 select ARCH_ENABLE_MEMORY_HOTREMOVE
13 select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
14 select ARCH_HAS_FORTIFY_SOURCE
15 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
16 select ARCH_HAS_PTE_SPECIAL
17 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
18 select ARCH_INLINE_READ_LOCK if !PREEMPTION
19 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
20 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
21 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
22 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
23 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
24 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
25 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
26 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
27 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
28 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
29 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
30 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
31 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
32 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
33 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
34 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
35 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
36 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
37 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
38 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
39 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
40 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
41 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
42 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
43 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
44 select ARCH_KEEP_MEMBLOCK
45 select ARCH_MIGHT_HAVE_PC_PARPORT
46 select ARCH_MIGHT_HAVE_PC_SERIO
47 select ARCH_SPARSEMEM_ENABLE
49 select ARCH_SUPPORTS_ACPI
50 select ARCH_SUPPORTS_ATOMIC_RMW
51 select ARCH_SUPPORTS_HUGETLBFS
52 select ARCH_SUPPORTS_LTO_CLANG
53 select ARCH_SUPPORTS_LTO_CLANG_THIN
54 select ARCH_SUPPORTS_NUMA_BALANCING
55 select ARCH_USE_BUILTIN_BSWAP
56 select ARCH_USE_CMPXCHG_LOCKREF
57 select ARCH_USE_QUEUED_RWLOCKS
58 select ARCH_USE_QUEUED_SPINLOCKS
59 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
60 select ARCH_WANT_LD_ORPHAN_WARN
61 select ARCH_WANT_OPTIMIZE_VMEMMAP
62 select ARCH_WANTS_NO_INSTR
63 select BUILDTIME_TABLE_SORT
67 select GENERIC_CLOCKEVENTS
68 select GENERIC_CMOS_UPDATE
69 select GENERIC_CPU_AUTOPROBE
71 select GENERIC_GETTIMEOFDAY
72 select GENERIC_IOREMAP if !ARCH_IOREMAP
73 select GENERIC_IRQ_MULTI_HANDLER
74 select GENERIC_IRQ_PROBE
75 select GENERIC_IRQ_SHOW
76 select GENERIC_LIB_ASHLDI3
77 select GENERIC_LIB_ASHRDI3
78 select GENERIC_LIB_CMPDI2
79 select GENERIC_LIB_LSHRDI3
80 select GENERIC_LIB_UCMPDI2
81 select GENERIC_LIB_DEVMEM_IS_ALLOWED
82 select GENERIC_PCI_IOMAP
83 select GENERIC_SCHED_CLOCK
84 select GENERIC_SMP_IDLE_THREAD
85 select GENERIC_TIME_VSYSCALL
86 select GENERIC_VDSO_TIME_NS
89 select HAVE_ARCH_AUDITSYSCALL
90 select HAVE_ARCH_MMAP_RND_BITS if MMU
91 select HAVE_ARCH_SECCOMP_FILTER
92 select HAVE_ARCH_TRACEHOOK
93 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
94 select HAVE_ASM_MODVERSIONS
95 select HAVE_CONTEXT_TRACKING_USER
96 select HAVE_C_RECORDMCOUNT
97 select HAVE_DEBUG_KMEMLEAK
98 select HAVE_DEBUG_STACKOVERFLOW
99 select HAVE_DMA_CONTIGUOUS
100 select HAVE_DYNAMIC_FTRACE
101 select HAVE_DYNAMIC_FTRACE_WITH_ARGS
102 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT_CALLS
103 select HAVE_DYNAMIC_FTRACE_WITH_REGS
105 select HAVE_EFFICIENT_UNALIGNED_ACCESS if !ARCH_STRICT_ALIGN
106 select HAVE_EXIT_THREAD
108 select HAVE_FTRACE_MCOUNT_RECORD
109 select HAVE_FUNCTION_ARG_ACCESS_API
110 select HAVE_FUNCTION_ERROR_INJECTION
111 select HAVE_FUNCTION_GRAPH_TRACER
112 select HAVE_FUNCTION_TRACER
113 select HAVE_GENERIC_VDSO
114 select HAVE_HW_BREAKPOINT if PERF_EVENTS
115 select HAVE_IOREMAP_PROT
116 select HAVE_IRQ_EXIT_ON_IRQ_STACK
117 select HAVE_IRQ_TIME_ACCOUNTING
119 select HAVE_KPROBES_ON_FTRACE
120 select HAVE_KRETPROBES
121 select HAVE_MOD_ARCH_SPECIFIC
124 select HAVE_PERF_EVENTS
125 select HAVE_PERF_REGS
126 select HAVE_PERF_USER_STACK_DUMP
127 select HAVE_REGS_AND_STACK_ACCESS_API
129 select HAVE_SAMPLE_FTRACE_DIRECT
130 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI
131 select HAVE_SETUP_PER_CPU_AREA if NUMA
132 select HAVE_STACKPROTECTOR
133 select HAVE_SYSCALL_TRACEPOINTS
135 select HAVE_VIRT_CPU_ACCOUNTING_GEN if !SMP
136 select IRQ_FORCED_THREADING
137 select IRQ_LOONGARCH_CPU
138 select MMU_GATHER_MERGE_VMAS if MMU
139 select MODULES_USE_ELF_RELA if MODULES
140 select NEED_PER_CPU_EMBED_FIRST_CHUNK
141 select NEED_PER_CPU_PAGE_FIRST_CHUNK
143 select OF_EARLY_FLATTREE
145 select PCI_DOMAINS_GENERIC
146 select PCI_ECAM if ACPI
148 select PCI_MSI_ARCH_FALLBACKS
150 select PERF_USE_VMALLOC
154 select SYSCTL_ARCH_UNALIGN_ALLOW
155 select SYSCTL_ARCH_UNALIGN_NO_WARN
156 select SYSCTL_EXCEPTION_TRACE
158 select TRACE_IRQFLAGS_SUPPORT
159 select USE_PERCPU_NUMA_NODE_ID
160 select USER_STACKTRACE_SUPPORT
173 config GENERIC_BUG_RELATIVE_POINTERS
175 depends on GENERIC_BUG
177 config GENERIC_CALIBRATE_DELAY
183 config GENERIC_HWEIGHT
186 config L1_CACHE_SHIFT
190 config LOCKDEP_SUPPORT
194 config STACKTRACE_SUPPORT
198 # MACH_LOONGSON32 and MACH_LOONGSON64 are deliberately carried over from the
199 # MIPS Loongson code, to preserve Loongson-specific code paths in drivers that
200 # are shared between architectures, and specifically expecting the symbols.
201 config MACH_LOONGSON32
204 config MACH_LOONGSON64
207 config FIX_EARLYCON_MEM
213 config PAGE_SIZE_16KB
216 config PAGE_SIZE_64KB
219 config PGTABLE_2LEVEL
222 config PGTABLE_3LEVEL
225 config PGTABLE_4LEVEL
228 config PGTABLE_LEVELS
230 default 2 if PGTABLE_2LEVEL
231 default 3 if PGTABLE_3LEVEL
232 default 4 if PGTABLE_4LEVEL
234 config SCHED_OMIT_FRAME_POINTER
238 config AS_HAS_EXPLICIT_RELOCS
239 def_bool $(as-instr,x:pcalau12i \$t0$(comma)%pc_hi20(x))
241 config AS_HAS_FCSR_CLASS
242 def_bool $(as-instr,movfcsr2gr \$t0$(comma)\$fcsr0)
244 config AS_HAS_LSX_EXTENSION
245 def_bool $(as-instr,vld \$vr0$(comma)\$a0$(comma)0)
247 config AS_HAS_LASX_EXTENSION
248 def_bool $(as-instr,xvld \$xr0$(comma)\$a0$(comma)0)
250 menu "Kernel type and options"
252 source "kernel/Kconfig.hz"
255 prompt "Page Table Layout"
256 default 16KB_2LEVEL if 32BIT
257 default 16KB_3LEVEL if 64BIT
259 Allows choosing the page table layout, which is a combination
260 of page size and page table levels. The size of virtual memory
261 address space are determined by the page table layout.
264 bool "4KB with 3 levels"
266 select PGTABLE_3LEVEL
268 This option selects 4KB page size with 3 level page tables, which
269 support a maximum of 39 bits of application virtual memory.
272 bool "4KB with 4 levels"
274 select PGTABLE_4LEVEL
276 This option selects 4KB page size with 4 level page tables, which
277 support a maximum of 48 bits of application virtual memory.
280 bool "16KB with 2 levels"
281 select PAGE_SIZE_16KB
282 select PGTABLE_2LEVEL
284 This option selects 16KB page size with 2 level page tables, which
285 support a maximum of 36 bits of application virtual memory.
288 bool "16KB with 3 levels"
289 select PAGE_SIZE_16KB
290 select PGTABLE_3LEVEL
292 This option selects 16KB page size with 3 level page tables, which
293 support a maximum of 47 bits of application virtual memory.
296 bool "64KB with 2 levels"
297 select PAGE_SIZE_64KB
298 select PGTABLE_2LEVEL
300 This option selects 64KB page size with 2 level page tables, which
301 support a maximum of 42 bits of application virtual memory.
304 bool "64KB with 3 levels"
305 select PAGE_SIZE_64KB
306 select PGTABLE_3LEVEL
308 This option selects 64KB page size with 3 level page tables, which
309 support a maximum of 55 bits of application virtual memory.
314 string "Built-in kernel command line"
316 For most platforms, the arguments for the kernel's command line
317 are provided at run-time, during boot. However, there are cases
318 where either no arguments are being provided or the provided
319 arguments are insufficient or even invalid.
321 When that occurs, it is possible to define a built-in command
322 line here and choose how the kernel should use it later on.
325 prompt "Kernel command line type"
326 default CMDLINE_BOOTLOADER
328 Choose how the kernel will handle the provided built-in command
331 config CMDLINE_BOOTLOADER
332 bool "Use bootloader kernel arguments if available"
334 Prefer the command-line passed by the boot loader if available.
335 Use the built-in command line as fallback in case we get nothing
336 during boot. This is the default behaviour.
338 config CMDLINE_EXTEND
339 bool "Use built-in to extend bootloader kernel arguments"
341 The command-line arguments provided during boot will be
342 appended to the built-in command line. This is useful in
343 cases where the provided arguments are insufficient and
344 you don't want to or cannot modify them.
347 bool "Always use the built-in kernel command string"
349 Always use the built-in command line, even if we get one during
350 boot. This is useful in case you need to override the provided
351 command line on systems where you don't have or want control
357 bool "Enable DMI scanning"
358 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
361 This enables SMBIOS/DMI feature for systems, and scanning of
362 DMI to identify machine quirks.
365 bool "EFI runtime service support"
367 select EFI_RUNTIME_WRAPPERS
369 This enables the kernel to use EFI runtime services that are
370 available (such as the EFI variable services).
373 bool "EFI boot stub support"
376 select EFI_GENERIC_STUB
378 This kernel feature allows the kernel to be loaded directly by
379 EFI firmware without the use of a bootloader.
382 bool "SMT scheduler support"
385 Improves scheduler's performance when there are multiple
386 threads in one physical core.
389 bool "Multi-Processing support"
391 This enables support for systems with more than one CPU. If you have
392 a system with only one CPU, say N. If you have a system with more
395 If you say N here, the kernel will run on uni- and multiprocessor
396 machines, but will use only one CPU of a multiprocessor machine. If
397 you say Y here, the kernel will run on many, but not all,
398 uniprocessor machines. On a uniprocessor machine, the kernel
399 will run faster if you say N here.
401 See also the SMP-HOWTO available at <http://www.tldp.org/docs.html#howto>.
403 If you don't know what to do here, say N.
406 bool "Support for hot-pluggable CPUs"
408 select GENERIC_IRQ_MIGRATION
410 Say Y here to allow turning CPUs off and on. CPUs can be
411 controlled through /sys/devices/system/cpu.
412 (Note: power management support will enable this option
413 automatically on SMP systems. )
414 Say N if you want to disable CPU hotplug.
417 int "Maximum number of CPUs (2-256)"
422 This allows you to specify the maximum number of CPUs which this
428 select ACPI_NUMA if ACPI
430 Say Y to compile the kernel with NUMA (Non-Uniform Memory Access)
431 support. This option improves performance on systems with more
432 than one NUMA node; on single node systems it is generally better
433 to leave it disabled.
440 config ARCH_FORCE_MAX_ORDER
441 int "Maximum zone order"
442 default "13" if PAGE_SIZE_64KB
443 default "11" if PAGE_SIZE_16KB
446 The kernel memory allocator divides physically contiguous memory
447 blocks into "zones", where each zone is a power of two number of
448 pages. This option selects the largest power of two that the kernel
449 keeps in the memory allocator. If you need to allocate very large
450 blocks of physically contiguous memory, then you may need to
453 The page size is not necessarily 4KB. Keep this in mind
454 when choosing a value for this option.
457 bool "Enable LoongArch DMW-based ioremap()"
459 We use generic TLB-based ioremap() by default since it has page
460 protection support. However, you can enable LoongArch DMW-based
461 ioremap() for better performance.
463 config ARCH_WRITECOMBINE
464 bool "Enable WriteCombine (WUC) for ioremap()"
466 LoongArch maintains cache coherency in hardware, but when paired
467 with LS7A chipsets the WUC attribute (Weak-ordered UnCached, which
468 is similar to WriteCombine) is out of the scope of cache coherency
469 machanism for PCIe devices (this is a PCIe protocol violation, which
470 may be fixed in newer chipsets).
472 This means WUC can only used for write-only memory regions now, so
473 this option is disabled by default, making WUC silently fallback to
474 SUC for ioremap(). You can enable this option if the kernel is ensured
475 to run on hardware without this bug.
477 You can override this setting via writecombine=on/off boot parameter.
479 config ARCH_STRICT_ALIGN
480 bool "Enable -mstrict-align to prevent unaligned accesses" if EXPERT
483 Not all LoongArch cores support h/w unaligned access, we can use
484 -mstrict-align build parameter to prevent unaligned accesses.
486 CPUs with h/w unaligned access support:
487 Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
489 CPUs without h/w unaligned access support:
490 Loongson-2K500/2K1000.
492 This option is enabled by default to make the kernel be able to run
493 on all LoongArch systems. But you can disable it manually if you want
494 to run kernel only on systems with h/w unaligned access support in
495 order to optimise for performance.
502 bool "Support for the Loongson SIMD Extension"
503 depends on AS_HAS_LSX_EXTENSION
505 Loongson SIMD Extension (LSX) introduces 128 bit wide vector registers
506 and a set of SIMD instructions to operate on them. When this option
507 is enabled the kernel will support allocating & switching LSX
508 vector register contexts. If you know that your kernel will only be
509 running on CPUs which do not support LSX or that your userland will
510 not be making use of it then you may wish to say N here to reduce
511 the size & complexity of your kernel.
516 bool "Support for the Loongson Advanced SIMD Extension"
517 depends on CPU_HAS_LSX
518 depends on AS_HAS_LASX_EXTENSION
520 Loongson Advanced SIMD Extension (LASX) introduces 256 bit wide vector
521 registers and a set of SIMD instructions to operate on them. When this
522 option is enabled the kernel will support allocating & switching LASX
523 vector register contexts. If you know that your kernel will only be
524 running on CPUs which do not support LASX or that your userland will
525 not be making use of it then you may wish to say N here to reduce
526 the size & complexity of your kernel.
530 config CPU_HAS_PREFETCH
535 bool "Kexec system call"
538 kexec is a system call that implements the ability to shutdown your
539 current kernel, and to start another kernel. It is like a reboot
540 but it is independent of the system firmware. And like a reboot
541 you can start any kernel with it, not just Linux.
543 The name comes from the similarity to the exec system call.
546 bool "Build kdump crash kernel"
549 Generate crash dump after being started by kexec. This should
550 be normally only set in special crash dump kernels which are
551 loaded in the main kernel with kexec-tools into a specially
552 reserved region and then later executed after a crash by
555 For more details see Documentation/admin-guide/kdump/kdump.rst
558 bool "Relocatable kernel"
560 This builds the kernel as a Position Independent Executable (PIE),
561 which retains all relocation metadata required, so as to relocate
562 the kernel binary at runtime to a different virtual address from
565 config RANDOMIZE_BASE
566 bool "Randomize the address of the kernel (KASLR)"
567 depends on RELOCATABLE
569 Randomizes the physical and virtual address at which the
570 kernel image is loaded, as a security feature that
571 deters exploit attempts relying on knowledge of the location
574 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
578 config RANDOMIZE_BASE_MAX_OFFSET
579 hex "Maximum KASLR offset" if EXPERT
580 depends on RANDOMIZE_BASE
584 When KASLR is active, this provides the maximum offset that will
585 be applied to the kernel image. It should be set according to the
586 amount of physical RAM available in the target system.
588 This is limited by the size of the lower address memory, 256MB.
591 bool "Enable seccomp to safely compute untrusted bytecode"
595 This kernel feature is useful for number crunching applications
596 that may need to compute untrusted bytecode during their
597 execution. By using pipes or other transports made available to
598 the process as file descriptors supporting the read/write
599 syscalls, it's possible to isolate those applications in
600 their own address space using seccomp. Once seccomp is
601 enabled via /proc/<pid>/seccomp, it cannot be disabled
602 and the task is only allowed to execute a few safe syscalls
603 defined by each seccomp mode.
605 If unsure, say Y. Only embedded should say N here.
609 config ARCH_SELECT_MEMORY_MODEL
612 config ARCH_FLATMEM_ENABLE
616 config ARCH_SPARSEMEM_ENABLE
618 select SPARSEMEM_VMEMMAP_ENABLE
620 Say Y to support efficient handling of sparse physical memory,
621 for architectures which are either NUMA (Non-Uniform Memory Access)
622 or have huge holes in the physical address space for other reasons.
623 See <file:Documentation/mm/numa.rst> for more.
625 config ARCH_ENABLE_THP_MIGRATION
627 depends on TRANSPARENT_HUGEPAGE
629 config ARCH_MEMORY_PROBE
631 depends on MEMORY_HOTPLUG
637 config ARCH_MMAP_RND_BITS_MIN
640 config ARCH_MMAP_RND_BITS_MAX
643 menu "Power management options"
645 config ARCH_SUSPEND_POSSIBLE
648 config ARCH_HIBERNATION_POSSIBLE
651 source "kernel/power/Kconfig"
652 source "drivers/acpi/Kconfig"
656 source "drivers/firmware/Kconfig"