2 * Dynamic DMA mapping support.
5 #include <linux/types.h>
7 #include <linux/string.h>
9 #include <linux/module.h>
10 #include <linux/dmar.h>
11 #include <asm/iommu.h>
12 #include <asm/machvec.h>
13 #include <linux/dma-mapping.h>
16 #ifdef CONFIG_INTEL_IOMMU
18 #include <linux/kernel.h>
22 dma_addr_t bad_dma_address __read_mostly;
23 EXPORT_SYMBOL(bad_dma_address);
25 static int iommu_sac_force __read_mostly;
27 int no_iommu __read_mostly;
28 #ifdef CONFIG_IOMMU_DEBUG
29 int force_iommu __read_mostly = 1;
31 int force_iommu __read_mostly;
34 int iommu_pass_through;
36 /* Dummy device used for NULL arguments (normally ISA). Better would
37 be probably a smaller DMA mask, but this is bug-to-bug compatible
39 struct device fallback_dev = {
40 .init_name = "fallback device",
41 .coherent_dma_mask = DMA_BIT_MASK(32),
42 .dma_mask = &fallback_dev.coherent_dma_mask,
45 extern struct dma_map_ops intel_dma_ops;
47 static int __init pci_iommu_init(void)
55 /* Must execute after PCI subsystem */
56 fs_initcall(pci_iommu_init);
58 void pci_iommu_shutdown(void)
69 int iommu_dma_supported(struct device *dev, u64 mask)
71 /* Copied from i386. Doesn't make much sense, because it will
72 only work for pci_alloc_coherent.
73 The caller just has to use GFP_DMA in this case. */
74 if (mask < DMA_BIT_MASK(24))
77 /* Tell the device to use SAC when IOMMU force is on. This
78 allows the driver to use cheaper accesses in some cases.
80 Problem with this is that if we overflow the IOMMU area and
81 return DAC as fallback address the device may not handle it
84 As a special case some controllers have a 39bit address
85 mode that is as efficient as 32bit (aic79xx). Don't force
86 SAC for these. Assume all masks <= 40 bits are of this
87 type. Normally this doesn't make any difference, but gives
88 more gentle handling of IOMMU overflow. */
89 if (iommu_sac_force && (mask >= DMA_BIT_MASK(40))) {
90 dev_info(dev, "Force SAC with mask %llx\n", mask);
96 EXPORT_SYMBOL(iommu_dma_supported);
98 void __init pci_iommu_alloc(void)
100 dma_ops = &intel_dma_ops;
102 dma_ops->sync_single_for_cpu = machvec_dma_sync_single;
103 dma_ops->sync_sg_for_cpu = machvec_dma_sync_sg;
104 dma_ops->sync_single_for_device = machvec_dma_sync_single;
105 dma_ops->sync_sg_for_device = machvec_dma_sync_sg;
106 dma_ops->dma_supported = iommu_dma_supported;
109 * The order of these functions is important for
110 * fall-back/fail-over reasons
112 detect_intel_iommu();
114 #ifdef CONFIG_SWIOTLB