arch/ia64/kernel/irq_ia64.c

   1 /*
   2  * linux/arch/ia64/kernel/irq_ia64.c
   3  *
   4  * Copyright (C) 1998-2001 Hewlett-Packard Co
   5  *      Stephane Eranian <eranian@hpl.hp.com>
   6  *      David Mosberger-Tang <davidm@hpl.hp.com>
   7  *
   8  *  6/10/99: Updated to bring in sync with x86 version to facilitate
   9  *           support for SMP and different interrupt controllers.
  10  *
  11  * 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
  12  *                      PCI to vector allocation routine.
  13  * 04/14/2004 Ashok Raj <ashok.raj@intel.com>
  14  *                                              Added CPU Hotplug handling for IPF.
  15  */
  16
  17 #include <linux/module.h>
  18
  19 #include <linux/jiffies.h>
  20 #include <linux/errno.h>
  21 #include <linux/init.h>
  22 #include <linux/interrupt.h>
  23 #include <linux/ioport.h>
  24 #include <linux/kernel_stat.h>
  25 #include <linux/slab.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/random.h>       /* for rand_initialize_irq() */
  28 #include <linux/signal.h>
  29 #include <linux/smp.h>
  30 #include <linux/threads.h>
  31 #include <linux/bitops.h>
  32 #include <linux/irq.h>
  33
  34 #include <asm/delay.h>
  35 #include <asm/intrinsics.h>
  36 #include <asm/io.h>
  37 #include <asm/hw_irq.h>
  38 #include <asm/machvec.h>
  39 #include <asm/pgtable.h>
  40 #include <asm/system.h>
  41 #include <asm/tlbflush.h>
  42
  43 #ifdef CONFIG_PERFMON
  44 # include <asm/perfmon.h>
  45 #endif
  46
  47 #define IRQ_DEBUG       0
  48
  49 #define IRQ_VECTOR_UNASSIGNED   (0)
  50
  51 #define IRQ_UNUSED              (0)
  52 #define IRQ_USED                (1)
  53 #define IRQ_RSVD                (2)
  54
  55 /* These can be overridden in platform_irq_init */
  56 int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
  57 int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
  58
  59 /* default base addr of IPI table */
  60 void __iomem *ipi_base_addr = ((void __iomem *)
  61                                (__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
  62
  63 static cpumask_t vector_allocation_domain(int cpu);
  64
  65 /*
  66  * Legacy IRQ to IA-64 vector translation table.
  67  */
  68 __u8 isa_irq_to_vector_map[16] = {
  69         /* 8259 IRQ translation, first 16 entries */
  70         0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
  71         0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
  72 };
  73 EXPORT_SYMBOL(isa_irq_to_vector_map);
  74
  75 DEFINE_SPINLOCK(vector_lock);
  76
  77 struct irq_cfg irq_cfg[NR_IRQS] __read_mostly = {
  78         [0 ... NR_IRQS - 1] = {
  79                 .vector = IRQ_VECTOR_UNASSIGNED,
  80                 .domain = CPU_MASK_NONE
  81         }
  82 };
  83
  84 DEFINE_PER_CPU(int[IA64_NUM_VECTORS], vector_irq) = {
  85         [0 ... IA64_NUM_VECTORS - 1] = -1
  86 };
  87
  88 static cpumask_t vector_table[IA64_NUM_VECTORS] = {
  89         [0 ... IA64_NUM_VECTORS - 1] = CPU_MASK_NONE
  90 };
  91
  92 static int irq_status[NR_IRQS] = {
  93         [0 ... NR_IRQS -1] = IRQ_UNUSED
  94 };
  95
  96 int check_irq_used(int irq)
  97 {
  98         if (irq_status[irq] == IRQ_USED)
  99                 return 1;
 100
 101         return -1;
 102 }
 103
 104 static inline int find_unassigned_irq(void)
 105 {
 106         int irq;
 107
 108         for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++)
 109                 if (irq_status[irq] == IRQ_UNUSED)
 110                         return irq;
 111         return -ENOSPC;
 112 }
 113
 114 static inline int find_unassigned_vector(cpumask_t domain)
 115 {
 116         cpumask_t mask;
 117         int pos, vector;
 118
 119         cpus_and(mask, domain, cpu_online_map);
 120         if (cpus_empty(mask))
 121                 return -EINVAL;
 122
 123         for (pos = 0; pos < IA64_NUM_DEVICE_VECTORS; pos++) {
 124                 vector = IA64_FIRST_DEVICE_VECTOR + pos;
 125                 cpus_and(mask, domain, vector_table[vector]);
 126                 if (!cpus_empty(mask))
 127                         continue;
 128                 return vector;
 129         }
 130         return -ENOSPC;
 131 }
 132
 133 static int __bind_irq_vector(int irq, int vector, cpumask_t domain)
 134 {
 135         cpumask_t mask;
 136         int cpu;
 137         struct irq_cfg *cfg = &irq_cfg[irq];
 138
 139         BUG_ON((unsigned)irq >= NR_IRQS);
 140         BUG_ON((unsigned)vector >= IA64_NUM_VECTORS);
 141
 142         cpus_and(mask, domain, cpu_online_map);
 143         if (cpus_empty(mask))
 144                 return -EINVAL;
 145         if ((cfg->vector == vector) && cpus_equal(cfg->domain, domain))
 146                 return 0;
 147         if (cfg->vector != IRQ_VECTOR_UNASSIGNED)
 148                 return -EBUSY;
 149         for_each_cpu_mask(cpu, mask)
 150                 per_cpu(vector_irq, cpu)[vector] = irq;
 151         cfg->vector = vector;
 152         cfg->domain = domain;
 153         irq_status[irq] = IRQ_USED;
 154         cpus_or(vector_table[vector], vector_table[vector], domain);
 155         return 0;
 156 }
 157
 158 int bind_irq_vector(int irq, int vector, cpumask_t domain)
 159 {
 160         unsigned long flags;
 161         int ret;
 162
 163         spin_lock_irqsave(&vector_lock, flags);
 164         ret = __bind_irq_vector(irq, vector, domain);
 165         spin_unlock_irqrestore(&vector_lock, flags);
 166         return ret;
 167 }
 168
 169 static void __clear_irq_vector(int irq)
 170 {
 171         int vector, cpu;
 172         cpumask_t mask;
 173         cpumask_t domain;
 174         struct irq_cfg *cfg = &irq_cfg[irq];
 175
 176         BUG_ON((unsigned)irq >= NR_IRQS);
 177         BUG_ON(cfg->vector == IRQ_VECTOR_UNASSIGNED);
 178         vector = cfg->vector;
 179         domain = cfg->domain;
 180         cpus_and(mask, cfg->domain, cpu_online_map);
 181         for_each_cpu_mask(cpu, mask)
 182                 per_cpu(vector_irq, cpu)[vector] = -1;
 183         cfg->vector = IRQ_VECTOR_UNASSIGNED;
 184         cfg->domain = CPU_MASK_NONE;
 185         irq_status[irq] = IRQ_UNUSED;
 186         cpus_andnot(vector_table[vector], vector_table[vector], domain);
 187 }
 188
 189 static void clear_irq_vector(int irq)
 190 {
 191         unsigned long flags;
 192
 193         spin_lock_irqsave(&vector_lock, flags);
 194         __clear_irq_vector(irq);
 195         spin_unlock_irqrestore(&vector_lock, flags);
 196 }
 197
 198 int
 199 ia64_native_assign_irq_vector (int irq)
 200 {
 201         unsigned long flags;
 202         int vector, cpu;
 203         cpumask_t domain = CPU_MASK_NONE;
 204
 205         vector = -ENOSPC;
 206
 207         spin_lock_irqsave(&vector_lock, flags);
 208         for_each_online_cpu(cpu) {
 209                 domain = vector_allocation_domain(cpu);
 210                 vector = find_unassigned_vector(domain);
 211                 if (vector >= 0)
 212                         break;
 213         }
 214         if (vector < 0)
 215                 goto out;
 216         if (irq == AUTO_ASSIGN)
 217                 irq = vector;
 218         BUG_ON(__bind_irq_vector(irq, vector, domain));
 219  out:
 220         spin_unlock_irqrestore(&vector_lock, flags);
 221         return vector;
 222 }
 223
 224 void
 225 ia64_native_free_irq_vector (int vector)
 226 {
 227         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 228             vector > IA64_LAST_DEVICE_VECTOR)
 229                 return;
 230         clear_irq_vector(vector);
 231 }
 232
 233 int
 234 reserve_irq_vector (int vector)
 235 {
 236         if (vector < IA64_FIRST_DEVICE_VECTOR ||
 237             vector > IA64_LAST_DEVICE_VECTOR)
 238                 return -EINVAL;
 239         return !!bind_irq_vector(vector, vector, CPU_MASK_ALL);
 240 }
 241
 242 /*
 243  * Initialize vector_irq on a new cpu. This function must be called
 244  * with vector_lock held.
 245  */
 246 void __setup_vector_irq(int cpu)
 247 {
 248         int irq, vector;
 249
 250         /* Clear vector_irq */
 251         for (vector = 0; vector < IA64_NUM_VECTORS; ++vector)
 252                 per_cpu(vector_irq, cpu)[vector] = -1;
 253         /* Mark the inuse vectors */
 254         for (irq = 0; irq < NR_IRQS; ++irq) {
 255                 if (!cpu_isset(cpu, irq_cfg[irq].domain))
 256                         continue;
 257                 vector = irq_to_vector(irq);
 258                 per_cpu(vector_irq, cpu)[vector] = irq;
 259         }
 260 }
 261
 262 #if defined(CONFIG_SMP) && (defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG))
 263
 264 static enum vector_domain_type {
 265         VECTOR_DOMAIN_NONE,
 266         VECTOR_DOMAIN_PERCPU
 267 } vector_domain_type = VECTOR_DOMAIN_NONE;
 268
 269 static cpumask_t vector_allocation_domain(int cpu)
 270 {
 271         if (vector_domain_type == VECTOR_DOMAIN_PERCPU)
 272                 return cpumask_of_cpu(cpu);
 273         return CPU_MASK_ALL;
 274 }
 275
 276 static int __irq_prepare_move(int irq, int cpu)
 277 {
 278         struct irq_cfg *cfg = &irq_cfg[irq];
 279         int vector;
 280         cpumask_t domain;
 281
 282         if (cfg->move_in_progress || cfg->move_cleanup_count)
 283                 return -EBUSY;
 284         if (cfg->vector == IRQ_VECTOR_UNASSIGNED || !cpu_online(cpu))
 285                 return -EINVAL;
 286         if (cpu_isset(cpu, cfg->domain))
 287                 return 0;
 288         domain = vector_allocation_domain(cpu);
 289         vector = find_unassigned_vector(domain);
 290         if (vector < 0)
 291                 return -ENOSPC;
 292         cfg->move_in_progress = 1;
 293         cfg->old_domain = cfg->domain;
 294         cfg->vector = IRQ_VECTOR_UNASSIGNED;
 295         cfg->domain = CPU_MASK_NONE;
 296         BUG_ON(__bind_irq_vector(irq, vector, domain));
 297         return 0;
 298 }
 299
 300 int irq_prepare_move(int irq, int cpu)
 301 {
 302         unsigned long flags;
 303         int ret;
 304
 305         spin_lock_irqsave(&vector_lock, flags);
 306         ret = __irq_prepare_move(irq, cpu);
 307         spin_unlock_irqrestore(&vector_lock, flags);
 308         return ret;
 309 }
 310
 311 void irq_complete_move(unsigned irq)
 312 {
 313         struct irq_cfg *cfg = &irq_cfg[irq];
 314         cpumask_t cleanup_mask;
 315         int i;
 316
 317         if (likely(!cfg->move_in_progress))
 318                 return;
 319
 320         if (unlikely(cpu_isset(smp_processor_id(), cfg->old_domain)))
 321                 return;
 322
 323         cpus_and(cleanup_mask, cfg->old_domain, cpu_online_map);
 324         cfg->move_cleanup_count = cpus_weight(cleanup_mask);
 325         for_each_cpu_mask(i, cleanup_mask)
 326                 platform_send_ipi(i, IA64_IRQ_MOVE_VECTOR, IA64_IPI_DM_INT, 0);
 327         cfg->move_in_progress = 0;
 328 }
 329
 330 static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id)
 331 {
 332         int me = smp_processor_id();
 333         ia64_vector vector;
 334         unsigned long flags;
 335
 336         for (vector = IA64_FIRST_DEVICE_VECTOR;
 337              vector < IA64_LAST_DEVICE_VECTOR; vector++) {
 338                 int irq;
 339                 struct irq_desc *desc;
 340                 struct irq_cfg *cfg;
 341                 irq = __get_cpu_var(vector_irq)[vector];
 342                 if (irq < 0)
 343                         continue;
 344
 345                 desc = irq_desc + irq;
 346                 cfg = irq_cfg + irq;
 347                 raw_spin_lock(&desc->lock);
 348                 if (!cfg->move_cleanup_count)
 349                         goto unlock;
 350
 351                 if (!cpu_isset(me, cfg->old_domain))
 352                         goto unlock;
 353
 354                 spin_lock_irqsave(&vector_lock, flags);
 355                 __get_cpu_var(vector_irq)[vector] = -1;
 356                 cpu_clear(me, vector_table[vector]);
 357                 spin_unlock_irqrestore(&vector_lock, flags);
 358                 cfg->move_cleanup_count--;
 359         unlock:
 360                 raw_spin_unlock(&desc->lock);
 361         }
 362         return IRQ_HANDLED;
 363 }
 364
 365 static struct irqaction irq_move_irqaction = {
 366         .handler =      smp_irq_move_cleanup_interrupt,
 367         .flags =        IRQF_DISABLED,
 368         .name =         "irq_move"
 369 };
 370
 371 static int __init parse_vector_domain(char *arg)
 372 {
 373         if (!arg)
 374                 return -EINVAL;
 375         if (!strcmp(arg, "percpu")) {
 376                 vector_domain_type = VECTOR_DOMAIN_PERCPU;
 377                 no_int_routing = 1;
 378         }
 379         return 0;
 380 }
 381 early_param("vector", parse_vector_domain);
 382 #else
 383 static cpumask_t vector_allocation_domain(int cpu)
 384 {
 385         return CPU_MASK_ALL;
 386 }
 387 #endif
 388
 389
 390 void destroy_and_reserve_irq(unsigned int irq)
 391 {
 392         unsigned long flags;
 393
 394         dynamic_irq_cleanup(irq);
 395
 396         spin_lock_irqsave(&vector_lock, flags);
 397         __clear_irq_vector(irq);
 398         irq_status[irq] = IRQ_RSVD;
 399         spin_unlock_irqrestore(&vector_lock, flags);
 400 }
 401
 402 /*
 403  * Dynamic irq allocate and deallocation for MSI
 404  */
 405 int create_irq(void)
 406 {
 407         unsigned long flags;
 408         int irq, vector, cpu;
 409         cpumask_t domain = CPU_MASK_NONE;
 410
 411         irq = vector = -ENOSPC;
 412         spin_lock_irqsave(&vector_lock, flags);
 413         for_each_online_cpu(cpu) {
 414                 domain = vector_allocation_domain(cpu);
 415                 vector = find_unassigned_vector(domain);
 416                 if (vector >= 0)
 417                         break;
 418         }
 419         if (vector < 0)
 420                 goto out;
 421         irq = find_unassigned_irq();
 422         if (irq < 0)
 423                 goto out;
 424         BUG_ON(__bind_irq_vector(irq, vector, domain));
 425  out:
 426         spin_unlock_irqrestore(&vector_lock, flags);
 427         if (irq >= 0)
 428                 dynamic_irq_init(irq);
 429         return irq;
 430 }
 431
 432 void destroy_irq(unsigned int irq)
 433 {
 434         dynamic_irq_cleanup(irq);
 435         clear_irq_vector(irq);
 436 }
 437
 438 #ifdef CONFIG_SMP
 439 #       define IS_RESCHEDULE(vec)       (vec == IA64_IPI_RESCHEDULE)
 440 #       define IS_LOCAL_TLB_FLUSH(vec)  (vec == IA64_IPI_LOCAL_TLB_FLUSH)
 441 #else
 442 #       define IS_RESCHEDULE(vec)       (0)
 443 #       define IS_LOCAL_TLB_FLUSH(vec)  (0)
 444 #endif
 445 /*
 446  * That's where the IVT branches when we get an external
 447  * interrupt. This branches to the correct hardware IRQ handler via
 448  * function ptr.
 449  */
 450 void
 451 ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
 452 {
 453         struct pt_regs *old_regs = set_irq_regs(regs);
 454         unsigned long saved_tpr;
 455
 456 #if IRQ_DEBUG
 457         {
 458                 unsigned long bsp, sp;
 459
 460                 /*
 461                  * Note: if the interrupt happened while executing in
 462                  * the context switch routine (ia64_switch_to), we may
 463                  * get a spurious stack overflow here.  This is
 464                  * because the register and the memory stack are not
 465                  * switched atomically.
 466                  */
 467                 bsp = ia64_getreg(_IA64_REG_AR_BSP);
 468                 sp = ia64_getreg(_IA64_REG_SP);
 469
 470                 if ((sp - bsp) < 1024) {
 471                         static unsigned char count;
 472                         static long last_time;
 473
 474                         if (time_after(jiffies, last_time + 5 * HZ))
 475                                 count = 0;
 476                         if (++count < 5) {
 477                                 last_time = jiffies;
 478                                 printk("ia64_handle_irq: DANGER: less than "
 479                                        "1KB of free stack space!!\n"
 480                                        "(bsp=0x%lx, sp=%lx)\n", bsp, sp);
 481                         }
 482                 }
 483         }
 484 #endif /* IRQ_DEBUG */
 485
 486         /*
 487          * Always set TPR to limit maximum interrupt nesting depth to
 488          * 16 (without this, it would be ~240, which could easily lead
 489          * to kernel stack overflows).
 490          */
 491         irq_enter();
 492         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 493         ia64_srlz_d();
 494         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 495                 int irq = local_vector_to_irq(vector);
 496                 struct irq_desc *desc = irq_to_desc(irq);
 497
 498                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 499                         smp_local_flush_tlb();
 500                         kstat_incr_irqs_this_cpu(irq, desc);
 501                 } else if (unlikely(IS_RESCHEDULE(vector))) {
 502                         kstat_incr_irqs_this_cpu(irq, desc);
 503                 } else {
 504                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 505                         ia64_srlz_d();
 506
 507                         if (unlikely(irq < 0)) {
 508                                 printk(KERN_ERR "%s: Unexpected interrupt "
 509                                        "vector %d on CPU %d is not mapped "
 510                                        "to any IRQ!\n", __func__, vector,
 511                                        smp_processor_id());
 512                         } else
 513                                 generic_handle_irq(irq);
 514
 515                         /*
 516                          * Disable interrupts and send EOI:
 517                          */
 518                         local_irq_disable();
 519                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 520                 }
 521                 ia64_eoi();
 522                 vector = ia64_get_ivr();
 523         }
 524         /*
 525          * This must be done *after* the ia64_eoi().  For example, the keyboard softirq
 526          * handler needs to be able to wait for further keyboard interrupts, which can't
 527          * come through until ia64_eoi() has been done.
 528          */
 529         irq_exit();
 530         set_irq_regs(old_regs);
 531 }
 532
 533 #ifdef CONFIG_HOTPLUG_CPU
 534 /*
 535  * This function emulates a interrupt processing when a cpu is about to be
 536  * brought down.
 537  */
 538 void ia64_process_pending_intr(void)
 539 {
 540         ia64_vector vector;
 541         unsigned long saved_tpr;
 542         extern unsigned int vectors_in_migration[NR_IRQS];
 543
 544         vector = ia64_get_ivr();
 545
 546         irq_enter();
 547         saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
 548         ia64_srlz_d();
 549
 550          /*
 551           * Perform normal interrupt style processing
 552           */
 553         while (vector != IA64_SPURIOUS_INT_VECTOR) {
 554                 int irq = local_vector_to_irq(vector);
 555                 struct irq_desc *desc = irq_to_desc(irq);
 556
 557                 if (unlikely(IS_LOCAL_TLB_FLUSH(vector))) {
 558                         smp_local_flush_tlb();
 559                         kstat_incr_irqs_this_cpu(irq, desc);
 560                 } else if (unlikely(IS_RESCHEDULE(vector))) {
 561                         kstat_incr_irqs_this_cpu(irq, desc);
 562                 } else {
 563                         struct pt_regs *old_regs = set_irq_regs(NULL);
 564
 565                         ia64_setreg(_IA64_REG_CR_TPR, vector);
 566                         ia64_srlz_d();
 567
 568                         /*
 569                          * Now try calling normal ia64_handle_irq as it would have got called
 570                          * from a real intr handler. Try passing null for pt_regs, hopefully
 571                          * it will work. I hope it works!.
 572                          * Probably could shared code.
 573                          */
 574                         if (unlikely(irq < 0)) {
 575                                 printk(KERN_ERR "%s: Unexpected interrupt "
 576                                        "vector %d on CPU %d not being mapped "
 577                                        "to any IRQ!!\n", __func__, vector,
 578                                        smp_processor_id());
 579                         } else {
 580                                 vectors_in_migration[irq]=0;
 581                                 generic_handle_irq(irq);
 582                         }
 583                         set_irq_regs(old_regs);
 584
 585                         /*
 586                          * Disable interrupts and send EOI
 587                          */
 588                         local_irq_disable();
 589                         ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
 590                 }
 591                 ia64_eoi();
 592                 vector = ia64_get_ivr();
 593         }
 594         irq_exit();
 595 }
 596 #endif
 597
 598
 599 #ifdef CONFIG_SMP
 600
 601 static irqreturn_t dummy_handler (int irq, void *dev_id)
 602 {
 603         BUG();
 604 }
 605
 606 static struct irqaction ipi_irqaction = {
 607         .handler =      handle_IPI,
 608         .flags =        IRQF_DISABLED,
 609         .name =         "IPI"
 610 };
 611
 612 /*
 613  * KVM uses this interrupt to force a cpu out of guest mode
 614  */
 615 static struct irqaction resched_irqaction = {
 616         .handler =      dummy_handler,
 617         .flags =        IRQF_DISABLED,
 618         .name =         "resched"
 619 };
 620
 621 static struct irqaction tlb_irqaction = {
 622         .handler =      dummy_handler,
 623         .flags =        IRQF_DISABLED,
 624         .name =         "tlb_flush"
 625 };
 626
 627 #endif
 628
 629 void
 630 ia64_native_register_percpu_irq (ia64_vector vec, struct irqaction *action)
 631 {
 632         struct irq_desc *desc;
 633         unsigned int irq;
 634
 635         irq = vec;
 636         BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL));
 637         desc = irq_desc + irq;
 638         desc->status |= IRQ_PER_CPU;
 639         desc->chip = &irq_type_ia64_lsapic;
 640         if (action)
 641                 setup_irq(irq, action);
 642 }
 643
 644 void __init
 645 ia64_native_register_ipi(void)
 646 {
 647 #ifdef CONFIG_SMP
 648         register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
 649         register_percpu_irq(IA64_IPI_RESCHEDULE, &resched_irqaction);
 650         register_percpu_irq(IA64_IPI_LOCAL_TLB_FLUSH, &tlb_irqaction);
 651 #endif
 652 }
 653
 654 void __init
 655 init_IRQ (void)
 656 {
 657         ia64_register_ipi();
 658         register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
 659 #ifdef CONFIG_SMP
 660 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_DIG)
 661         if (vector_domain_type != VECTOR_DOMAIN_NONE)
 662                 register_percpu_irq(IA64_IRQ_MOVE_VECTOR, &irq_move_irqaction);
 663 #endif
 664 #endif
 665 #ifdef CONFIG_PERFMON
 666         pfm_init_percpu();
 667 #endif
 668         platform_irq_init();
 669 }
 670
 671 void
 672 ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
 673 {
 674         void __iomem *ipi_addr;
 675         unsigned long ipi_data;
 676         unsigned long phys_cpu_id;
 677
 678         phys_cpu_id = cpu_physical_id(cpu);
 679
 680         /*
 681          * cpu number is in 8bit ID and 8bit EID
 682          */
 683
 684         ipi_data = (delivery_mode << 8) | (vector & 0xff);
 685         ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
 686
 687         writeq(ipi_data, ipi_addr);
 688 }