2 # For a description of the syntax of this configuration file,
3 # see Documentation/kbuild/kconfig-language.txt.
9 config RWSEM_GENERIC_SPINLOCK
13 config RWSEM_XCHGADD_ALGORITHM
16 config GENERIC_FIND_NEXT_BIT
20 config GENERIC_HWEIGHT
24 config GENERIC_CALIBRATE_DELAY
28 config GENERIC_HARDIRQS
32 config GENERIC_HARDIRQS_NO__DO_IRQ
44 mainmenu "Fujitsu FR-V Kernel Configuration"
49 menu "Fujitsu FR-V system setup"
54 This options switches on and off support for the FR-V MMU
55 (effectively switching between vmlinux and uClinux). Not all FR-V
56 CPUs support this. Currently only the FR451 has a sufficiently
59 config FRV_OUTOFLINE_ATOMIC_OPS
60 bool "Out-of-line the FRV atomic operations"
63 Setting this option causes the FR-V atomic operations to be mostly
64 implemented out-of-line.
66 See Documentation/fujitsu/frv/atomic-ops.txt for more information.
69 bool "High memory support"
73 If you wish to use more than 256MB of memory with your MMU based
74 system, you will need to select this option. The kernel can only see
75 the memory between 0xC0000000 and 0xD0000000 directly... everything
78 The arch is, however, capable of supporting up to 3GB of SDRAM.
81 bool "Allocate page tables in highmem"
85 The VM uses one page of memory for each page table. For systems
86 with a lot of RAM, this can be wasteful of precious low memory.
87 Setting this option will put user-space page tables in high memory.
90 bool "Allow allocating large blocks (> 1MB) of memory"
92 Allow the slab memory allocator to keep chains for very large memory
93 sizes - up to 32MB. You may need this if your system has a lot of
94 RAM, and you need to able to allocate very large contiguous chunks.
100 prompt "uClinux kernel load address"
102 default UCPAGE_OFFSET_C0000000
104 This option sets the base address for the uClinux kernel. The kernel
105 will rearrange the SDRAM layout to start at this address, and move
106 itself to start there. It must be greater than 0, and it must be
107 sufficiently less than 0xE0000000 that the SDRAM does not intersect
110 The base address must also be aligned such that the SDRAM controller
111 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
113 config UCPAGE_OFFSET_20000000
116 config UCPAGE_OFFSET_40000000
119 config UCPAGE_OFFSET_60000000
122 config UCPAGE_OFFSET_80000000
125 config UCPAGE_OFFSET_A0000000
128 config UCPAGE_OFFSET_C0000000
129 bool "0xC0000000 (Recommended)"
133 config PROTECT_KERNEL
134 bool "Protect core kernel against userspace"
138 Selecting this option causes the uClinux kernel to change the
139 permittivity of DAMPR register covering the core kernel image to
140 prevent userspace accessing the underlying memory directly.
143 prompt "CPU Caching mode"
144 default FRV_DEFL_CACHE_WBACK
146 This option determines the default caching mode for the kernel.
148 Write-Back caching mode involves the all reads and writes causing
149 the affected cacheline to be read into the cache first before being
150 operated upon. Memory is not then updated by a write until the cache
151 is filled and a cacheline needs to be displaced from the cache to
152 make room. Only at that point is it written back.
154 Write-Behind caching is similar to Write-Back caching, except that a
155 write won't fetch a cacheline into the cache if there isn't already
156 one there; it will write directly to memory instead.
158 Write-Through caching only fetches cachelines from memory on a
159 read. Writes always get written directly to memory. If the affected
160 cacheline is also in cache, it will be updated too.
162 The final option is to turn of caching entirely.
164 Note that not all CPUs support Write-Behind caching. If the CPU on
165 which the kernel is running doesn't, it'll fall back to Write-Back
168 config FRV_DEFL_CACHE_WBACK
171 config FRV_DEFL_CACHE_WBEHIND
174 config FRV_DEFL_CACHE_WTHRU
177 config FRV_DEFL_CACHE_DISABLED
182 menu "CPU core support"
185 bool "Include FR401 core support"
189 This enables support for the FR401, FR401A and FR403 CPUs
192 bool "Include FR405 core support"
196 This enables support for the FR405 CPU
199 bool "Include FR451 core support"
202 This enables support for the FR451 CPU
204 config CPU_FR451_COMPILE
205 bool "Specifically compile for FR451 core"
206 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
209 This causes appropriate flags to be passed to the compiler to
210 optimise for the FR451 CPU
213 bool "Include FR551 core support"
217 This enables support for the FR555 CPU
219 config CPU_FR551_COMPILE
220 bool "Specifically compile for FR551 core"
221 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
224 This causes appropriate flags to be passed to the compiler to
225 optimise for the FR555 CPU
227 config FRV_L1_CACHE_SHIFT
229 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
230 default "6" if CPU_FR551
235 prompt "System support"
239 bool "MB93091 CPU board with or without motherboard"
242 bool "MB93093 PDK unit"
248 prompt "Motherboard support"
252 bool "Use the MB93090-MB00 motherboard"
254 Select this option if the MB93091 CPU board is going to be used with
255 a MB93090-MB00 VDK motherboard
258 bool "Use standalone"
260 Select this option if the MB93091 CPU board is going to be used
261 without a motherboard
266 config FUJITSU_MB93493
267 bool "MB93493 Multimedia chip"
269 Select this option if the MB93493 multimedia chip is going to be
273 prompt "GP-Relative data support"
276 This option controls what data, if any, should be placed in the GP
277 relative data sections. Using this means that the compiler can
278 generate accesses to the data using GR16-relative addressing which
279 is faster than absolute instructions and saves space (2 instructions
282 However, the GPREL region is limited in size because the immediate
283 value used in the load and store instructions is limited to a 12-bit
286 So if the linker starts complaining that accesses to GPREL data are
287 out of range, try changing this option from the default.
289 Note that modules will always be compiled with this feature disabled
290 as the module data will not be in range of the GP base address.
293 bool "Put data objects of up to 8 bytes into GP-REL"
296 bool "Put data objects of up to 4 bytes into GP-REL"
298 config GPREL_DATA_NONE
299 bool "Don't use GP-REL"
303 config FRV_ONCPU_SERIAL
304 bool "Use on-CPU serial ports"
310 depends on MB93090_MB00
313 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
314 onboard. If you have one of these boards and you wish to use the PCI
315 facilities, say Y here.
317 The PCI-HOWTO, available from
318 <http://www.tldp.org/docs.html#howto>, contains valuable
319 information about which PCI hardware does work under Linux and which
322 config RESERVE_DMA_COHERENT
323 bool "Reserve DMA coherent memory"
324 depends on PCI && !MMU
327 Many PCI drivers require access to uncached memory for DMA device
328 communications (such as is done with some Ethernet buffer rings). If
329 a fully featured MMU is available, this can be done through page
330 table settings, but if not, a region has to be set aside and marked
331 with a special DAMPR register.
333 Setting this option causes uClinux to set aside a portion of the
334 available memory for use in this manner. The memory will then be
335 unavailable for normal kernel use.
337 source "drivers/pci/Kconfig"
339 source "drivers/pcmcia/Kconfig"
341 #config MATH_EMULATION
342 # bool "Math emulation support (EXPERIMENTAL)"
343 # depends on EXPERIMENTAL
345 # At some point in the future, this will cause floating-point math
346 # instructions to be emulated by the kernel on machines that lack a
347 # floating-point math coprocessor. Thrill-seekers and chronically
348 # sleep-deprived psychotic hacker types can say Y now, everyone else
349 # should probably wait a while.
351 menu "Power management options"
352 source kernel/power/Kconfig
358 menu "Executable formats"
360 source "fs/Kconfig.binfmt"
366 source "drivers/Kconfig"
370 source "arch/frv/Kconfig.debug"
372 source "security/Kconfig"
374 source "crypto/Kconfig"