5 select HAVE_ARCH_TRACEHOOK
7 select HAVE_PERF_EVENTS
8 select HAVE_GENERIC_HARDIRQS
9 select GENERIC_IRQ_SHOW
10 select ARCH_HAVE_NMI_SAFE_CMPXCHG
11 select GENERIC_CPU_DEVICES
17 config RWSEM_GENERIC_SPINLOCK
21 config RWSEM_XCHGADD_ALGORITHM
24 config GENERIC_HWEIGHT
28 config GENERIC_CALIBRATE_DELAY
40 config ARCH_HAS_ILOG2_U32
44 config ARCH_HAS_ILOG2_U64
54 source "kernel/Kconfig.freezer"
57 menu "Fujitsu FR-V system setup"
62 This options switches on and off support for the FR-V MMU
63 (effectively switching between vmlinux and uClinux). Not all FR-V
64 CPUs support this. Currently only the FR451 has a sufficiently
67 config FRV_OUTOFLINE_ATOMIC_OPS
68 bool "Out-of-line the FRV atomic operations"
71 Setting this option causes the FR-V atomic operations to be mostly
72 implemented out-of-line.
74 See Documentation/frv/atomic-ops.txt for more information.
77 bool "High memory support"
81 If you wish to use more than 256MB of memory with your MMU based
82 system, you will need to select this option. The kernel can only see
83 the memory between 0xC0000000 and 0xD0000000 directly... everything
86 The arch is, however, capable of supporting up to 3GB of SDRAM.
89 bool "Allocate page tables in highmem"
93 The VM uses one page of memory for each page table. For systems
94 with a lot of RAM, this can be wasteful of precious low memory.
95 Setting this option will put user-space page tables in high memory.
100 prompt "uClinux kernel load address"
102 default UCPAGE_OFFSET_C0000000
104 This option sets the base address for the uClinux kernel. The kernel
105 will rearrange the SDRAM layout to start at this address, and move
106 itself to start there. It must be greater than 0, and it must be
107 sufficiently less than 0xE0000000 that the SDRAM does not intersect
110 The base address must also be aligned such that the SDRAM controller
111 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
113 config UCPAGE_OFFSET_20000000
116 config UCPAGE_OFFSET_40000000
119 config UCPAGE_OFFSET_60000000
122 config UCPAGE_OFFSET_80000000
125 config UCPAGE_OFFSET_A0000000
128 config UCPAGE_OFFSET_C0000000
129 bool "0xC0000000 (Recommended)"
135 default 0x20000000 if UCPAGE_OFFSET_20000000
136 default 0x40000000 if UCPAGE_OFFSET_40000000
137 default 0x60000000 if UCPAGE_OFFSET_60000000
138 default 0x80000000 if UCPAGE_OFFSET_80000000
139 default 0xA0000000 if UCPAGE_OFFSET_A0000000
142 config PROTECT_KERNEL
143 bool "Protect core kernel against userspace"
147 Selecting this option causes the uClinux kernel to change the
148 permittivity of DAMPR register covering the core kernel image to
149 prevent userspace accessing the underlying memory directly.
152 prompt "CPU Caching mode"
153 default FRV_DEFL_CACHE_WBACK
155 This option determines the default caching mode for the kernel.
157 Write-Back caching mode involves the all reads and writes causing
158 the affected cacheline to be read into the cache first before being
159 operated upon. Memory is not then updated by a write until the cache
160 is filled and a cacheline needs to be displaced from the cache to
161 make room. Only at that point is it written back.
163 Write-Behind caching is similar to Write-Back caching, except that a
164 write won't fetch a cacheline into the cache if there isn't already
165 one there; it will write directly to memory instead.
167 Write-Through caching only fetches cachelines from memory on a
168 read. Writes always get written directly to memory. If the affected
169 cacheline is also in cache, it will be updated too.
171 The final option is to turn of caching entirely.
173 Note that not all CPUs support Write-Behind caching. If the CPU on
174 which the kernel is running doesn't, it'll fall back to Write-Back
177 config FRV_DEFL_CACHE_WBACK
180 config FRV_DEFL_CACHE_WBEHIND
183 config FRV_DEFL_CACHE_WTHRU
186 config FRV_DEFL_CACHE_DISABLED
191 menu "CPU core support"
194 bool "Include FR401 core support"
198 This enables support for the FR401, FR401A and FR403 CPUs
201 bool "Include FR405 core support"
205 This enables support for the FR405 CPU
208 bool "Include FR451 core support"
211 This enables support for the FR451 CPU
213 config CPU_FR451_COMPILE
214 bool "Specifically compile for FR451 core"
215 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
218 This causes appropriate flags to be passed to the compiler to
219 optimise for the FR451 CPU
222 bool "Include FR551 core support"
226 This enables support for the FR555 CPU
228 config CPU_FR551_COMPILE
229 bool "Specifically compile for FR551 core"
230 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
233 This causes appropriate flags to be passed to the compiler to
234 optimise for the FR555 CPU
236 config FRV_L1_CACHE_SHIFT
238 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
239 default "6" if CPU_FR551
244 prompt "System support"
248 bool "MB93091 CPU board with or without motherboard"
251 bool "MB93093 PDK unit"
257 prompt "Motherboard support"
261 bool "Use the MB93090-MB00 motherboard"
263 Select this option if the MB93091 CPU board is going to be used with
264 a MB93090-MB00 VDK motherboard
267 bool "Use standalone"
269 Select this option if the MB93091 CPU board is going to be used
270 without a motherboard
275 config FUJITSU_MB93493
276 bool "MB93493 Multimedia chip"
278 Select this option if the MB93493 multimedia chip is going to be
282 prompt "GP-Relative data support"
285 This option controls what data, if any, should be placed in the GP
286 relative data sections. Using this means that the compiler can
287 generate accesses to the data using GR16-relative addressing which
288 is faster than absolute instructions and saves space (2 instructions
291 However, the GPREL region is limited in size because the immediate
292 value used in the load and store instructions is limited to a 12-bit
295 So if the linker starts complaining that accesses to GPREL data are
296 out of range, try changing this option from the default.
298 Note that modules will always be compiled with this feature disabled
299 as the module data will not be in range of the GP base address.
302 bool "Put data objects of up to 8 bytes into GP-REL"
305 bool "Put data objects of up to 4 bytes into GP-REL"
307 config GPREL_DATA_NONE
308 bool "Don't use GP-REL"
312 config FRV_ONCPU_SERIAL
313 bool "Use on-CPU serial ports"
319 depends on MB93090_MB00
321 select GENERIC_PCI_IOMAP
323 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
324 onboard. If you have one of these boards and you wish to use the PCI
325 facilities, say Y here.
327 config RESERVE_DMA_COHERENT
328 bool "Reserve DMA coherent memory"
329 depends on PCI && !MMU
332 Many PCI drivers require access to uncached memory for DMA device
333 communications (such as is done with some Ethernet buffer rings). If
334 a fully featured MMU is available, this can be done through page
335 table settings, but if not, a region has to be set aside and marked
336 with a special DAMPR register.
338 Setting this option causes uClinux to set aside a portion of the
339 available memory for use in this manner. The memory will then be
340 unavailable for normal kernel use.
342 source "drivers/pci/Kconfig"
344 source "drivers/pcmcia/Kconfig"
346 menu "Power management options"
348 config ARCH_SUSPEND_POSSIBLE
351 source kernel/power/Kconfig
357 menu "Executable formats"
359 source "fs/Kconfig.binfmt"
365 source "drivers/Kconfig"
369 source "arch/frv/Kconfig.debug"
371 source "security/Kconfig"
373 source "crypto/Kconfig"