5 select HAVE_ARCH_TRACEHOOK
7 select HAVE_PERF_EVENTS
8 select HAVE_GENERIC_HARDIRQS
14 config RWSEM_GENERIC_SPINLOCK
18 config RWSEM_XCHGADD_ALGORITHM
21 config GENERIC_FIND_NEXT_BIT
25 config GENERIC_HWEIGHT
29 config GENERIC_CALIBRATE_DELAY
41 config ARCH_HAS_ILOG2_U32
45 config ARCH_HAS_ILOG2_U64
55 source "kernel/Kconfig.freezer"
58 menu "Fujitsu FR-V system setup"
63 This options switches on and off support for the FR-V MMU
64 (effectively switching between vmlinux and uClinux). Not all FR-V
65 CPUs support this. Currently only the FR451 has a sufficiently
68 config FRV_OUTOFLINE_ATOMIC_OPS
69 bool "Out-of-line the FRV atomic operations"
72 Setting this option causes the FR-V atomic operations to be mostly
73 implemented out-of-line.
75 See Documentation/frv/atomic-ops.txt for more information.
78 bool "High memory support"
82 If you wish to use more than 256MB of memory with your MMU based
83 system, you will need to select this option. The kernel can only see
84 the memory between 0xC0000000 and 0xD0000000 directly... everything
87 The arch is, however, capable of supporting up to 3GB of SDRAM.
90 bool "Allocate page tables in highmem"
94 The VM uses one page of memory for each page table. For systems
95 with a lot of RAM, this can be wasteful of precious low memory.
96 Setting this option will put user-space page tables in high memory.
101 prompt "uClinux kernel load address"
103 default UCPAGE_OFFSET_C0000000
105 This option sets the base address for the uClinux kernel. The kernel
106 will rearrange the SDRAM layout to start at this address, and move
107 itself to start there. It must be greater than 0, and it must be
108 sufficiently less than 0xE0000000 that the SDRAM does not intersect
111 The base address must also be aligned such that the SDRAM controller
112 can decode it. For instance, a 512MB SDRAM bank must be 512MB aligned.
114 config UCPAGE_OFFSET_20000000
117 config UCPAGE_OFFSET_40000000
120 config UCPAGE_OFFSET_60000000
123 config UCPAGE_OFFSET_80000000
126 config UCPAGE_OFFSET_A0000000
129 config UCPAGE_OFFSET_C0000000
130 bool "0xC0000000 (Recommended)"
136 default 0x20000000 if UCPAGE_OFFSET_20000000
137 default 0x40000000 if UCPAGE_OFFSET_40000000
138 default 0x60000000 if UCPAGE_OFFSET_60000000
139 default 0x80000000 if UCPAGE_OFFSET_80000000
140 default 0xA0000000 if UCPAGE_OFFSET_A0000000
143 config PROTECT_KERNEL
144 bool "Protect core kernel against userspace"
148 Selecting this option causes the uClinux kernel to change the
149 permittivity of DAMPR register covering the core kernel image to
150 prevent userspace accessing the underlying memory directly.
153 prompt "CPU Caching mode"
154 default FRV_DEFL_CACHE_WBACK
156 This option determines the default caching mode for the kernel.
158 Write-Back caching mode involves the all reads and writes causing
159 the affected cacheline to be read into the cache first before being
160 operated upon. Memory is not then updated by a write until the cache
161 is filled and a cacheline needs to be displaced from the cache to
162 make room. Only at that point is it written back.
164 Write-Behind caching is similar to Write-Back caching, except that a
165 write won't fetch a cacheline into the cache if there isn't already
166 one there; it will write directly to memory instead.
168 Write-Through caching only fetches cachelines from memory on a
169 read. Writes always get written directly to memory. If the affected
170 cacheline is also in cache, it will be updated too.
172 The final option is to turn of caching entirely.
174 Note that not all CPUs support Write-Behind caching. If the CPU on
175 which the kernel is running doesn't, it'll fall back to Write-Back
178 config FRV_DEFL_CACHE_WBACK
181 config FRV_DEFL_CACHE_WBEHIND
184 config FRV_DEFL_CACHE_WTHRU
187 config FRV_DEFL_CACHE_DISABLED
192 menu "CPU core support"
195 bool "Include FR401 core support"
199 This enables support for the FR401, FR401A and FR403 CPUs
202 bool "Include FR405 core support"
206 This enables support for the FR405 CPU
209 bool "Include FR451 core support"
212 This enables support for the FR451 CPU
214 config CPU_FR451_COMPILE
215 bool "Specifically compile for FR451 core"
216 depends on CPU_FR451 && !CPU_FR401 && !CPU_FR405 && !CPU_FR551
219 This causes appropriate flags to be passed to the compiler to
220 optimise for the FR451 CPU
223 bool "Include FR551 core support"
227 This enables support for the FR555 CPU
229 config CPU_FR551_COMPILE
230 bool "Specifically compile for FR551 core"
231 depends on CPU_FR551 && !CPU_FR401 && !CPU_FR405 && !CPU_FR451
234 This causes appropriate flags to be passed to the compiler to
235 optimise for the FR555 CPU
237 config FRV_L1_CACHE_SHIFT
239 default "5" if CPU_FR401 || CPU_FR405 || CPU_FR451
240 default "6" if CPU_FR551
245 prompt "System support"
249 bool "MB93091 CPU board with or without motherboard"
252 bool "MB93093 PDK unit"
258 prompt "Motherboard support"
262 bool "Use the MB93090-MB00 motherboard"
264 Select this option if the MB93091 CPU board is going to be used with
265 a MB93090-MB00 VDK motherboard
268 bool "Use standalone"
270 Select this option if the MB93091 CPU board is going to be used
271 without a motherboard
276 config FUJITSU_MB93493
277 bool "MB93493 Multimedia chip"
279 Select this option if the MB93493 multimedia chip is going to be
283 prompt "GP-Relative data support"
286 This option controls what data, if any, should be placed in the GP
287 relative data sections. Using this means that the compiler can
288 generate accesses to the data using GR16-relative addressing which
289 is faster than absolute instructions and saves space (2 instructions
292 However, the GPREL region is limited in size because the immediate
293 value used in the load and store instructions is limited to a 12-bit
296 So if the linker starts complaining that accesses to GPREL data are
297 out of range, try changing this option from the default.
299 Note that modules will always be compiled with this feature disabled
300 as the module data will not be in range of the GP base address.
303 bool "Put data objects of up to 8 bytes into GP-REL"
306 bool "Put data objects of up to 4 bytes into GP-REL"
308 config GPREL_DATA_NONE
309 bool "Don't use GP-REL"
313 config FRV_ONCPU_SERIAL
314 bool "Use on-CPU serial ports"
320 depends on MB93090_MB00
323 Some FR-V systems (such as the MB93090-MB00 VDK) have PCI
324 onboard. If you have one of these boards and you wish to use the PCI
325 facilities, say Y here.
327 config RESERVE_DMA_COHERENT
328 bool "Reserve DMA coherent memory"
329 depends on PCI && !MMU
332 Many PCI drivers require access to uncached memory for DMA device
333 communications (such as is done with some Ethernet buffer rings). If
334 a fully featured MMU is available, this can be done through page
335 table settings, but if not, a region has to be set aside and marked
336 with a special DAMPR register.
338 Setting this option causes uClinux to set aside a portion of the
339 available memory for use in this manner. The memory will then be
340 unavailable for normal kernel use.
342 source "drivers/pci/Kconfig"
344 source "drivers/pcmcia/Kconfig"
346 #config MATH_EMULATION
347 # bool "Math emulation support (EXPERIMENTAL)"
348 # depends on EXPERIMENTAL
350 # At some point in the future, this will cause floating-point math
351 # instructions to be emulated by the kernel on machines that lack a
352 # floating-point math coprocessor. Thrill-seekers and chronically
353 # sleep-deprived psychotic hacker types can say Y now, everyone else
354 # should probably wait a while.
356 menu "Power management options"
358 config ARCH_SUSPEND_POSSIBLE
362 source kernel/power/Kconfig
368 menu "Executable formats"
370 source "fs/Kconfig.binfmt"
376 source "drivers/Kconfig"
380 source "arch/frv/Kconfig.debug"
382 source "security/Kconfig"
384 source "crypto/Kconfig"