1 # SPDX-License-Identifier: GPL-2.0-only
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_DMA_PREP_COHERENT
6 select ARCH_HAS_GCOV_PROFILE_ALL
7 select ARCH_HAS_SYNC_DMA_FOR_CPU
8 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
9 select ARCH_USE_BUILTIN_BSWAP
10 select ARCH_USE_QUEUED_RWLOCKS
11 select ARCH_USE_QUEUED_SPINLOCKS
12 select ARCH_HAS_CURRENT_STACK_POINTER
13 select ARCH_INLINE_READ_LOCK if !PREEMPTION
14 select ARCH_INLINE_READ_LOCK_BH if !PREEMPTION
15 select ARCH_INLINE_READ_LOCK_IRQ if !PREEMPTION
16 select ARCH_INLINE_READ_LOCK_IRQSAVE if !PREEMPTION
17 select ARCH_INLINE_READ_UNLOCK if !PREEMPTION
18 select ARCH_INLINE_READ_UNLOCK_BH if !PREEMPTION
19 select ARCH_INLINE_READ_UNLOCK_IRQ if !PREEMPTION
20 select ARCH_INLINE_READ_UNLOCK_IRQRESTORE if !PREEMPTION
21 select ARCH_INLINE_WRITE_LOCK if !PREEMPTION
22 select ARCH_INLINE_WRITE_LOCK_BH if !PREEMPTION
23 select ARCH_INLINE_WRITE_LOCK_IRQ if !PREEMPTION
24 select ARCH_INLINE_WRITE_LOCK_IRQSAVE if !PREEMPTION
25 select ARCH_INLINE_WRITE_UNLOCK if !PREEMPTION
26 select ARCH_INLINE_WRITE_UNLOCK_BH if !PREEMPTION
27 select ARCH_INLINE_WRITE_UNLOCK_IRQ if !PREEMPTION
28 select ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE if !PREEMPTION
29 select ARCH_INLINE_SPIN_TRYLOCK if !PREEMPTION
30 select ARCH_INLINE_SPIN_TRYLOCK_BH if !PREEMPTION
31 select ARCH_INLINE_SPIN_LOCK if !PREEMPTION
32 select ARCH_INLINE_SPIN_LOCK_BH if !PREEMPTION
33 select ARCH_INLINE_SPIN_LOCK_IRQ if !PREEMPTION
34 select ARCH_INLINE_SPIN_LOCK_IRQSAVE if !PREEMPTION
35 select ARCH_INLINE_SPIN_UNLOCK if !PREEMPTION
36 select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
37 select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
38 select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
39 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
40 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
43 select CSKY_MPINTC if CPU_CK860
44 select CSKY_MP_TIMER if CPU_CK860
46 select DMA_DIRECT_REMAP
48 select DW_APB_TIMER_OF
49 select GENERIC_IOREMAP
50 select GENERIC_LIB_ASHLDI3
51 select GENERIC_LIB_ASHRDI3
52 select GENERIC_LIB_LSHRDI3
53 select GENERIC_LIB_MULDI3
54 select GENERIC_LIB_CMPDI2
55 select GENERIC_LIB_UCMPDI2
56 select GENERIC_ALLOCATOR
57 select GENERIC_ATOMIC64
58 select GENERIC_CPU_DEVICES
59 select GENERIC_IRQ_CHIP
60 select GENERIC_IRQ_PROBE
61 select GENERIC_IRQ_SHOW
62 select GENERIC_IRQ_MULTI_HANDLER
63 select GENERIC_SCHED_CLOCK
64 select GENERIC_SMP_IDLE_THREAD
65 select GENERIC_TIME_VSYSCALL
66 select GENERIC_VDSO_32
67 select GENERIC_GETTIMEOFDAY
68 select GX6605S_TIMER if CPU_CK610
69 select HAVE_ARCH_TRACEHOOK
70 select HAVE_ARCH_AUDITSYSCALL
71 select HAVE_ARCH_JUMP_LABEL if !CPU_CK610
72 select HAVE_ARCH_JUMP_LABEL_RELATIVE
73 select HAVE_ARCH_MMAP_RND_BITS
74 select HAVE_ARCH_SECCOMP_FILTER
75 select HAVE_CONTEXT_TRACKING_USER
76 select HAVE_VIRT_CPU_ACCOUNTING_GEN
77 select HAVE_DEBUG_BUGVERBOSE
78 select HAVE_DEBUG_KMEMLEAK
79 select HAVE_DYNAMIC_FTRACE
80 select HAVE_DYNAMIC_FTRACE_WITH_REGS
81 select HAVE_GENERIC_VDSO
82 select HAVE_FUNCTION_TRACER
83 select HAVE_FUNCTION_GRAPH_TRACER
84 select HAVE_FUNCTION_ERROR_INJECTION
85 select HAVE_FTRACE_MCOUNT_RECORD
86 select HAVE_KERNEL_GZIP
87 select HAVE_KERNEL_LZO
88 select HAVE_KERNEL_LZMA
89 select HAVE_KPROBES if !CPU_CK610
90 select HAVE_KPROBES_ON_FTRACE if !CPU_CK610
91 select HAVE_KRETPROBES if !CPU_CK610
92 select HAVE_PERF_EVENTS
94 select HAVE_PERF_USER_STACK_DUMP
95 select HAVE_DMA_CONTIGUOUS
96 select HAVE_REGS_AND_STACK_ACCESS_API
97 select HAVE_STACKPROTECTOR
98 select HAVE_SYSCALL_TRACEPOINTS
99 select MAY_HAVE_SPARSE_IRQ
100 select MODULES_USE_ELF_RELA if MODULES
102 select OF_EARLY_FLATTREE
103 select PERF_USE_VMALLOC if CPU_CK610
106 select GENERIC_PCI_IOMAP
108 select PCI_DOMAINS_GENERIC if PCI
109 select PCI_SYSCALL if PCI
110 select PCI_MSI if PCI
111 select TRACE_IRQFLAGS_SUPPORT
113 config LOCKDEP_SUPPORT
116 config ARCH_SUPPORTS_UPROBES
117 def_bool y if !CPU_CK610
119 config CPU_HAS_CACHEV2
131 config CPU_HAS_LDSTEX
134 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
136 config CPU_NEED_TLBSYNC
139 config CPU_NEED_SOFTALIGN
142 config CPU_NO_USER_BKPT
145 For abiv2 we couldn't use "trap 1" as user space bkpt in gdbserver, because
146 abiv2 is 16/32bit instruction set and "trap 1" is 32bit.
147 So we need a 16bit instruction as user space bkpt, and it will cause an illegal
148 instruction exception.
149 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
151 config GENERIC_CALIBRATE_DELAY
157 config GENERIC_HWEIGHT
163 config STACKTRACE_SUPPORT
171 default "128" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
172 default "1024" if (CPU_CK860)
176 default "8" if (CPU_CK610 || CPU_CK807 || CPU_CK810)
177 default "12" if (CPU_CK860)
179 config L1_CACHE_SHIFT
181 default "4" if (CPU_CK610)
182 default "5" if (CPU_CK807 || CPU_CK810)
183 default "6" if (CPU_CK860)
185 config ARCH_MMAP_RND_BITS_MIN
188 # max bits determined by the following formula:
189 # VA_BITS - PAGE_SHIFT - 3
190 config ARCH_MMAP_RND_BITS_MAX
193 menu "Processor type and features"
200 bool "CSKY CPU ck610"
201 select CPU_NEED_TLBSYNC
202 select CPU_NEED_SOFTALIGN
203 select CPU_NO_USER_BKPT
206 bool "CSKY CPU ck810"
208 select CPU_NEED_TLBSYNC
211 bool "CSKY CPU ck807"
215 bool "CSKY CPU ck860"
217 select CPU_HAS_CACHEV2
218 select CPU_HAS_LDSTEX
224 default PAGE_OFFSET_80000000
226 config PAGE_OFFSET_80000000
227 bool "PAGE OFFSET 2G (user:kernel = 2:2)"
229 config PAGE_OFFSET_A0000000
230 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
235 default 0x80000000 if PAGE_OFFSET_80000000
236 default 0xa0000000 if PAGE_OFFSET_A0000000
239 prompt "C-SKY PMU type"
240 depends on PERF_EVENTS
241 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
247 bool "Performance Monitoring Unit Ver.1"
252 prompt "Power Manager Instruction (wait/doze/stop)"
269 bool "Tightly-Coupled/Sram Memory"
270 depends on !COMPILE_TEST
272 The implementation are not only used by TCM (Tightly-Coupled Memory)
273 but also used by sram on SOC bus. It follow existed linux tcm
274 software interface, so that old tcm application codes could be
283 int "Page count of ITCM size: NR*4KB"
296 int "Page count of DTCM size: NR*4KB"
303 bool "CPU has VDSP coprocessor"
304 depends on CPU_HAS_FPU && CPU_HAS_FPUV2
307 bool "CPU has FPU coprocessor"
308 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
310 config CPU_HAS_ICACHE_INS
311 bool "CPU has Icache invalidate instructions"
312 depends on CPU_HAS_CACHEV2
315 bool "CPU has Trusted Execution Environment"
319 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
324 int "Maximum number of CPUs (2-32)"
330 bool "High Memory Support"
331 depends on !CPU_CK610
335 config ARCH_FORCE_MAX_ORDER
336 int "Maximum zone order"
340 hex "DRAM start addr (the same with memory-section in dts)"
344 bool "Support for hot-pluggable CPUs"
345 select GENERIC_IRQ_MIGRATION
348 Say Y here to allow turning CPUs off and on. CPUs can be
349 controlled through /sys/devices/system/cpu/cpu1/hotplug/target.
351 Say N if you want to disable CPU hotplug.
353 config HAVE_EFFICIENT_UNALIGNED_STRING_OPS
354 bool "Enable EFFICIENT_UNALIGNED_STRING_OPS for abiv2"
355 depends on CPU_CK807 || CPU_CK810 || CPU_CK860
357 Say Y here to enable EFFICIENT_UNALIGNED_STRING_OPS. Some CPU models could
358 deal with unaligned access by hardware.
362 source "arch/csky/Kconfig.platforms"
364 source "kernel/Kconfig.hz"