2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <asm/bfin_spi3.h>
25 #include <asm/portmux.h>
26 #include <asm/bfin_sdh.h>
27 #include <linux/input.h>
28 #include <linux/spi/ad7877.h>
31 * Name the Board for the /proc/cpuinfo
33 const char bfin_board_name[] = "ADI BF609-EZKIT";
36 * Driver needs to know address, irq and flag pin.
39 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
40 #include <linux/usb/isp1760.h>
41 static struct resource bfin_isp1760_resources[] = {
44 .end = 0x2C0C0000 + 0xfffff,
45 .flags = IORESOURCE_MEM,
50 .flags = IORESOURCE_IRQ,
54 static struct isp1760_platform_data isp1760_priv = {
59 .dack_polarity_high = 0,
60 .dreq_polarity_high = 0,
63 static struct platform_device bfin_isp1760_device = {
67 .platform_data = &isp1760_priv,
69 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
70 .resource = bfin_isp1760_resources,
74 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
75 #include <asm/bfin_rotary.h>
77 static struct bfin_rotary_platform_data bfin_rotary_data = {
78 /*.rotary_up_key = KEY_UP,*/
79 /*.rotary_down_key = KEY_DOWN,*/
80 .rotary_rel_code = REL_WHEEL,
81 .rotary_button_key = KEY_ENTER,
82 .debounce = 10, /* 0..17 */
83 .mode = ROT_QUAD_ENC | ROT_DEBE,
86 static struct resource bfin_rotary_resources[] = {
90 .flags = IORESOURCE_IRQ,
94 static struct platform_device bfin_rotary_device = {
95 .name = "bfin-rotary",
97 .num_resources = ARRAY_SIZE(bfin_rotary_resources),
98 .resource = bfin_rotary_resources,
100 .platform_data = &bfin_rotary_data,
105 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
106 #include <linux/stmmac.h>
108 static unsigned short pins[] = P_RMII0;
110 static struct stmmac_mdio_bus_data phy_private_data = {
114 static struct plat_stmmacenet_data eth_private_data = {
118 .mdio_bus_data = &phy_private_data,
121 static struct platform_device bfin_eth_device = {
125 .resource = (struct resource[]) {
127 .start = EMAC0_MACCFG,
128 .end = EMAC0_MACCFG + 0x1274,
129 .flags = IORESOURCE_MEM,
133 .start = IRQ_EMAC0_STAT,
134 .end = IRQ_EMAC0_STAT,
135 .flags = IORESOURCE_IRQ,
139 .power.can_wakeup = 1,
140 .platform_data = ð_private_data,
145 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
146 #include <linux/input/adxl34x.h>
147 static const struct adxl34x_platform_data adxl34x_info = {
151 .tap_threshold = 0x31,
152 .tap_duration = 0x10,
155 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
156 .act_axis_control = 0xFF,
157 .activity_threshold = 5,
158 .inactivity_threshold = 3,
159 .inactivity_time = 4,
160 .free_fall_threshold = 0x7,
161 .free_fall_time = 0x20,
163 .data_range = ADXL_FULL_RES,
166 .ev_code_x = ABS_X, /* EV_REL */
167 .ev_code_y = ABS_Y, /* EV_REL */
168 .ev_code_z = ABS_Z, /* EV_REL */
170 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
172 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
173 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
174 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
175 .fifo_mode = ADXL_FIFO_STREAM,
176 .orientation_enable = ADXL_EN_ORIENTATION_3D,
177 .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
178 .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
179 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
180 .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
184 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
185 static struct platform_device rtc_device = {
191 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
192 #ifdef CONFIG_SERIAL_BFIN_UART0
193 static struct resource bfin_uart0_resources[] = {
195 .start = UART0_REVID,
196 .end = UART0_RXDIV+4,
197 .flags = IORESOURCE_MEM,
200 .start = IRQ_UART0_TX,
202 .flags = IORESOURCE_IRQ,
205 .start = IRQ_UART0_RX,
207 .flags = IORESOURCE_IRQ,
210 .start = IRQ_UART0_STAT,
211 .end = IRQ_UART0_STAT,
212 .flags = IORESOURCE_IRQ,
215 .start = CH_UART0_TX,
217 .flags = IORESOURCE_DMA,
220 .start = CH_UART0_RX,
222 .flags = IORESOURCE_DMA,
224 #ifdef CONFIG_BFIN_UART0_CTSRTS
225 { /* CTS pin -- 0 means not supported */
228 .flags = IORESOURCE_IO,
230 { /* RTS pin -- 0 means not supported */
233 .flags = IORESOURCE_IO,
238 static unsigned short bfin_uart0_peripherals[] = {
239 P_UART0_TX, P_UART0_RX,
240 #ifdef CONFIG_BFIN_UART0_CTSRTS
241 P_UART0_RTS, P_UART0_CTS,
246 static struct platform_device bfin_uart0_device = {
249 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
250 .resource = bfin_uart0_resources,
252 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
256 #ifdef CONFIG_SERIAL_BFIN_UART1
257 static struct resource bfin_uart1_resources[] = {
259 .start = UART1_REVID,
260 .end = UART1_RXDIV+4,
261 .flags = IORESOURCE_MEM,
264 .start = IRQ_UART1_TX,
266 .flags = IORESOURCE_IRQ,
269 .start = IRQ_UART1_RX,
271 .flags = IORESOURCE_IRQ,
274 .start = IRQ_UART1_STAT,
275 .end = IRQ_UART1_STAT,
276 .flags = IORESOURCE_IRQ,
279 .start = CH_UART1_TX,
281 .flags = IORESOURCE_DMA,
284 .start = CH_UART1_RX,
286 .flags = IORESOURCE_DMA,
288 #ifdef CONFIG_BFIN_UART1_CTSRTS
289 { /* CTS pin -- 0 means not supported */
292 .flags = IORESOURCE_IO,
294 { /* RTS pin -- 0 means not supported */
297 .flags = IORESOURCE_IO,
302 static unsigned short bfin_uart1_peripherals[] = {
303 P_UART1_TX, P_UART1_RX,
304 #ifdef CONFIG_BFIN_UART1_CTSRTS
305 P_UART1_RTS, P_UART1_CTS,
310 static struct platform_device bfin_uart1_device = {
313 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
314 .resource = bfin_uart1_resources,
316 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
322 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
323 #ifdef CONFIG_BFIN_SIR0
324 static struct resource bfin_sir0_resources[] = {
328 .flags = IORESOURCE_MEM,
331 .start = IRQ_UART0_TX,
332 .end = IRQ_UART0_TX+1,
333 .flags = IORESOURCE_IRQ,
336 .start = CH_UART0_TX,
337 .end = CH_UART0_TX+1,
338 .flags = IORESOURCE_DMA,
341 static struct platform_device bfin_sir0_device = {
344 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
345 .resource = bfin_sir0_resources,
348 #ifdef CONFIG_BFIN_SIR1
349 static struct resource bfin_sir1_resources[] = {
353 .flags = IORESOURCE_MEM,
356 .start = IRQ_UART1_TX,
357 .end = IRQ_UART1_TX+1,
358 .flags = IORESOURCE_IRQ,
361 .start = CH_UART1_TX,
362 .end = CH_UART1_TX+1,
363 .flags = IORESOURCE_DMA,
366 static struct platform_device bfin_sir1_device = {
369 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
370 .resource = bfin_sir1_resources,
375 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
376 static struct resource musb_resources[] = {
380 .flags = IORESOURCE_MEM,
382 [1] = { /* general IRQ */
383 .start = IRQ_USB_STAT,
385 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
388 [2] = { /* DMA IRQ */
389 .start = IRQ_USB_DMA,
391 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
396 static struct musb_hdrc_config musb_config = {
402 .clkin = 48, /* musb CLKIN in MHZ */
405 static struct musb_hdrc_platform_data musb_plat = {
406 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
408 #elif defined(CONFIG_USB_MUSB_HDRC)
410 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
411 .mode = MUSB_PERIPHERAL,
413 .config = &musb_config,
416 static u64 musb_dmamask = ~(u32)0;
418 static struct platform_device musb_device = {
419 .name = "musb-blackfin",
422 .dma_mask = &musb_dmamask,
423 .coherent_dma_mask = 0xffffffff,
424 .platform_data = &musb_plat,
426 .num_resources = ARRAY_SIZE(musb_resources),
427 .resource = musb_resources,
431 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
432 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
433 static struct resource bfin_sport0_uart_resources[] = {
435 .start = SPORT0_TCR1,
436 .end = SPORT0_MRCS3+4,
437 .flags = IORESOURCE_MEM,
440 .start = IRQ_SPORT0_RX,
441 .end = IRQ_SPORT0_RX+1,
442 .flags = IORESOURCE_IRQ,
445 .start = IRQ_SPORT0_ERROR,
446 .end = IRQ_SPORT0_ERROR,
447 .flags = IORESOURCE_IRQ,
451 static unsigned short bfin_sport0_peripherals[] = {
452 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
453 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
456 static struct platform_device bfin_sport0_uart_device = {
457 .name = "bfin-sport-uart",
459 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
460 .resource = bfin_sport0_uart_resources,
462 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
466 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
467 static struct resource bfin_sport1_uart_resources[] = {
469 .start = SPORT1_TCR1,
470 .end = SPORT1_MRCS3+4,
471 .flags = IORESOURCE_MEM,
474 .start = IRQ_SPORT1_RX,
475 .end = IRQ_SPORT1_RX+1,
476 .flags = IORESOURCE_IRQ,
479 .start = IRQ_SPORT1_ERROR,
480 .end = IRQ_SPORT1_ERROR,
481 .flags = IORESOURCE_IRQ,
485 static unsigned short bfin_sport1_peripherals[] = {
486 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
487 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
490 static struct platform_device bfin_sport1_uart_device = {
491 .name = "bfin-sport-uart",
493 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
494 .resource = bfin_sport1_uart_resources,
496 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
500 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
501 static struct resource bfin_sport2_uart_resources[] = {
503 .start = SPORT2_TCR1,
504 .end = SPORT2_MRCS3+4,
505 .flags = IORESOURCE_MEM,
508 .start = IRQ_SPORT2_RX,
509 .end = IRQ_SPORT2_RX+1,
510 .flags = IORESOURCE_IRQ,
513 .start = IRQ_SPORT2_ERROR,
514 .end = IRQ_SPORT2_ERROR,
515 .flags = IORESOURCE_IRQ,
519 static unsigned short bfin_sport2_peripherals[] = {
520 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
521 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
524 static struct platform_device bfin_sport2_uart_device = {
525 .name = "bfin-sport-uart",
527 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
528 .resource = bfin_sport2_uart_resources,
530 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
536 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
538 static unsigned short bfin_can0_peripherals[] = {
539 P_CAN0_RX, P_CAN0_TX, 0
542 static struct resource bfin_can0_resources[] = {
546 .flags = IORESOURCE_MEM,
549 .start = IRQ_CAN0_RX,
551 .flags = IORESOURCE_IRQ,
554 .start = IRQ_CAN0_TX,
556 .flags = IORESOURCE_IRQ,
559 .start = IRQ_CAN0_STAT,
560 .end = IRQ_CAN0_STAT,
561 .flags = IORESOURCE_IRQ,
565 static struct platform_device bfin_can0_device = {
568 .num_resources = ARRAY_SIZE(bfin_can0_resources),
569 .resource = bfin_can0_resources,
571 .platform_data = &bfin_can0_peripherals, /* Passed to driver */
577 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
578 static struct mtd_partition partition_info[] = {
580 .name = "bootloader(nand)",
584 .name = "linux kernel(nand)",
585 .offset = MTDPART_OFS_APPEND,
586 .size = 4 * 1024 * 1024,
589 .name = "file system(nand)",
590 .offset = MTDPART_OFS_APPEND,
591 .size = MTDPART_SIZ_FULL,
595 static struct bf5xx_nand_platform bfin_nand_platform = {
596 .data_width = NFC_NWIDTH_8,
597 .partitions = partition_info,
598 .nr_partitions = ARRAY_SIZE(partition_info),
603 static struct resource bfin_nand_resources[] = {
607 .flags = IORESOURCE_MEM,
612 .flags = IORESOURCE_IRQ,
616 static struct platform_device bfin_nand_device = {
619 .num_resources = ARRAY_SIZE(bfin_nand_resources),
620 .resource = bfin_nand_resources,
622 .platform_data = &bfin_nand_platform,
627 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
629 static struct bfin_sd_host bfin_sdh_data = {
631 .irq_int0 = IRQ_RSI_INT0,
632 .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
635 static struct platform_device bfin_sdh_device = {
639 .platform_data = &bfin_sdh_data,
644 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
645 static struct mtd_partition ezkit_partitions[] = {
647 .name = "bootloader(nor)",
651 .name = "linux kernel(nor)",
653 .offset = MTDPART_OFS_APPEND,
655 .name = "file system(nor)",
656 .size = 0x1000000 - 0x80000 - 0x400000,
657 .offset = MTDPART_OFS_APPEND,
661 int bf609_nor_flash_init(struct platform_device *dev)
663 #define CONFIG_SMC_GCTL_VAL 0x00000010
664 const unsigned short pins[] = {
665 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
666 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
667 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
670 peripheral_request_list(pins, "smc0");
672 bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
673 bfin_write32(SMC_B0CTL, 0x01002011);
674 bfin_write32(SMC_B0TIM, 0x08170977);
675 bfin_write32(SMC_B0ETIM, 0x00092231);
679 void bf609_nor_flash_exit(struct platform_device *dev)
681 const unsigned short pins[] = {
682 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
683 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
684 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
687 peripheral_free_list(pins);
689 bfin_write32(SMC_GCTL, 0);
692 static struct physmap_flash_data ezkit_flash_data = {
694 .parts = ezkit_partitions,
695 .init = bf609_nor_flash_init,
696 .exit = bf609_nor_flash_exit,
697 .nr_parts = ARRAY_SIZE(ezkit_partitions),
698 #ifdef CONFIG_ROMKERNEL
699 .probe_type = "map_rom",
703 static struct resource ezkit_flash_resource = {
706 .flags = IORESOURCE_MEM,
709 static struct platform_device ezkit_flash_device = {
710 .name = "physmap-flash",
713 .platform_data = &ezkit_flash_data,
716 .resource = &ezkit_flash_resource,
720 #if defined(CONFIG_MTD_M25P80) \
721 || defined(CONFIG_MTD_M25P80_MODULE)
722 /* SPI flash chip (w25q32) */
723 static struct mtd_partition bfin_spi_flash_partitions[] = {
725 .name = "bootloader(spi)",
728 .mask_flags = MTD_CAP_ROM
730 .name = "linux kernel(spi)",
732 .offset = MTDPART_OFS_APPEND,
734 .name = "file system(spi)",
735 .size = MTDPART_SIZ_FULL,
736 .offset = MTDPART_OFS_APPEND,
740 static struct flash_platform_data bfin_spi_flash_data = {
742 .parts = bfin_spi_flash_partitions,
743 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
747 static struct bfin_spi3_chip spi_flash_chip_info = {
748 .enable_dma = true, /* use dma transfer with this chip*/
752 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
753 static struct bfin_spi3_chip spidev_chip_info = {
758 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
759 static struct platform_device bfin_i2s_pcm = {
760 .name = "bfin-i2s-pcm-audio",
765 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
766 defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
767 #include <asm/bfin_sport3.h>
768 static struct resource bfin_snd_resources[] = {
770 .start = SPORT0_CTL_A,
772 .flags = IORESOURCE_MEM,
775 .start = SPORT0_CTL_B,
777 .flags = IORESOURCE_MEM,
780 .start = CH_SPORT0_TX,
782 .flags = IORESOURCE_DMA,
785 .start = CH_SPORT0_RX,
787 .flags = IORESOURCE_DMA,
790 .start = IRQ_SPORT0_TX_STAT,
791 .end = IRQ_SPORT0_TX_STAT,
792 .flags = IORESOURCE_IRQ,
795 .start = IRQ_SPORT0_RX_STAT,
796 .end = IRQ_SPORT0_RX_STAT,
797 .flags = IORESOURCE_IRQ,
801 static const unsigned short bfin_snd_pin[] = {
802 P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
803 P_SPORT0_BFS, P_SPORT0_BD0, 0,
806 static struct bfin_snd_platform_data bfin_snd_data = {
807 .pin_req = bfin_snd_pin,
810 static struct platform_device bfin_i2s = {
812 .num_resources = ARRAY_SIZE(bfin_snd_resources),
813 .resource = bfin_snd_resources,
815 .platform_data = &bfin_snd_data,
820 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
821 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
822 static const char * const ad1836_link[] = {
826 static struct platform_device bfin_ad1836_machine = {
827 .name = "bfin-snd-ad1836",
830 .platform_data = (void *)ad1836_link,
835 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
836 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
837 static struct platform_device adau1761_device = {
838 .name = "bfin-eval-adau1x61",
842 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
843 #include <sound/adau17x1.h>
844 static struct adau1761_platform_data adau1761_info = {
845 .lineout_mode = ADAU1761_OUTPUT_MODE_LINE,
846 .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
850 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
851 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
852 #include <linux/videodev2.h>
853 #include <media/blackfin/bfin_capture.h>
854 #include <media/blackfin/ppi.h>
856 static const unsigned short ppi_req[] = {
857 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
858 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
859 P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
860 P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
861 #if !defined(CONFIG_VIDEO_VS6624) && !defined(CONFIG_VIDEO_VS6624_MODULE)
862 P_PPI0_D16, P_PPI0_D17, P_PPI0_D18, P_PPI0_D19,
863 P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23,
865 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
869 static const struct ppi_info ppi_info = {
870 .type = PPI_TYPE_EPPI3,
871 .dma_ch = CH_EPPI0_CH0,
872 .irq_err = IRQ_EPPI0_STAT,
873 .base = (void __iomem *)EPPI0_STAT,
877 #if defined(CONFIG_VIDEO_VS6624) \
878 || defined(CONFIG_VIDEO_VS6624_MODULE)
879 static struct v4l2_input vs6624_inputs[] = {
883 .type = V4L2_INPUT_TYPE_CAMERA,
884 .std = V4L2_STD_UNKNOWN,
888 static struct bcap_route vs6624_routes[] = {
895 static const unsigned vs6624_ce_pin = GPIO_PE4;
897 static struct bfin_capture_config bfin_capture_data = {
898 .card_name = "BF609",
899 .inputs = vs6624_inputs,
900 .num_inputs = ARRAY_SIZE(vs6624_inputs),
901 .routes = vs6624_routes,
906 .platform_data = (void *)&vs6624_ce_pin,
908 .ppi_info = &ppi_info,
909 .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI
910 | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
915 #if defined(CONFIG_VIDEO_ADV7842) \
916 || defined(CONFIG_VIDEO_ADV7842_MODULE)
917 #include <media/adv7842.h>
919 static struct v4l2_input adv7842_inputs[] = {
923 .type = V4L2_INPUT_TYPE_CAMERA,
925 .capabilities = V4L2_IN_CAP_STD,
930 .type = V4L2_INPUT_TYPE_CAMERA,
932 .capabilities = V4L2_IN_CAP_STD,
937 .type = V4L2_INPUT_TYPE_CAMERA,
938 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
943 .type = V4L2_INPUT_TYPE_CAMERA,
944 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
949 .type = V4L2_INPUT_TYPE_CAMERA,
950 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
954 static struct bcap_route adv7842_routes[] = {
958 .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL
959 | EPPI_CTL_ACTIVE656),
976 .ppi_control = (EPPI_CTL_SPLTWRD | PACK_EN | DLEN_16
977 | EPPI_CTL_FS1LO_FS2LO | EPPI_CTL_POLC2
978 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
982 static struct adv7842_output_format adv7842_opf[] = {
984 .op_ch_sel = ADV7842_OP_CH_SEL_BRG,
985 .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_8,
988 .insert_av_codes = 1,
991 .op_ch_sel = ADV7842_OP_CH_SEL_RGB,
992 .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_16,
998 static struct adv7842_platform_data adv7842_data = {
1000 .num_opf = ARRAY_SIZE(adv7842_opf),
1001 .ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1,
1002 .prim_mode = ADV7842_PRIM_MODE_SDP,
1003 .vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1,
1004 .inp_color_space = ADV7842_INP_COLOR_SPACE_AUTO,
1011 .i2c_repeater = 0x46,
1013 .i2c_infoframe = 0x48,
1019 static struct bfin_capture_config bfin_capture_data = {
1020 .card_name = "BF609",
1021 .inputs = adv7842_inputs,
1022 .num_inputs = ARRAY_SIZE(adv7842_inputs),
1023 .routes = adv7842_routes,
1024 .i2c_adapter_id = 0,
1028 .platform_data = (void *)&adv7842_data,
1030 .ppi_info = &ppi_info,
1031 .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL
1032 | EPPI_CTL_ACTIVE656),
1036 static struct platform_device bfin_capture_device = {
1037 .name = "bfin_capture",
1039 .platform_data = &bfin_capture_data,
1044 #if defined(CONFIG_VIDEO_BLACKFIN_DISPLAY) \
1045 || defined(CONFIG_VIDEO_BLACKFIN_DISPLAY_MODULE)
1046 #include <linux/videodev2.h>
1047 #include <media/blackfin/bfin_display.h>
1048 #include <media/blackfin/ppi.h>
1050 static const unsigned short ppi_req_disp[] = {
1051 P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
1052 P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
1053 P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
1054 P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
1055 P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
1059 static const struct ppi_info ppi_info = {
1060 .type = PPI_TYPE_EPPI3,
1061 .dma_ch = CH_EPPI0_CH0,
1062 .irq_err = IRQ_EPPI0_STAT,
1063 .base = (void __iomem *)EPPI0_STAT,
1064 .pin_req = ppi_req_disp,
1067 #if defined(CONFIG_VIDEO_ADV7511) \
1068 || defined(CONFIG_VIDEO_ADV7511_MODULE)
1069 #include <media/adv7511.h>
1071 static struct v4l2_output adv7511_outputs[] = {
1075 .type = V4L2_INPUT_TYPE_CAMERA,
1076 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
1080 static struct disp_route adv7511_routes[] = {
1086 static struct adv7511_platform_data adv7511_data = {
1091 static struct bfin_display_config bfin_display_data = {
1092 .card_name = "BF609",
1093 .outputs = adv7511_outputs,
1094 .num_outputs = ARRAY_SIZE(adv7511_outputs),
1095 .routes = adv7511_routes,
1096 .i2c_adapter_id = 0,
1100 .platform_data = (void *)&adv7511_data,
1102 .ppi_info = &ppi_info,
1103 .ppi_control = (EPPI_CTL_SPLTWRD | PACK_EN | DLEN_16
1104 | EPPI_CTL_FS1LO_FS2LO | EPPI_CTL_POLC3
1105 | EPPI_CTL_IFSGEN | EPPI_CTL_SYNC2
1106 | EPPI_CTL_NON656 | EPPI_CTL_DIR),
1110 #if IS_ENABLED(CONFIG_VIDEO_ADV7343)
1111 #include <media/adv7343.h>
1113 static struct v4l2_output adv7343_outputs[] = {
1116 .name = "Composite",
1117 .type = V4L2_OUTPUT_TYPE_ANALOG,
1118 .std = V4L2_STD_ALL,
1119 .capabilities = V4L2_OUT_CAP_STD,
1124 .type = V4L2_OUTPUT_TYPE_ANALOG,
1125 .std = V4L2_STD_ALL,
1126 .capabilities = V4L2_OUT_CAP_STD,
1130 .name = "Component",
1131 .type = V4L2_OUTPUT_TYPE_ANALOG,
1132 .std = V4L2_STD_ALL,
1133 .capabilities = V4L2_OUT_CAP_STD,
1138 static struct disp_route adv7343_routes[] = {
1140 .output = ADV7343_COMPOSITE_ID,
1143 .output = ADV7343_SVIDEO_ID,
1146 .output = ADV7343_COMPONENT_ID,
1150 static struct adv7343_platform_data adv7343_data = {
1152 .sleep_mode = false,
1153 .pll_control = false,
1162 .sd_dac_out1 = false,
1163 .sd_dac_out2 = false,
1167 static struct bfin_display_config bfin_display_data = {
1168 .card_name = "BF609",
1169 .outputs = adv7343_outputs,
1170 .num_outputs = ARRAY_SIZE(adv7343_outputs),
1171 .routes = adv7343_routes,
1172 .i2c_adapter_id = 0,
1176 .platform_data = (void *)&adv7343_data,
1178 .ppi_info = &ppi_info_disp,
1179 .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1LO_FS2LO
1180 | EPPI_CTL_POLC3 | EPPI_CTL_BLANKGEN | EPPI_CTL_SYNC2
1181 | EPPI_CTL_NON656 | EPPI_CTL_DIR),
1185 static struct platform_device bfin_display_device = {
1186 .name = "bfin_display",
1188 .platform_data = &bfin_display_data,
1193 #if defined(CONFIG_BFIN_CRC)
1194 #define BFIN_CRC_NAME "bfin-crc"
1196 static struct resource bfin_crc0_resources[] = {
1198 .start = REG_CRC0_CTL,
1199 .end = REG_CRC0_REVID+4,
1200 .flags = IORESOURCE_MEM,
1203 .start = IRQ_CRC0_DCNTEXP,
1204 .end = IRQ_CRC0_DCNTEXP,
1205 .flags = IORESOURCE_IRQ,
1208 .start = CH_MEM_STREAM0_SRC_CRC0,
1209 .end = CH_MEM_STREAM0_SRC_CRC0,
1210 .flags = IORESOURCE_DMA,
1213 .start = CH_MEM_STREAM0_DEST_CRC0,
1214 .end = CH_MEM_STREAM0_DEST_CRC0,
1215 .flags = IORESOURCE_DMA,
1219 static struct platform_device bfin_crc0_device = {
1220 .name = BFIN_CRC_NAME,
1222 .num_resources = ARRAY_SIZE(bfin_crc0_resources),
1223 .resource = bfin_crc0_resources,
1226 static struct resource bfin_crc1_resources[] = {
1228 .start = REG_CRC1_CTL,
1229 .end = REG_CRC1_REVID+4,
1230 .flags = IORESOURCE_MEM,
1233 .start = IRQ_CRC1_DCNTEXP,
1234 .end = IRQ_CRC1_DCNTEXP,
1235 .flags = IORESOURCE_IRQ,
1238 .start = CH_MEM_STREAM1_SRC_CRC1,
1239 .end = CH_MEM_STREAM1_SRC_CRC1,
1240 .flags = IORESOURCE_DMA,
1243 .start = CH_MEM_STREAM1_DEST_CRC1,
1244 .end = CH_MEM_STREAM1_DEST_CRC1,
1245 .flags = IORESOURCE_DMA,
1249 static struct platform_device bfin_crc1_device = {
1250 .name = BFIN_CRC_NAME,
1252 .num_resources = ARRAY_SIZE(bfin_crc1_resources),
1253 .resource = bfin_crc1_resources,
1257 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1258 #define BFIN_CRYPTO_CRC_NAME "bfin-hmac-crc"
1259 #define BFIN_CRYPTO_CRC_POLY_DATA 0x5c5c5c5c
1261 static struct resource bfin_crypto_crc_resources[] = {
1263 .start = REG_CRC0_CTL,
1264 .end = REG_CRC0_REVID+4,
1265 .flags = IORESOURCE_MEM,
1268 .start = IRQ_CRC0_DCNTEXP,
1269 .end = IRQ_CRC0_DCNTEXP,
1270 .flags = IORESOURCE_IRQ,
1273 .start = CH_MEM_STREAM0_SRC_CRC0,
1274 .end = CH_MEM_STREAM0_SRC_CRC0,
1275 .flags = IORESOURCE_DMA,
1279 static struct platform_device bfin_crypto_crc_device = {
1280 .name = BFIN_CRYPTO_CRC_NAME,
1282 .num_resources = ARRAY_SIZE(bfin_crypto_crc_resources),
1283 .resource = bfin_crypto_crc_resources,
1285 .platform_data = (void *)BFIN_CRYPTO_CRC_POLY_DATA,
1290 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1291 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
1293 .vref_delay_usecs = 50, /* internal, no capacitor */
1294 .x_plate_ohms = 419,
1295 .y_plate_ohms = 486,
1296 .pressure_max = 1000,
1298 .stopacq_polarity = 1,
1299 .first_conversion_delay = 3,
1300 .acquisition_time = 1,
1302 .pen_down_acc_interval = 1,
1306 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1307 #include <linux/input.h>
1308 #include <linux/gpio_keys.h>
1310 static struct gpio_keys_button bfin_gpio_keys_table[] = {
1311 {BTN_0, GPIO_PB10, 1, "gpio-keys: BTN0"},
1312 {BTN_1, GPIO_PE1, 1, "gpio-keys: BTN1"},
1315 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1316 .buttons = bfin_gpio_keys_table,
1317 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
1320 static struct platform_device bfin_device_gpiokeys = {
1321 .name = "gpio-keys",
1323 .platform_data = &bfin_gpio_keys_data,
1328 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1329 #if defined(CONFIG_MTD_M25P80) \
1330 || defined(CONFIG_MTD_M25P80_MODULE)
1332 /* the modalias must be the same as spi device driver name */
1333 .modalias = "m25p80", /* Name of spi_driver for this device */
1334 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
1335 .bus_num = 0, /* Framework bus number */
1336 .chip_select = 1, /* SPI_SSEL1*/
1337 .platform_data = &bfin_spi_flash_data,
1338 .controller_data = &spi_flash_chip_info,
1342 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1344 .modalias = "ad7877",
1345 .platform_data = &bfin_ad7877_ts_info,
1347 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
1352 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1354 .modalias = "spidev",
1355 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
1358 .controller_data = &spidev_chip_info,
1361 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1363 .modalias = "adxl34x",
1364 .platform_data = &adxl34x_info,
1366 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1373 #if IS_ENABLED(CONFIG_SPI_BFIN_V3)
1375 static struct resource bfin_spi0_resource[] = {
1377 .start = SPI0_REGBASE,
1378 .end = SPI0_REGBASE + 0xFF,
1379 .flags = IORESOURCE_MEM,
1382 .start = CH_SPI0_TX,
1384 .flags = IORESOURCE_DMA,
1387 .start = CH_SPI0_RX,
1389 .flags = IORESOURCE_DMA,
1394 static struct resource bfin_spi1_resource[] = {
1396 .start = SPI1_REGBASE,
1397 .end = SPI1_REGBASE + 0xFF,
1398 .flags = IORESOURCE_MEM,
1401 .start = CH_SPI1_TX,
1403 .flags = IORESOURCE_DMA,
1406 .start = CH_SPI1_RX,
1408 .flags = IORESOURCE_DMA,
1413 /* SPI controller data */
1414 static struct bfin_spi3_master bf60x_spi_master_info0 = {
1415 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1416 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1419 static struct platform_device bf60x_spi_master0 = {
1420 .name = "bfin-spi3",
1421 .id = 0, /* Bus number */
1422 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1423 .resource = bfin_spi0_resource,
1425 .platform_data = &bf60x_spi_master_info0, /* Passed to driver */
1429 static struct bfin_spi3_master bf60x_spi_master_info1 = {
1430 .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1431 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1434 static struct platform_device bf60x_spi_master1 = {
1435 .name = "bfin-spi3",
1436 .id = 1, /* Bus number */
1437 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1438 .resource = bfin_spi1_resource,
1440 .platform_data = &bf60x_spi_master_info1, /* Passed to driver */
1443 #endif /* spi master and devices */
1445 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1446 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1448 static struct resource bfin_twi0_resource[] = {
1450 .start = TWI0_CLKDIV,
1451 .end = TWI0_CLKDIV + 0xFF,
1452 .flags = IORESOURCE_MEM,
1457 .flags = IORESOURCE_IRQ,
1461 static struct platform_device i2c_bfin_twi0_device = {
1462 .name = "i2c-bfin-twi",
1464 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1465 .resource = bfin_twi0_resource,
1467 .platform_data = &bfin_twi0_pins,
1471 static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
1473 static struct resource bfin_twi1_resource[] = {
1475 .start = TWI1_CLKDIV,
1476 .end = TWI1_CLKDIV + 0xFF,
1477 .flags = IORESOURCE_MEM,
1482 .flags = IORESOURCE_IRQ,
1486 static struct platform_device i2c_bfin_twi1_device = {
1487 .name = "i2c-bfin-twi",
1489 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1490 .resource = bfin_twi1_resource,
1492 .platform_data = &bfin_twi1_pins,
1497 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1498 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1500 I2C_BOARD_INFO("adxl34x", 0x53),
1502 .platform_data = (void *)&adxl34x_info,
1505 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1507 I2C_BOARD_INFO("adau1761", 0x38),
1508 .platform_data = (void *)&adau1761_info
1511 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1513 I2C_BOARD_INFO("ssm2602", 0x1b),
1518 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1521 static const unsigned int cclk_vlev_datasheet[] =
1524 * Internal VLEV BF54XSBBC1533
1525 ****temporarily using these values until data sheet is updated
1527 VRPAIR(VLEV_085, 150000000),
1528 VRPAIR(VLEV_090, 250000000),
1529 VRPAIR(VLEV_110, 276000000),
1530 VRPAIR(VLEV_115, 301000000),
1531 VRPAIR(VLEV_120, 525000000),
1532 VRPAIR(VLEV_125, 550000000),
1533 VRPAIR(VLEV_130, 600000000),
1536 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1537 .tuple_tab = cclk_vlev_datasheet,
1538 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1539 .vr_settling_time = 25 /* us */,
1542 static struct platform_device bfin_dpmc = {
1543 .name = "bfin dpmc",
1545 .platform_data = &bfin_dmpc_vreg_data,
1549 static struct platform_device *ezkit_devices[] __initdata = {
1553 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1557 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1558 #ifdef CONFIG_SERIAL_BFIN_UART0
1561 #ifdef CONFIG_SERIAL_BFIN_UART1
1566 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1567 #ifdef CONFIG_BFIN_SIR0
1570 #ifdef CONFIG_BFIN_SIR1
1575 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1579 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1583 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1584 &bfin_isp1760_device,
1587 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1588 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1589 &bfin_sport0_uart_device,
1591 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1592 &bfin_sport1_uart_device,
1594 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1595 &bfin_sport2_uart_device,
1599 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1603 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1607 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1611 #if IS_ENABLED(CONFIG_SPI_BFIN_V3)
1616 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1617 &bfin_rotary_device,
1620 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1621 &i2c_bfin_twi0_device,
1622 #if !defined(CONFIG_BF542)
1623 &i2c_bfin_twi1_device,
1627 #if defined(CONFIG_BFIN_CRC)
1631 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1632 &bfin_crypto_crc_device,
1635 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1636 &bfin_device_gpiokeys,
1639 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1640 &ezkit_flash_device,
1642 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1645 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
1646 defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
1649 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
1650 defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1651 &bfin_ad1836_machine,
1653 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
1654 defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
1657 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1658 || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1659 &bfin_capture_device,
1661 #if defined(CONFIG_VIDEO_BLACKFIN_DISPLAY) \
1662 || defined(CONFIG_VIDEO_BLACKFIN_DISPLAY_MODULE)
1663 &bfin_display_device,
1668 static int __init ezkit_init(void)
1670 printk(KERN_INFO "%s(): registering device resources\n", __func__);
1672 i2c_register_board_info(0, bfin_i2c_board_info0,
1673 ARRAY_SIZE(bfin_i2c_board_info0));
1674 i2c_register_board_info(1, bfin_i2c_board_info1,
1675 ARRAY_SIZE(bfin_i2c_board_info1));
1677 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1678 if (!peripheral_request_list(pins, "emac0"))
1679 printk(KERN_ERR "%s(): request emac pins failed\n", __func__);
1682 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1684 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1689 arch_initcall(ezkit_init);
1691 static struct platform_device *ezkit_early_devices[] __initdata = {
1692 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1693 #ifdef CONFIG_SERIAL_BFIN_UART0
1696 #ifdef CONFIG_SERIAL_BFIN_UART1
1701 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1702 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1703 &bfin_sport0_uart_device,
1705 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1706 &bfin_sport1_uart_device,
1708 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1709 &bfin_sport2_uart_device,
1714 void __init native_machine_early_platform_add_devices(void)
1716 printk(KERN_INFO "register early platform devices\n");
1717 early_platform_add_devices(ezkit_early_devices,
1718 ARRAY_SIZE(ezkit_early_devices));