arch/blackfin/kernel/process.c

   1 /*
   2  * Blackfin architecture-dependent process handling
   3  *
   4  * Copyright 2004-2009 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/unistd.h>
  11 #include <linux/user.h>
  12 #include <linux/uaccess.h>
  13 #include <linux/slab.h>
  14 #include <linux/sched.h>
  15 #include <linux/sched/debug.h>
  16 #include <linux/sched/task.h>
  17 #include <linux/tick.h>
  18 #include <linux/fs.h>
  19 #include <linux/err.h>
  20
  21 #include <asm/blackfin.h>
  22 #include <asm/fixed_code.h>
  23 #include <asm/mem_map.h>
  24 #include <asm/irq.h>
  25
  26 asmlinkage void ret_from_fork(void);
  27
  28 /* Points to the SDRAM backup memory for the stack that is currently in
  29  * L1 scratchpad memory.
  30  */
  31 void *current_l1_stack_save;
  32
  33 /* The number of tasks currently using a L1 stack area.  The SRAM is
  34  * allocated/deallocated whenever this changes from/to zero.
  35  */
  36 int nr_l1stack_tasks;
  37
  38 /* Start and length of the area in L1 scratchpad memory which we've allocated
  39  * for process stacks.
  40  */
  41 void *l1_stack_base;
  42 unsigned long l1_stack_len;
  43
  44 void (*pm_power_off)(void) = NULL;
  45 EXPORT_SYMBOL(pm_power_off);
  46
  47 /*
  48  * The idle loop on BFIN
  49  */
  50 #ifdef CONFIG_IDLE_L1
  51 void arch_cpu_idle(void)__attribute__((l1_text));
  52 #endif
  53
  54 /*
  55  * This is our default idle handler.  We need to disable
  56  * interrupts here to ensure we don't miss a wakeup call.
  57  */
  58 void arch_cpu_idle(void)
  59 {
  60 #ifdef CONFIG_IPIPE
  61         ipipe_suspend_domain();
  62 #endif
  63         hard_local_irq_disable();
  64         if (!need_resched())
  65                 idle_with_irq_disabled();
  66
  67         hard_local_irq_enable();
  68 }
  69
  70 #ifdef CONFIG_HOTPLUG_CPU
  71 void arch_cpu_idle_dead(void)
  72 {
  73         cpu_die();
  74 }
  75 #endif
  76
  77 /*
  78  * Do necessary setup to start up a newly executed thread.
  79  *
  80  * pass the data segment into user programs if it exists,
  81  * it can't hurt anything as far as I can tell
  82  */
  83 void start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
  84 {
  85         regs->pc = new_ip;
  86         if (current->mm)
  87                 regs->p5 = current->mm->start_data;
  88 #ifndef CONFIG_SMP
  89         task_thread_info(current)->l1_task_info.stack_start =
  90                 (void *)current->mm->context.stack_start;
  91         task_thread_info(current)->l1_task_info.lowest_sp = (void *)new_sp;
  92         memcpy(L1_SCRATCH_TASK_INFO, &task_thread_info(current)->l1_task_info,
  93                sizeof(*L1_SCRATCH_TASK_INFO));
  94 #endif
  95         wrusp(new_sp);
  96 }
  97 EXPORT_SYMBOL_GPL(start_thread);
  98
  99 void flush_thread(void)
 100 {
 101 }
 102
 103 asmlinkage int bfin_clone(unsigned long clone_flags, unsigned long newsp)
 104 {
 105 #ifdef __ARCH_SYNC_CORE_DCACHE
 106         if (current->nr_cpus_allowed == num_possible_cpus())
 107                 set_cpus_allowed_ptr(current, cpumask_of(smp_processor_id()));
 108 #endif
 109         if (newsp)
 110                 newsp -= 12;
 111         return do_fork(clone_flags, newsp, 0, NULL, NULL);
 112 }
 113
 114 int
 115 copy_thread(unsigned long clone_flags,
 116             unsigned long usp, unsigned long topstk,
 117             struct task_struct *p)
 118 {
 119         struct pt_regs *childregs;
 120         unsigned long *v;
 121
 122         childregs = (struct pt_regs *) (task_stack_page(p) + THREAD_SIZE) - 1;
 123         v = ((unsigned long *)childregs) - 2;
 124         if (unlikely(p->flags & PF_KTHREAD)) {
 125                 memset(childregs, 0, sizeof(struct pt_regs));
 126                 v[0] = usp;
 127                 v[1] = topstk;
 128                 childregs->orig_p0 = -1;
 129                 childregs->ipend = 0x8000;
 130                 __asm__ __volatile__("%0 = syscfg;":"=da"(childregs->syscfg):);
 131                 p->thread.usp = 0;
 132         } else {
 133                 *childregs = *current_pt_regs();
 134                 childregs->r0 = 0;
 135                 p->thread.usp = usp ? : rdusp();
 136                 v[0] = v[1] = 0;
 137         }
 138
 139         p->thread.ksp = (unsigned long)v;
 140         p->thread.pc = (unsigned long)ret_from_fork;
 141
 142         return 0;
 143 }
 144
 145 unsigned long get_wchan(struct task_struct *p)
 146 {
 147         unsigned long fp, pc;
 148         unsigned long stack_page;
 149         int count = 0;
 150         if (!p || p == current || p->state == TASK_RUNNING)
 151                 return 0;
 152
 153         stack_page = (unsigned long)p;
 154         fp = p->thread.usp;
 155         do {
 156                 if (fp < stack_page + sizeof(struct thread_info) ||
 157                     fp >= 8184 + stack_page)
 158                         return 0;
 159                 pc = ((unsigned long *)fp)[1];
 160                 if (!in_sched_functions(pc))
 161                         return pc;
 162                 fp = *(unsigned long *)fp;
 163         }
 164         while (count++ < 16);
 165         return 0;
 166 }
 167
 168 void finish_atomic_sections (struct pt_regs *regs)
 169 {
 170         int __user *up0 = (int __user *)regs->p0;
 171
 172         switch (regs->pc) {
 173         default:
 174                 /* not in middle of an atomic step, so resume like normal */
 175                 return;
 176
 177         case ATOMIC_XCHG32 + 2:
 178                 put_user(regs->r1, up0);
 179                 break;
 180
 181         case ATOMIC_CAS32 + 2:
 182         case ATOMIC_CAS32 + 4:
 183                 if (regs->r0 == regs->r1)
 184         case ATOMIC_CAS32 + 6:
 185                         put_user(regs->r2, up0);
 186                 break;
 187
 188         case ATOMIC_ADD32 + 2:
 189                 regs->r0 = regs->r1 + regs->r0;
 190                 /* fall through */
 191         case ATOMIC_ADD32 + 4:
 192                 put_user(regs->r0, up0);
 193                 break;
 194
 195         case ATOMIC_SUB32 + 2:
 196                 regs->r0 = regs->r1 - regs->r0;
 197                 /* fall through */
 198         case ATOMIC_SUB32 + 4:
 199                 put_user(regs->r0, up0);
 200                 break;
 201
 202         case ATOMIC_IOR32 + 2:
 203                 regs->r0 = regs->r1 | regs->r0;
 204                 /* fall through */
 205         case ATOMIC_IOR32 + 4:
 206                 put_user(regs->r0, up0);
 207                 break;
 208
 209         case ATOMIC_AND32 + 2:
 210                 regs->r0 = regs->r1 & regs->r0;
 211                 /* fall through */
 212         case ATOMIC_AND32 + 4:
 213                 put_user(regs->r0, up0);
 214                 break;
 215
 216         case ATOMIC_XOR32 + 2:
 217                 regs->r0 = regs->r1 ^ regs->r0;
 218                 /* fall through */
 219         case ATOMIC_XOR32 + 4:
 220                 put_user(regs->r0, up0);
 221                 break;
 222         }
 223
 224         /*
 225          * We've finished the atomic section, and the only thing left for
 226          * userspace is to do a RTS, so we might as well handle that too
 227          * since we need to update the PC anyways.
 228          */
 229         regs->pc = regs->rets;
 230 }
 231
 232 static inline
 233 int in_mem(unsigned long addr, unsigned long size,
 234            unsigned long start, unsigned long end)
 235 {
 236         return addr >= start && addr + size <= end;
 237 }
 238 static inline
 239 int in_mem_const_off(unsigned long addr, unsigned long size, unsigned long off,
 240                      unsigned long const_addr, unsigned long const_size)
 241 {
 242         return const_size &&
 243                in_mem(addr, size, const_addr + off, const_addr + const_size);
 244 }
 245 static inline
 246 int in_mem_const(unsigned long addr, unsigned long size,
 247                  unsigned long const_addr, unsigned long const_size)
 248 {
 249         return in_mem_const_off(addr, size, 0, const_addr, const_size);
 250 }
 251 #ifdef CONFIG_BF60x
 252 #define ASYNC_ENABLED(bnum, bctlnum)    1
 253 #else
 254 #define ASYNC_ENABLED(bnum, bctlnum) \
 255 ({ \
 256         (bfin_read_EBIU_AMGCTL() & 0xe) < ((bnum + 1) << 1) ? 0 : \
 257         bfin_read_EBIU_AMBCTL##bctlnum() & B##bnum##RDYEN ? 0 : \
 258         1; \
 259 })
 260 #endif
 261 /*
 262  * We can't read EBIU banks that aren't enabled or we end up hanging
 263  * on the access to the async space.  Make sure we validate accesses
 264  * that cross async banks too.
 265  *      0 - found, but unusable
 266  *      1 - found & usable
 267  *      2 - not found
 268  */
 269 static
 270 int in_async(unsigned long addr, unsigned long size)
 271 {
 272         if (addr >= ASYNC_BANK0_BASE && addr < ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE) {
 273                 if (!ASYNC_ENABLED(0, 0))
 274                         return 0;
 275                 if (addr + size <= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE)
 276                         return 1;
 277                 size -= ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE - addr;
 278                 addr = ASYNC_BANK0_BASE + ASYNC_BANK0_SIZE;
 279         }
 280         if (addr >= ASYNC_BANK1_BASE && addr < ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE) {
 281                 if (!ASYNC_ENABLED(1, 0))
 282                         return 0;
 283                 if (addr + size <= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE)
 284                         return 1;
 285                 size -= ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE - addr;
 286                 addr = ASYNC_BANK1_BASE + ASYNC_BANK1_SIZE;
 287         }
 288         if (addr >= ASYNC_BANK2_BASE && addr < ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE) {
 289                 if (!ASYNC_ENABLED(2, 1))
 290                         return 0;
 291                 if (addr + size <= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE)
 292                         return 1;
 293                 size -= ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE - addr;
 294                 addr = ASYNC_BANK2_BASE + ASYNC_BANK2_SIZE;
 295         }
 296         if (addr >= ASYNC_BANK3_BASE && addr < ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE) {
 297                 if (ASYNC_ENABLED(3, 1))
 298                         return 0;
 299                 if (addr + size <= ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE)
 300                         return 1;
 301                 return 0;
 302         }
 303
 304         /* not within async bounds */
 305         return 2;
 306 }
 307
 308 int bfin_mem_access_type(unsigned long addr, unsigned long size)
 309 {
 310         int cpu = raw_smp_processor_id();
 311
 312         /* Check that things do not wrap around */
 313         if (addr > ULONG_MAX - size)
 314                 return -EFAULT;
 315
 316         if (in_mem(addr, size, FIXED_CODE_START, physical_mem_end))
 317                 return BFIN_MEM_ACCESS_CORE;
 318
 319         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
 320                 return cpu == 0 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
 321         if (in_mem_const(addr, size, L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 322                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
 323         if (in_mem_const(addr, size, L1_DATA_A_START, L1_DATA_A_LENGTH))
 324                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 325         if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
 326                 return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 327 #ifdef COREB_L1_CODE_START
 328         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
 329                 return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
 330         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 331                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
 332         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
 333                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 334         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
 335                 return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
 336 #endif
 337         if (in_mem_const(addr, size, L2_START, L2_LENGTH))
 338                 return BFIN_MEM_ACCESS_CORE;
 339
 340         if (addr >= SYSMMR_BASE)
 341                 return BFIN_MEM_ACCESS_CORE_ONLY;
 342
 343         switch (in_async(addr, size)) {
 344         case 0: return -EFAULT;
 345         case 1: return BFIN_MEM_ACCESS_CORE;
 346         case 2: /* fall through */;
 347         }
 348
 349         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
 350                 return BFIN_MEM_ACCESS_CORE;
 351         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
 352                 return BFIN_MEM_ACCESS_DMA;
 353
 354         return -EFAULT;
 355 }
 356
 357 #if defined(CONFIG_ACCESS_CHECK)
 358 #ifdef CONFIG_ACCESS_OK_L1
 359 __attribute__((l1_text))
 360 #endif
 361 /* Return 1 if access to memory range is OK, 0 otherwise */
 362 int _access_ok(unsigned long addr, unsigned long size)
 363 {
 364         int aret;
 365
 366         if (size == 0)
 367                 return 1;
 368         /* Check that things do not wrap around */
 369         if (addr > ULONG_MAX - size)
 370                 return 0;
 371         if (segment_eq(get_fs(), KERNEL_DS))
 372                 return 1;
 373 #ifdef CONFIG_MTD_UCLINUX
 374         if (1)
 375 #else
 376         if (0)
 377 #endif
 378         {
 379                 if (in_mem(addr, size, memory_start, memory_end))
 380                         return 1;
 381                 if (in_mem(addr, size, memory_mtd_end, physical_mem_end))
 382                         return 1;
 383 # ifndef CONFIG_ROMFS_ON_MTD
 384                 if (0)
 385 # endif
 386                         /* For XIP, allow user space to use pointers within the ROMFS.  */
 387                         if (in_mem(addr, size, memory_mtd_start, memory_mtd_end))
 388                                 return 1;
 389         } else {
 390                 if (in_mem(addr, size, memory_start, physical_mem_end))
 391                         return 1;
 392         }
 393
 394         if (in_mem(addr, size, (unsigned long)__init_begin, (unsigned long)__init_end))
 395                 return 1;
 396
 397         if (in_mem_const(addr, size, L1_CODE_START, L1_CODE_LENGTH))
 398                 return 1;
 399         if (in_mem_const_off(addr, size, _etext_l1 - _stext_l1, L1_CODE_START, L1_CODE_LENGTH))
 400                 return 1;
 401         if (in_mem_const_off(addr, size, _ebss_l1 - _sdata_l1, L1_DATA_A_START, L1_DATA_A_LENGTH))
 402                 return 1;
 403         if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
 404                 return 1;
 405 #ifdef COREB_L1_CODE_START
 406         if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
 407                 return 1;
 408         if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
 409                 return 1;
 410         if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
 411                 return 1;
 412         if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
 413                 return 1;
 414 #endif
 415
 416 #ifndef CONFIG_EXCEPTION_L1_SCRATCH
 417         if (in_mem_const(addr, size, (unsigned long)l1_stack_base, l1_stack_len))
 418                 return 1;
 419 #endif
 420
 421         aret = in_async(addr, size);
 422         if (aret < 2)
 423                 return aret;
 424
 425         if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))
 426                 return 1;
 427
 428         if (in_mem_const(addr, size, BOOT_ROM_START, BOOT_ROM_LENGTH))
 429                 return 1;
 430         if (in_mem_const(addr, size, L1_ROM_START, L1_ROM_LENGTH))
 431                 return 1;
 432
 433         return 0;
 434 }
 435 EXPORT_SYMBOL(_access_ok);
 436 #endif /* CONFIG_ACCESS_CHECK */