[ARM] spelling fixes
[platform/adaptation/renesas_rcar/renesas_kernel.git] / arch / avr32 / boards / atstk1000 / atstk1002.c
1 /*
2  * ATSTK1002 daughterboard-specific init code
3  *
4  * Copyright (C) 2005-2006 Atmel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/clk.h>
11 #include <linux/etherdevice.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
15 #include <linux/string.h>
16 #include <linux/types.h>
17 #include <linux/spi/spi.h>
18
19 #include <asm/io.h>
20 #include <asm/setup.h>
21 #include <asm/arch/at32ap7000.h>
22 #include <asm/arch/board.h>
23 #include <asm/arch/init.h>
24 #include <asm/arch/portmux.h>
25
26
27 #define SW2_DEFAULT             /* MMCI and UART_A available */
28
29 struct eth_addr {
30         u8 addr[6];
31 };
32
33 static struct eth_addr __initdata hw_addr[2];
34
35 static struct eth_platform_data __initdata eth_data[2];
36 static struct lcdc_platform_data atstk1000_fb0_data;
37
38 static struct spi_board_info spi0_board_info[] __initdata = {
39         {
40                 /* QVGA display */
41                 .modalias       = "ltv350qv",
42                 .max_speed_hz   = 16000000,
43                 .chip_select    = 1,
44         },
45 };
46
47 /*
48  * The next two functions should go away as the boot loader is
49  * supposed to initialize the macb address registers with a valid
50  * ethernet address. But we need to keep it around for a while until
51  * we can be reasonably sure the boot loader does this.
52  *
53  * The phy_id is ignored as the driver will probe for it.
54  */
55 static int __init parse_tag_ethernet(struct tag *tag)
56 {
57         int i;
58
59         i = tag->u.ethernet.mac_index;
60         if (i < ARRAY_SIZE(hw_addr))
61                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
62                        sizeof(hw_addr[i].addr));
63
64         return 0;
65 }
66 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
67
68 static void __init set_hw_addr(struct platform_device *pdev)
69 {
70         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
71         const u8 *addr;
72         void __iomem *regs;
73         struct clk *pclk;
74
75         if (!res)
76                 return;
77         if (pdev->id >= ARRAY_SIZE(hw_addr))
78                 return;
79
80         addr = hw_addr[pdev->id].addr;
81         if (!is_valid_ether_addr(addr))
82                 return;
83
84         /*
85          * Since this is board-specific code, we'll cheat and use the
86          * physical address directly as we happen to know that it's
87          * the same as the virtual address.
88          */
89         regs = (void __iomem __force *)res->start;
90         pclk = clk_get(&pdev->dev, "pclk");
91         if (!pclk)
92                 return;
93
94         clk_enable(pclk);
95         __raw_writel((addr[3] << 24) | (addr[2] << 16)
96                      | (addr[1] << 8) | addr[0], regs + 0x98);
97         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
98         clk_disable(pclk);
99         clk_put(pclk);
100 }
101
102 void __init setup_board(void)
103 {
104 #ifdef  SW2_DEFAULT
105         at32_map_usart(1, 0);   /* USART 1/A: /dev/ttyS0, DB9 */
106 #else
107         at32_map_usart(0, 1);   /* USART 0/B: /dev/ttyS1, IRDA */
108 #endif
109         /* USART 2/unused: expansion connector */
110         at32_map_usart(3, 2);   /* USART 3/C: /dev/ttyS2, DB9 */
111
112         at32_setup_serial_console(0);
113 }
114
115 static int __init atstk1002_init(void)
116 {
117         /*
118          * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
119          * SDRAM-specific pins so that nobody messes with them.
120          */
121         at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
122         at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
123         at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
124         at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
125         at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
126         at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
127         at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
128         at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
129         at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
130         at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
131         at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
132         at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
133         at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
134         at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
135         at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
136         at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
137         at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
138
139         at32_add_system_devices();
140
141 #ifdef  SW2_DEFAULT
142         at32_add_device_usart(0);
143 #else
144         at32_add_device_usart(1);
145 #endif
146         at32_add_device_usart(2);
147
148         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
149
150         at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
151         atstk1000_fb0_data.fbmem_start = fbmem_start;
152         atstk1000_fb0_data.fbmem_size = fbmem_size;
153         at32_add_device_lcdc(0, &atstk1000_fb0_data);
154
155         return 0;
156 }
157 postcore_initcall(atstk1002_init);