1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Accelerated CRC32(C) using AArch64 CRC instructions
5 * Copyright (C) 2016 - 2018 Linaro Ltd <ard.biesheuvel@linaro.org>
8 #include <linux/linkage.h>
9 #include <asm/alternative.h>
10 #include <asm/assembler.h>
14 .macro byteorder, reg, be
16 CPU_LE( rev \reg, \reg )
18 CPU_BE( rev \reg, \reg )
22 .macro byteorder16, reg, be
24 CPU_LE( rev16 \reg, \reg )
26 CPU_BE( rev16 \reg, \reg )
30 .macro bitorder, reg, be
36 .macro bitorder16, reg, be
43 .macro bitorder8, reg, be
50 .macro __crc32, c, be=0
53 b.lt 8f // less than 16 bytes
57 cbz x7, 32f // multiple of 32 bytes
74 crc32\c\()x w8, w0, x3
79 crc32\c\()w w8, w0, w3
84 crc32\c\()h w8, w0, w3
88 crc32\c\()b w8, w0, w3
91 crc32\c\()x w8, w0, x5
92 crc32\c\()x w8, w8, x6
96 32: ldp x3, x4, [x1], #32
98 ldp x5, x6, [x1, #-16]
107 crc32\c\()x w0, w0, x3
108 crc32\c\()x w0, w0, x4
109 crc32\c\()x w0, w0, x5
110 crc32\c\()x w0, w0, x6
119 crc32\c\()x w0, w0, x3
124 crc32\c\()w w0, w0, w3
129 crc32\c\()h w0, w0, w3
133 crc32\c\()b w0, w0, w3
139 SYM_FUNC_START(crc32_le)
140 alternative_if_not ARM64_HAS_CRC32
142 alternative_else_nop_endif
144 SYM_FUNC_END(crc32_le)
147 SYM_FUNC_START(__crc32c_le)
148 alternative_if_not ARM64_HAS_CRC32
150 alternative_else_nop_endif
152 SYM_FUNC_END(__crc32c_le)
155 SYM_FUNC_START(crc32_be)
156 alternative_if_not ARM64_HAS_CRC32
158 alternative_else_nop_endif
160 SYM_FUNC_END(crc32_be)