1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012,2013 - ARM Ltd
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
7 #include <linux/arm-smccc.h>
8 #include <linux/linkage.h>
10 #include <asm/alternative.h>
11 #include <asm/assembler.h>
12 #include <asm/el2_setup.h>
13 #include <asm/kvm_arm.h>
14 #include <asm/kvm_asm.h>
15 #include <asm/kvm_mmu.h>
16 #include <asm/pgtable-hwdef.h>
17 #include <asm/sysreg.h>
21 .pushsection .idmap.text, "ax"
25 SYM_CODE_START(__kvm_hyp_init)
26 ventry __invalid // Synchronous EL2t
27 ventry __invalid // IRQ EL2t
28 ventry __invalid // FIQ EL2t
29 ventry __invalid // Error EL2t
31 ventry __invalid // Synchronous EL2h
32 ventry __invalid // IRQ EL2h
33 ventry __invalid // FIQ EL2h
34 ventry __invalid // Error EL2h
36 ventry __do_hyp_init // Synchronous 64-bit EL1
37 ventry __invalid // IRQ 64-bit EL1
38 ventry __invalid // FIQ 64-bit EL1
39 ventry __invalid // Error 64-bit EL1
41 ventry __invalid // Synchronous 32-bit EL1
42 ventry __invalid // IRQ 32-bit EL1
43 ventry __invalid // FIQ 32-bit EL1
44 ventry __invalid // Error 32-bit EL1
50 * Only uses x0..x3 so as to not clobber callee-saved SMCCC registers.
52 * x0: SMCCC function ID
53 * x1: struct kvm_nvhe_init_params PA
56 /* Check for a stub HVC call */
57 cmp x0, #HVC_STUB_HCALL_NR
58 b.lo __kvm_handle_stub_hvc
60 mov x3, #KVM_HOST_SMCCC_FUNC(__kvm_hyp_init)
64 mov x0, #SMCCC_RET_NOT_SUPPORTED
69 bl ___kvm_hyp_init // Clobbers x0..x2
73 mov x0, #SMCCC_RET_SUCCESS
75 SYM_CODE_END(__kvm_hyp_init)
78 * Initialize the hypervisor in EL2.
80 * Only uses x0..x2 so as to not clobber callee-saved SMCCC registers
81 * and leave x3 for the caller.
83 * x0: struct kvm_nvhe_init_params PA
85 SYM_CODE_START_LOCAL(___kvm_hyp_init)
86 ldr x1, [x0, #NVHE_INIT_STACK_HYP_VA]
89 ldr x1, [x0, #NVHE_INIT_MAIR_EL2]
92 ldr x1, [x0, #NVHE_INIT_HCR_EL2]
99 // hVHE: Replay the EL2 setup to account for the E2H bit
100 // TPIDR_EL2 is used to preserve x0 across the macro maze...
108 ldr x1, [x0, #NVHE_INIT_TPIDR_EL2]
111 ldr x1, [x0, #NVHE_INIT_VTTBR]
114 ldr x1, [x0, #NVHE_INIT_VTCR]
117 ldr x1, [x0, #NVHE_INIT_PGD_PA]
119 alternative_if ARM64_HAS_CNP
120 orr x2, x2, #TTBR_CNP_BIT
121 alternative_else_nop_endif
125 * Set the PS bits in TCR_EL2.
127 ldr x0, [x0, #NVHE_INIT_TCR_EL2]
128 tcr_compute_pa_size x0, #TCR_EL2_PS_SHIFT, x1, x2
133 /* Invalidate the stale TLBs from Bootloader */
138 mov_q x0, INIT_SCTLR_EL2_MMU_ON
139 alternative_if ARM64_HAS_ADDRESS_AUTH
140 mov_q x1, (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | \
141 SCTLR_ELx_ENDA | SCTLR_ELx_ENDB)
143 alternative_else_nop_endif
145 #ifdef CONFIG_ARM64_BTI_KERNEL
146 alternative_if ARM64_BTI
147 orr x0, x0, #SCTLR_EL2_BT
148 alternative_else_nop_endif
149 #endif /* CONFIG_ARM64_BTI_KERNEL */
154 /* Set the host vector */
155 ldr x0, =__kvm_hyp_host_vector
159 SYM_CODE_END(___kvm_hyp_init)
162 * PSCI CPU_ON entry point
164 * x0: struct kvm_nvhe_init_params PA
166 SYM_CODE_START(kvm_hyp_cpu_entry)
167 mov x1, #1 // is_cpu_on = true
169 SYM_CODE_END(kvm_hyp_cpu_entry)
172 * PSCI CPU_SUSPEND / SYSTEM_SUSPEND entry point
174 * x0: struct kvm_nvhe_init_params PA
176 SYM_CODE_START(kvm_hyp_cpu_resume)
177 mov x1, #0 // is_cpu_on = false
179 SYM_CODE_END(kvm_hyp_cpu_resume)
182 * Common code for CPU entry points. Initializes EL2 state and
183 * installs the hypervisor before handing over to a C handler.
185 * x0: struct kvm_nvhe_init_params PA
188 SYM_CODE_START_LOCAL(__kvm_hyp_init_cpu)
189 mov x28, x0 // Stash arguments
192 /* Check that the core was booted in EL2. */
194 cmp x0, #CurrentEL_EL2
197 /* The core booted in EL1. KVM cannot be initialized on it. */
202 2: msr SPsel, #1 // We want to use SP_EL{1,2}
204 /* Initialize EL2 CPU state to sane values. */
205 init_el2_state // Clobbers x0..x2
207 __init_el2_nvhe_prepare_eret
209 /* Enable MMU, set vectors and stack. */
211 bl ___kvm_hyp_init // Clobbers x0..x2
215 ldr x1, =kvm_host_psci_cpu_entry
217 SYM_CODE_END(__kvm_hyp_init_cpu)
219 SYM_CODE_START(__kvm_handle_stub_hvc)
221 * __kvm_handle_stub_hvc called from __host_hvc through branch instruction(br) so
222 * we need bti j at beginning.
225 cmp x0, #HVC_SOFT_RESTART
228 /* This is where we're about to jump, staying at EL2 */
230 mov x0, #(PSR_F_BIT | PSR_I_BIT | PSR_A_BIT | PSR_D_BIT | PSR_MODE_EL2h)
233 /* Shuffle the arguments, and don't come back */
239 1: cmp x0, #HVC_RESET_VECTORS
243 * Set the HVC_RESET_VECTORS return code before entering the common
244 * path so that we do not clobber x0-x2 in case we are coming via
249 /* Reset kvm back to the hyp stub. */
250 mov_q x5, INIT_SCTLR_EL2_MMU_OFF
251 pre_disable_mmu_workaround
255 alternative_if ARM64_KVM_PROTECTED_MODE
256 mov_q x5, HCR_HOST_NVHE_FLAGS
258 alternative_else_nop_endif
260 /* Install stub vectors */
261 adr_l x5, __hyp_stub_vectors
265 1: /* Bad stub call */
266 mov_q x0, HVC_STUB_ERR
269 SYM_CODE_END(__kvm_handle_stub_hvc)
271 SYM_FUNC_START(__pkvm_init_switch_pgd)
272 /* Turn the MMU off */
273 pre_disable_mmu_workaround
275 bic x3, x2, #SCTLR_ELx_M
281 /* Install the new pgtables */
282 ldr x3, [x0, #NVHE_INIT_PGD_PA]
284 alternative_if ARM64_HAS_CNP
285 orr x4, x4, #TTBR_CNP_BIT
286 alternative_else_nop_endif
289 /* Set the new stack pointer */
290 ldr x0, [x0, #NVHE_INIT_STACK_HYP_VA]
293 /* And turn the MMU back on! */
296 SYM_FUNC_END(__pkvm_init_switch_pgd)