1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 ARM Ltd.
4 * Author: Marc Zyngier <marc.zyngier@arm.com>
9 #include <linux/kvm_host.h>
10 #include <linux/interrupt.h>
11 #include <linux/irq.h>
12 #include <linux/irqdomain.h>
13 #include <linux/uaccess.h>
15 #include <clocksource/arm_arch_timer.h>
16 #include <asm/arch_timer.h>
17 #include <asm/kvm_emulate.h>
18 #include <asm/kvm_hyp.h>
20 #include <kvm/arm_vgic.h>
21 #include <kvm/arm_arch_timer.h>
25 static struct timecounter *timecounter;
26 static unsigned int host_vtimer_irq;
27 static unsigned int host_ptimer_irq;
28 static u32 host_vtimer_irq_flags;
29 static u32 host_ptimer_irq_flags;
31 static DEFINE_STATIC_KEY_FALSE(has_gic_active_state);
33 static const struct kvm_irq_level default_ptimer_irq = {
38 static const struct kvm_irq_level default_vtimer_irq = {
43 static bool kvm_timer_irq_can_fire(struct arch_timer_context *timer_ctx);
44 static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,
45 struct arch_timer_context *timer_ctx);
46 static bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx);
47 static void kvm_arm_timer_write(struct kvm_vcpu *vcpu,
48 struct arch_timer_context *timer,
49 enum kvm_arch_timer_regs treg,
51 static u64 kvm_arm_timer_read(struct kvm_vcpu *vcpu,
52 struct arch_timer_context *timer,
53 enum kvm_arch_timer_regs treg);
55 u32 timer_get_ctl(struct arch_timer_context *ctxt)
57 struct kvm_vcpu *vcpu = ctxt->vcpu;
59 switch(arch_timer_ctx_index(ctxt)) {
61 return __vcpu_sys_reg(vcpu, CNTV_CTL_EL0);
63 return __vcpu_sys_reg(vcpu, CNTP_CTL_EL0);
70 u64 timer_get_cval(struct arch_timer_context *ctxt)
72 struct kvm_vcpu *vcpu = ctxt->vcpu;
74 switch(arch_timer_ctx_index(ctxt)) {
76 return __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0);
78 return __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0);
85 static u64 timer_get_offset(struct arch_timer_context *ctxt)
87 struct kvm_vcpu *vcpu = ctxt->vcpu;
89 switch(arch_timer_ctx_index(ctxt)) {
91 return __vcpu_sys_reg(vcpu, CNTVOFF_EL2);
97 static void timer_set_ctl(struct arch_timer_context *ctxt, u32 ctl)
99 struct kvm_vcpu *vcpu = ctxt->vcpu;
101 switch(arch_timer_ctx_index(ctxt)) {
103 __vcpu_sys_reg(vcpu, CNTV_CTL_EL0) = ctl;
106 __vcpu_sys_reg(vcpu, CNTP_CTL_EL0) = ctl;
113 static void timer_set_cval(struct arch_timer_context *ctxt, u64 cval)
115 struct kvm_vcpu *vcpu = ctxt->vcpu;
117 switch(arch_timer_ctx_index(ctxt)) {
119 __vcpu_sys_reg(vcpu, CNTV_CVAL_EL0) = cval;
122 __vcpu_sys_reg(vcpu, CNTP_CVAL_EL0) = cval;
129 static void timer_set_offset(struct arch_timer_context *ctxt, u64 offset)
131 struct kvm_vcpu *vcpu = ctxt->vcpu;
133 switch(arch_timer_ctx_index(ctxt)) {
135 __vcpu_sys_reg(vcpu, CNTVOFF_EL2) = offset;
138 WARN(offset, "timer %ld\n", arch_timer_ctx_index(ctxt));
142 u64 kvm_phys_timer_read(void)
144 return timecounter->cc->read(timecounter->cc);
147 static void get_timer_map(struct kvm_vcpu *vcpu, struct timer_map *map)
150 map->direct_vtimer = vcpu_vtimer(vcpu);
151 map->direct_ptimer = vcpu_ptimer(vcpu);
152 map->emul_ptimer = NULL;
154 map->direct_vtimer = vcpu_vtimer(vcpu);
155 map->direct_ptimer = NULL;
156 map->emul_ptimer = vcpu_ptimer(vcpu);
159 trace_kvm_get_timer_map(vcpu->vcpu_id, map);
162 static inline bool userspace_irqchip(struct kvm *kvm)
164 return static_branch_unlikely(&userspace_irqchip_in_use) &&
165 unlikely(!irqchip_in_kernel(kvm));
168 static void soft_timer_start(struct hrtimer *hrt, u64 ns)
170 hrtimer_start(hrt, ktime_add_ns(ktime_get(), ns),
171 HRTIMER_MODE_ABS_HARD);
174 static void soft_timer_cancel(struct hrtimer *hrt)
179 static irqreturn_t kvm_arch_timer_handler(int irq, void *dev_id)
181 struct kvm_vcpu *vcpu = *(struct kvm_vcpu **)dev_id;
182 struct arch_timer_context *ctx;
183 struct timer_map map;
186 * We may see a timer interrupt after vcpu_put() has been called which
187 * sets the CPU's vcpu pointer to NULL, because even though the timer
188 * has been disabled in timer_save_state(), the hardware interrupt
189 * signal may not have been retired from the interrupt controller yet.
194 get_timer_map(vcpu, &map);
196 if (irq == host_vtimer_irq)
197 ctx = map.direct_vtimer;
199 ctx = map.direct_ptimer;
201 if (kvm_timer_should_fire(ctx))
202 kvm_timer_update_irq(vcpu, true, ctx);
204 if (userspace_irqchip(vcpu->kvm) &&
205 !static_branch_unlikely(&has_gic_active_state))
206 disable_percpu_irq(host_vtimer_irq);
211 static u64 kvm_counter_compute_delta(struct arch_timer_context *timer_ctx,
214 u64 now = kvm_phys_timer_read() - timer_get_offset(timer_ctx);
219 ns = cyclecounter_cyc2ns(timecounter->cc,
229 static u64 kvm_timer_compute_delta(struct arch_timer_context *timer_ctx)
231 return kvm_counter_compute_delta(timer_ctx, timer_get_cval(timer_ctx));
234 static bool kvm_timer_irq_can_fire(struct arch_timer_context *timer_ctx)
236 WARN_ON(timer_ctx && timer_ctx->loaded);
238 ((timer_get_ctl(timer_ctx) &
239 (ARCH_TIMER_CTRL_IT_MASK | ARCH_TIMER_CTRL_ENABLE)) == ARCH_TIMER_CTRL_ENABLE);
242 static bool vcpu_has_wfit_active(struct kvm_vcpu *vcpu)
244 return (cpus_have_final_cap(ARM64_HAS_WFXT) &&
245 (vcpu->arch.flags & KVM_ARM64_WFIT));
248 static u64 wfit_delay_ns(struct kvm_vcpu *vcpu)
250 struct arch_timer_context *ctx = vcpu_vtimer(vcpu);
251 u64 val = vcpu_get_reg(vcpu, kvm_vcpu_sys_get_rt(vcpu));
253 return kvm_counter_compute_delta(ctx, val);
257 * Returns the earliest expiration time in ns among guest timers.
258 * Note that it will return 0 if none of timers can fire.
260 static u64 kvm_timer_earliest_exp(struct kvm_vcpu *vcpu)
262 u64 min_delta = ULLONG_MAX;
265 for (i = 0; i < NR_KVM_TIMERS; i++) {
266 struct arch_timer_context *ctx = &vcpu->arch.timer_cpu.timers[i];
268 WARN(ctx->loaded, "timer %d loaded\n", i);
269 if (kvm_timer_irq_can_fire(ctx))
270 min_delta = min(min_delta, kvm_timer_compute_delta(ctx));
273 if (vcpu_has_wfit_active(vcpu))
274 min_delta = min(min_delta, wfit_delay_ns(vcpu));
276 /* If none of timers can fire, then return 0 */
277 if (min_delta == ULLONG_MAX)
283 static enum hrtimer_restart kvm_bg_timer_expire(struct hrtimer *hrt)
285 struct arch_timer_cpu *timer;
286 struct kvm_vcpu *vcpu;
289 timer = container_of(hrt, struct arch_timer_cpu, bg_timer);
290 vcpu = container_of(timer, struct kvm_vcpu, arch.timer_cpu);
293 * Check that the timer has really expired from the guest's
294 * PoV (NTP on the host may have forced it to expire
295 * early). If we should have slept longer, restart it.
297 ns = kvm_timer_earliest_exp(vcpu);
299 hrtimer_forward_now(hrt, ns_to_ktime(ns));
300 return HRTIMER_RESTART;
303 kvm_vcpu_wake_up(vcpu);
304 return HRTIMER_NORESTART;
307 static enum hrtimer_restart kvm_hrtimer_expire(struct hrtimer *hrt)
309 struct arch_timer_context *ctx;
310 struct kvm_vcpu *vcpu;
313 ctx = container_of(hrt, struct arch_timer_context, hrtimer);
316 trace_kvm_timer_hrtimer_expire(ctx);
319 * Check that the timer has really expired from the guest's
320 * PoV (NTP on the host may have forced it to expire
321 * early). If not ready, schedule for a later time.
323 ns = kvm_timer_compute_delta(ctx);
325 hrtimer_forward_now(hrt, ns_to_ktime(ns));
326 return HRTIMER_RESTART;
329 kvm_timer_update_irq(vcpu, true, ctx);
330 return HRTIMER_NORESTART;
333 static bool kvm_timer_should_fire(struct arch_timer_context *timer_ctx)
335 enum kvm_arch_timers index;
341 index = arch_timer_ctx_index(timer_ctx);
343 if (timer_ctx->loaded) {
348 cnt_ctl = read_sysreg_el0(SYS_CNTV_CTL);
351 cnt_ctl = read_sysreg_el0(SYS_CNTP_CTL);
354 /* GCC is braindead */
359 return (cnt_ctl & ARCH_TIMER_CTRL_ENABLE) &&
360 (cnt_ctl & ARCH_TIMER_CTRL_IT_STAT) &&
361 !(cnt_ctl & ARCH_TIMER_CTRL_IT_MASK);
364 if (!kvm_timer_irq_can_fire(timer_ctx))
367 cval = timer_get_cval(timer_ctx);
368 now = kvm_phys_timer_read() - timer_get_offset(timer_ctx);
373 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
375 return vcpu_has_wfit_active(vcpu) && wfit_delay_ns(vcpu) == 0;
379 * Reflect the timer output level into the kvm_run structure
381 void kvm_timer_update_run(struct kvm_vcpu *vcpu)
383 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
384 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
385 struct kvm_sync_regs *regs = &vcpu->run->s.regs;
387 /* Populate the device bitmap with the timer states */
388 regs->device_irq_level &= ~(KVM_ARM_DEV_EL1_VTIMER |
389 KVM_ARM_DEV_EL1_PTIMER);
390 if (kvm_timer_should_fire(vtimer))
391 regs->device_irq_level |= KVM_ARM_DEV_EL1_VTIMER;
392 if (kvm_timer_should_fire(ptimer))
393 regs->device_irq_level |= KVM_ARM_DEV_EL1_PTIMER;
396 static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level,
397 struct arch_timer_context *timer_ctx)
401 timer_ctx->irq.level = new_level;
402 trace_kvm_timer_update_irq(vcpu->vcpu_id, timer_ctx->irq.irq,
403 timer_ctx->irq.level);
405 if (!userspace_irqchip(vcpu->kvm)) {
406 ret = kvm_vgic_inject_irq(vcpu->kvm, vcpu->vcpu_id,
408 timer_ctx->irq.level,
414 /* Only called for a fully emulated timer */
415 static void timer_emulate(struct arch_timer_context *ctx)
417 bool should_fire = kvm_timer_should_fire(ctx);
419 trace_kvm_timer_emulate(ctx, should_fire);
421 if (should_fire != ctx->irq.level) {
422 kvm_timer_update_irq(ctx->vcpu, should_fire, ctx);
427 * If the timer can fire now, we don't need to have a soft timer
428 * scheduled for the future. If the timer cannot fire at all,
429 * then we also don't need a soft timer.
431 if (!kvm_timer_irq_can_fire(ctx)) {
432 soft_timer_cancel(&ctx->hrtimer);
436 soft_timer_start(&ctx->hrtimer, kvm_timer_compute_delta(ctx));
439 static void timer_save_state(struct arch_timer_context *ctx)
441 struct arch_timer_cpu *timer = vcpu_timer(ctx->vcpu);
442 enum kvm_arch_timers index = arch_timer_ctx_index(ctx);
448 local_irq_save(flags);
455 timer_set_ctl(ctx, read_sysreg_el0(SYS_CNTV_CTL));
456 timer_set_cval(ctx, read_sysreg_el0(SYS_CNTV_CVAL));
458 /* Disable the timer */
459 write_sysreg_el0(0, SYS_CNTV_CTL);
464 timer_set_ctl(ctx, read_sysreg_el0(SYS_CNTP_CTL));
465 timer_set_cval(ctx, read_sysreg_el0(SYS_CNTP_CVAL));
467 /* Disable the timer */
468 write_sysreg_el0(0, SYS_CNTP_CTL);
476 trace_kvm_timer_save_state(ctx);
480 local_irq_restore(flags);
484 * Schedule the background timer before calling kvm_vcpu_halt, so that this
485 * thread is removed from its waitqueue and made runnable when there's a timer
486 * interrupt to handle.
488 static void kvm_timer_blocking(struct kvm_vcpu *vcpu)
490 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
491 struct timer_map map;
493 get_timer_map(vcpu, &map);
496 * If no timers are capable of raising interrupts (disabled or
497 * masked), then there's no more work for us to do.
499 if (!kvm_timer_irq_can_fire(map.direct_vtimer) &&
500 !kvm_timer_irq_can_fire(map.direct_ptimer) &&
501 !kvm_timer_irq_can_fire(map.emul_ptimer) &&
502 !vcpu_has_wfit_active(vcpu))
506 * At least one guest time will expire. Schedule a background timer.
507 * Set the earliest expiration time among the guest timers.
509 soft_timer_start(&timer->bg_timer, kvm_timer_earliest_exp(vcpu));
512 static void kvm_timer_unblocking(struct kvm_vcpu *vcpu)
514 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
516 soft_timer_cancel(&timer->bg_timer);
519 static void timer_restore_state(struct arch_timer_context *ctx)
521 struct arch_timer_cpu *timer = vcpu_timer(ctx->vcpu);
522 enum kvm_arch_timers index = arch_timer_ctx_index(ctx);
528 local_irq_save(flags);
535 write_sysreg_el0(timer_get_cval(ctx), SYS_CNTV_CVAL);
537 write_sysreg_el0(timer_get_ctl(ctx), SYS_CNTV_CTL);
540 write_sysreg_el0(timer_get_cval(ctx), SYS_CNTP_CVAL);
542 write_sysreg_el0(timer_get_ctl(ctx), SYS_CNTP_CTL);
548 trace_kvm_timer_restore_state(ctx);
552 local_irq_restore(flags);
555 static void set_cntvoff(u64 cntvoff)
557 kvm_call_hyp(__kvm_timer_set_cntvoff, cntvoff);
560 static inline void set_timer_irq_phys_active(struct arch_timer_context *ctx, bool active)
563 r = irq_set_irqchip_state(ctx->host_timer_irq, IRQCHIP_STATE_ACTIVE, active);
567 static void kvm_timer_vcpu_load_gic(struct arch_timer_context *ctx)
569 struct kvm_vcpu *vcpu = ctx->vcpu;
570 bool phys_active = false;
573 * Update the timer output so that it is likely to match the
574 * state we're about to restore. If the timer expires between
575 * this point and the register restoration, we'll take the
578 kvm_timer_update_irq(ctx->vcpu, kvm_timer_should_fire(ctx), ctx);
580 if (irqchip_in_kernel(vcpu->kvm))
581 phys_active = kvm_vgic_map_is_active(vcpu, ctx->irq.irq);
583 phys_active |= ctx->irq.level;
585 set_timer_irq_phys_active(ctx, phys_active);
588 static void kvm_timer_vcpu_load_nogic(struct kvm_vcpu *vcpu)
590 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
593 * Update the timer output so that it is likely to match the
594 * state we're about to restore. If the timer expires between
595 * this point and the register restoration, we'll take the
598 kvm_timer_update_irq(vcpu, kvm_timer_should_fire(vtimer), vtimer);
601 * When using a userspace irqchip with the architected timers and a
602 * host interrupt controller that doesn't support an active state, we
603 * must still prevent continuously exiting from the guest, and
604 * therefore mask the physical interrupt by disabling it on the host
605 * interrupt controller when the virtual level is high, such that the
606 * guest can make forward progress. Once we detect the output level
607 * being de-asserted, we unmask the interrupt again so that we exit
608 * from the guest when the timer fires.
610 if (vtimer->irq.level)
611 disable_percpu_irq(host_vtimer_irq);
613 enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
616 void kvm_timer_vcpu_load(struct kvm_vcpu *vcpu)
618 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
619 struct timer_map map;
621 if (unlikely(!timer->enabled))
624 get_timer_map(vcpu, &map);
626 if (static_branch_likely(&has_gic_active_state)) {
627 kvm_timer_vcpu_load_gic(map.direct_vtimer);
628 if (map.direct_ptimer)
629 kvm_timer_vcpu_load_gic(map.direct_ptimer);
631 kvm_timer_vcpu_load_nogic(vcpu);
634 set_cntvoff(timer_get_offset(map.direct_vtimer));
636 kvm_timer_unblocking(vcpu);
638 timer_restore_state(map.direct_vtimer);
639 if (map.direct_ptimer)
640 timer_restore_state(map.direct_ptimer);
643 timer_emulate(map.emul_ptimer);
646 bool kvm_timer_should_notify_user(struct kvm_vcpu *vcpu)
648 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
649 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
650 struct kvm_sync_regs *sregs = &vcpu->run->s.regs;
653 if (likely(irqchip_in_kernel(vcpu->kvm)))
656 vlevel = sregs->device_irq_level & KVM_ARM_DEV_EL1_VTIMER;
657 plevel = sregs->device_irq_level & KVM_ARM_DEV_EL1_PTIMER;
659 return kvm_timer_should_fire(vtimer) != vlevel ||
660 kvm_timer_should_fire(ptimer) != plevel;
663 void kvm_timer_vcpu_put(struct kvm_vcpu *vcpu)
665 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
666 struct timer_map map;
668 if (unlikely(!timer->enabled))
671 get_timer_map(vcpu, &map);
673 timer_save_state(map.direct_vtimer);
674 if (map.direct_ptimer)
675 timer_save_state(map.direct_ptimer);
678 * Cancel soft timer emulation, because the only case where we
679 * need it after a vcpu_put is in the context of a sleeping VCPU, and
680 * in that case we already factor in the deadline for the physical
681 * timer when scheduling the bg_timer.
683 * In any case, we re-schedule the hrtimer for the physical timer when
684 * coming back to the VCPU thread in kvm_timer_vcpu_load().
687 soft_timer_cancel(&map.emul_ptimer->hrtimer);
689 if (kvm_vcpu_is_blocking(vcpu))
690 kvm_timer_blocking(vcpu);
693 * The kernel may decide to run userspace after calling vcpu_put, so
694 * we reset cntvoff to 0 to ensure a consistent read between user
695 * accesses to the virtual counter and kernel access to the physical
696 * counter of non-VHE case. For VHE, the virtual counter uses a fixed
697 * virtual offset of zero, so no need to zero CNTVOFF_EL2 register.
703 * With a userspace irqchip we have to check if the guest de-asserted the
704 * timer and if so, unmask the timer irq signal on the host interrupt
705 * controller to ensure that we see future timer signals.
707 static void unmask_vtimer_irq_user(struct kvm_vcpu *vcpu)
709 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
711 if (!kvm_timer_should_fire(vtimer)) {
712 kvm_timer_update_irq(vcpu, false, vtimer);
713 if (static_branch_likely(&has_gic_active_state))
714 set_timer_irq_phys_active(vtimer, false);
716 enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
720 void kvm_timer_sync_user(struct kvm_vcpu *vcpu)
722 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
724 if (unlikely(!timer->enabled))
727 if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
728 unmask_vtimer_irq_user(vcpu);
731 int kvm_timer_vcpu_reset(struct kvm_vcpu *vcpu)
733 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
734 struct timer_map map;
736 get_timer_map(vcpu, &map);
739 * The bits in CNTV_CTL are architecturally reset to UNKNOWN for ARMv8
740 * and to 0 for ARMv7. We provide an implementation that always
741 * resets the timer to be disabled and unmasked and is compliant with
742 * the ARMv7 architecture.
744 timer_set_ctl(vcpu_vtimer(vcpu), 0);
745 timer_set_ctl(vcpu_ptimer(vcpu), 0);
747 if (timer->enabled) {
748 kvm_timer_update_irq(vcpu, false, vcpu_vtimer(vcpu));
749 kvm_timer_update_irq(vcpu, false, vcpu_ptimer(vcpu));
751 if (irqchip_in_kernel(vcpu->kvm)) {
752 kvm_vgic_reset_mapped_irq(vcpu, map.direct_vtimer->irq.irq);
753 if (map.direct_ptimer)
754 kvm_vgic_reset_mapped_irq(vcpu, map.direct_ptimer->irq.irq);
759 soft_timer_cancel(&map.emul_ptimer->hrtimer);
764 /* Make the updates of cntvoff for all vtimer contexts atomic */
765 static void update_vtimer_cntvoff(struct kvm_vcpu *vcpu, u64 cntvoff)
768 struct kvm *kvm = vcpu->kvm;
769 struct kvm_vcpu *tmp;
771 mutex_lock(&kvm->lock);
772 kvm_for_each_vcpu(i, tmp, kvm)
773 timer_set_offset(vcpu_vtimer(tmp), cntvoff);
776 * When called from the vcpu create path, the CPU being created is not
777 * included in the loop above, so we just set it here as well.
779 timer_set_offset(vcpu_vtimer(vcpu), cntvoff);
780 mutex_unlock(&kvm->lock);
783 void kvm_timer_vcpu_init(struct kvm_vcpu *vcpu)
785 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
786 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
787 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
792 /* Synchronize cntvoff across all vtimers of a VM. */
793 update_vtimer_cntvoff(vcpu, kvm_phys_timer_read());
794 timer_set_offset(ptimer, 0);
796 hrtimer_init(&timer->bg_timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD);
797 timer->bg_timer.function = kvm_bg_timer_expire;
799 hrtimer_init(&vtimer->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD);
800 hrtimer_init(&ptimer->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS_HARD);
801 vtimer->hrtimer.function = kvm_hrtimer_expire;
802 ptimer->hrtimer.function = kvm_hrtimer_expire;
804 vtimer->irq.irq = default_vtimer_irq.irq;
805 ptimer->irq.irq = default_ptimer_irq.irq;
807 vtimer->host_timer_irq = host_vtimer_irq;
808 ptimer->host_timer_irq = host_ptimer_irq;
810 vtimer->host_timer_irq_flags = host_vtimer_irq_flags;
811 ptimer->host_timer_irq_flags = host_ptimer_irq_flags;
814 static void kvm_timer_init_interrupt(void *info)
816 enable_percpu_irq(host_vtimer_irq, host_vtimer_irq_flags);
817 enable_percpu_irq(host_ptimer_irq, host_ptimer_irq_flags);
820 int kvm_arm_timer_set_reg(struct kvm_vcpu *vcpu, u64 regid, u64 value)
822 struct arch_timer_context *timer;
825 case KVM_REG_ARM_TIMER_CTL:
826 timer = vcpu_vtimer(vcpu);
827 kvm_arm_timer_write(vcpu, timer, TIMER_REG_CTL, value);
829 case KVM_REG_ARM_TIMER_CNT:
830 timer = vcpu_vtimer(vcpu);
831 update_vtimer_cntvoff(vcpu, kvm_phys_timer_read() - value);
833 case KVM_REG_ARM_TIMER_CVAL:
834 timer = vcpu_vtimer(vcpu);
835 kvm_arm_timer_write(vcpu, timer, TIMER_REG_CVAL, value);
837 case KVM_REG_ARM_PTIMER_CTL:
838 timer = vcpu_ptimer(vcpu);
839 kvm_arm_timer_write(vcpu, timer, TIMER_REG_CTL, value);
841 case KVM_REG_ARM_PTIMER_CVAL:
842 timer = vcpu_ptimer(vcpu);
843 kvm_arm_timer_write(vcpu, timer, TIMER_REG_CVAL, value);
853 static u64 read_timer_ctl(struct arch_timer_context *timer)
856 * Set ISTATUS bit if it's expired.
857 * Note that according to ARMv8 ARM Issue A.k, ISTATUS bit is
858 * UNKNOWN when ENABLE bit is 0, so we chose to set ISTATUS bit
859 * regardless of ENABLE bit for our implementation convenience.
861 u32 ctl = timer_get_ctl(timer);
863 if (!kvm_timer_compute_delta(timer))
864 ctl |= ARCH_TIMER_CTRL_IT_STAT;
869 u64 kvm_arm_timer_get_reg(struct kvm_vcpu *vcpu, u64 regid)
872 case KVM_REG_ARM_TIMER_CTL:
873 return kvm_arm_timer_read(vcpu,
874 vcpu_vtimer(vcpu), TIMER_REG_CTL);
875 case KVM_REG_ARM_TIMER_CNT:
876 return kvm_arm_timer_read(vcpu,
877 vcpu_vtimer(vcpu), TIMER_REG_CNT);
878 case KVM_REG_ARM_TIMER_CVAL:
879 return kvm_arm_timer_read(vcpu,
880 vcpu_vtimer(vcpu), TIMER_REG_CVAL);
881 case KVM_REG_ARM_PTIMER_CTL:
882 return kvm_arm_timer_read(vcpu,
883 vcpu_ptimer(vcpu), TIMER_REG_CTL);
884 case KVM_REG_ARM_PTIMER_CNT:
885 return kvm_arm_timer_read(vcpu,
886 vcpu_ptimer(vcpu), TIMER_REG_CNT);
887 case KVM_REG_ARM_PTIMER_CVAL:
888 return kvm_arm_timer_read(vcpu,
889 vcpu_ptimer(vcpu), TIMER_REG_CVAL);
894 static u64 kvm_arm_timer_read(struct kvm_vcpu *vcpu,
895 struct arch_timer_context *timer,
896 enum kvm_arch_timer_regs treg)
902 val = timer_get_cval(timer) - kvm_phys_timer_read() + timer_get_offset(timer);
903 val = lower_32_bits(val);
907 val = read_timer_ctl(timer);
911 val = timer_get_cval(timer);
915 val = kvm_phys_timer_read() - timer_get_offset(timer);
925 u64 kvm_arm_timer_read_sysreg(struct kvm_vcpu *vcpu,
926 enum kvm_arch_timers tmr,
927 enum kvm_arch_timer_regs treg)
932 kvm_timer_vcpu_put(vcpu);
934 val = kvm_arm_timer_read(vcpu, vcpu_get_timer(vcpu, tmr), treg);
936 kvm_timer_vcpu_load(vcpu);
942 static void kvm_arm_timer_write(struct kvm_vcpu *vcpu,
943 struct arch_timer_context *timer,
944 enum kvm_arch_timer_regs treg,
949 timer_set_cval(timer, kvm_phys_timer_read() - timer_get_offset(timer) + (s32)val);
953 timer_set_ctl(timer, val & ~ARCH_TIMER_CTRL_IT_STAT);
957 timer_set_cval(timer, val);
965 void kvm_arm_timer_write_sysreg(struct kvm_vcpu *vcpu,
966 enum kvm_arch_timers tmr,
967 enum kvm_arch_timer_regs treg,
971 kvm_timer_vcpu_put(vcpu);
973 kvm_arm_timer_write(vcpu, vcpu_get_timer(vcpu, tmr), treg, val);
975 kvm_timer_vcpu_load(vcpu);
979 static int kvm_timer_starting_cpu(unsigned int cpu)
981 kvm_timer_init_interrupt(NULL);
985 static int kvm_timer_dying_cpu(unsigned int cpu)
987 disable_percpu_irq(host_vtimer_irq);
991 static int timer_irq_set_vcpu_affinity(struct irq_data *d, void *vcpu)
994 irqd_set_forwarded_to_vcpu(d);
996 irqd_clr_forwarded_to_vcpu(d);
1001 static int timer_irq_set_irqchip_state(struct irq_data *d,
1002 enum irqchip_irq_state which, bool val)
1004 if (which != IRQCHIP_STATE_ACTIVE || !irqd_is_forwarded_to_vcpu(d))
1005 return irq_chip_set_parent_state(d, which, val);
1008 irq_chip_mask_parent(d);
1010 irq_chip_unmask_parent(d);
1015 static void timer_irq_eoi(struct irq_data *d)
1017 if (!irqd_is_forwarded_to_vcpu(d))
1018 irq_chip_eoi_parent(d);
1021 static void timer_irq_ack(struct irq_data *d)
1024 if (d->chip->irq_ack)
1025 d->chip->irq_ack(d);
1028 static struct irq_chip timer_chip = {
1030 .irq_ack = timer_irq_ack,
1031 .irq_mask = irq_chip_mask_parent,
1032 .irq_unmask = irq_chip_unmask_parent,
1033 .irq_eoi = timer_irq_eoi,
1034 .irq_set_type = irq_chip_set_type_parent,
1035 .irq_set_vcpu_affinity = timer_irq_set_vcpu_affinity,
1036 .irq_set_irqchip_state = timer_irq_set_irqchip_state,
1039 static int timer_irq_domain_alloc(struct irq_domain *domain, unsigned int virq,
1040 unsigned int nr_irqs, void *arg)
1042 irq_hw_number_t hwirq = (uintptr_t)arg;
1044 return irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
1048 static void timer_irq_domain_free(struct irq_domain *domain, unsigned int virq,
1049 unsigned int nr_irqs)
1053 static const struct irq_domain_ops timer_domain_ops = {
1054 .alloc = timer_irq_domain_alloc,
1055 .free = timer_irq_domain_free,
1058 static struct irq_ops arch_timer_irq_ops = {
1059 .get_input_level = kvm_arch_timer_get_input_level,
1062 static void kvm_irq_fixup_flags(unsigned int virq, u32 *flags)
1064 *flags = irq_get_trigger_type(virq);
1065 if (*flags != IRQF_TRIGGER_HIGH && *flags != IRQF_TRIGGER_LOW) {
1066 kvm_err("Invalid trigger for timer IRQ%d, assuming level low\n",
1068 *flags = IRQF_TRIGGER_LOW;
1072 static int kvm_irq_init(struct arch_timer_kvm_info *info)
1074 struct irq_domain *domain = NULL;
1076 if (info->virtual_irq <= 0) {
1077 kvm_err("kvm_arch_timer: invalid virtual timer IRQ: %d\n",
1082 host_vtimer_irq = info->virtual_irq;
1083 kvm_irq_fixup_flags(host_vtimer_irq, &host_vtimer_irq_flags);
1085 if (kvm_vgic_global_state.no_hw_deactivation) {
1086 struct fwnode_handle *fwnode;
1087 struct irq_data *data;
1089 fwnode = irq_domain_alloc_named_fwnode("kvm-timer");
1093 /* Assume both vtimer and ptimer in the same parent */
1094 data = irq_get_irq_data(host_vtimer_irq);
1095 domain = irq_domain_create_hierarchy(data->domain, 0,
1096 NR_KVM_TIMERS, fwnode,
1097 &timer_domain_ops, NULL);
1099 irq_domain_free_fwnode(fwnode);
1103 arch_timer_irq_ops.flags |= VGIC_IRQ_SW_RESAMPLE;
1104 WARN_ON(irq_domain_push_irq(domain, host_vtimer_irq,
1105 (void *)TIMER_VTIMER));
1108 if (info->physical_irq > 0) {
1109 host_ptimer_irq = info->physical_irq;
1110 kvm_irq_fixup_flags(host_ptimer_irq, &host_ptimer_irq_flags);
1113 WARN_ON(irq_domain_push_irq(domain, host_ptimer_irq,
1114 (void *)TIMER_PTIMER));
1120 int kvm_timer_hyp_init(bool has_gic)
1122 struct arch_timer_kvm_info *info;
1125 info = arch_timer_get_kvm_info();
1126 timecounter = &info->timecounter;
1128 if (!timecounter->cc) {
1129 kvm_err("kvm_arch_timer: uninitialized timecounter\n");
1133 err = kvm_irq_init(info);
1137 /* First, do the virtual EL1 timer irq */
1139 err = request_percpu_irq(host_vtimer_irq, kvm_arch_timer_handler,
1140 "kvm guest vtimer", kvm_get_running_vcpus());
1142 kvm_err("kvm_arch_timer: can't request vtimer interrupt %d (%d)\n",
1143 host_vtimer_irq, err);
1148 err = irq_set_vcpu_affinity(host_vtimer_irq,
1149 kvm_get_running_vcpus());
1151 kvm_err("kvm_arch_timer: error setting vcpu affinity\n");
1155 static_branch_enable(&has_gic_active_state);
1158 kvm_debug("virtual timer IRQ%d\n", host_vtimer_irq);
1160 /* Now let's do the physical EL1 timer irq */
1162 if (info->physical_irq > 0) {
1163 err = request_percpu_irq(host_ptimer_irq, kvm_arch_timer_handler,
1164 "kvm guest ptimer", kvm_get_running_vcpus());
1166 kvm_err("kvm_arch_timer: can't request ptimer interrupt %d (%d)\n",
1167 host_ptimer_irq, err);
1172 err = irq_set_vcpu_affinity(host_ptimer_irq,
1173 kvm_get_running_vcpus());
1175 kvm_err("kvm_arch_timer: error setting vcpu affinity\n");
1180 kvm_debug("physical timer IRQ%d\n", host_ptimer_irq);
1181 } else if (has_vhe()) {
1182 kvm_err("kvm_arch_timer: invalid physical timer IRQ: %d\n",
1183 info->physical_irq);
1188 cpuhp_setup_state(CPUHP_AP_KVM_ARM_TIMER_STARTING,
1189 "kvm/arm/timer:starting", kvm_timer_starting_cpu,
1190 kvm_timer_dying_cpu);
1193 free_percpu_irq(host_vtimer_irq, kvm_get_running_vcpus());
1197 void kvm_timer_vcpu_terminate(struct kvm_vcpu *vcpu)
1199 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
1201 soft_timer_cancel(&timer->bg_timer);
1204 static bool timer_irqs_are_valid(struct kvm_vcpu *vcpu)
1206 int vtimer_irq, ptimer_irq, ret;
1209 vtimer_irq = vcpu_vtimer(vcpu)->irq.irq;
1210 ret = kvm_vgic_set_owner(vcpu, vtimer_irq, vcpu_vtimer(vcpu));
1214 ptimer_irq = vcpu_ptimer(vcpu)->irq.irq;
1215 ret = kvm_vgic_set_owner(vcpu, ptimer_irq, vcpu_ptimer(vcpu));
1219 kvm_for_each_vcpu(i, vcpu, vcpu->kvm) {
1220 if (vcpu_vtimer(vcpu)->irq.irq != vtimer_irq ||
1221 vcpu_ptimer(vcpu)->irq.irq != ptimer_irq)
1228 bool kvm_arch_timer_get_input_level(int vintid)
1230 struct kvm_vcpu *vcpu = kvm_get_running_vcpu();
1231 struct arch_timer_context *timer;
1233 if (vintid == vcpu_vtimer(vcpu)->irq.irq)
1234 timer = vcpu_vtimer(vcpu);
1235 else if (vintid == vcpu_ptimer(vcpu)->irq.irq)
1236 timer = vcpu_ptimer(vcpu);
1240 return kvm_timer_should_fire(timer);
1243 int kvm_timer_enable(struct kvm_vcpu *vcpu)
1245 struct arch_timer_cpu *timer = vcpu_timer(vcpu);
1246 struct timer_map map;
1252 /* Without a VGIC we do not map virtual IRQs to physical IRQs */
1253 if (!irqchip_in_kernel(vcpu->kvm))
1257 * At this stage, we have the guarantee that the vgic is both
1258 * available and initialized.
1260 if (!timer_irqs_are_valid(vcpu)) {
1261 kvm_debug("incorrectly configured timer irqs\n");
1265 get_timer_map(vcpu, &map);
1267 ret = kvm_vgic_map_phys_irq(vcpu,
1268 map.direct_vtimer->host_timer_irq,
1269 map.direct_vtimer->irq.irq,
1270 &arch_timer_irq_ops);
1274 if (map.direct_ptimer) {
1275 ret = kvm_vgic_map_phys_irq(vcpu,
1276 map.direct_ptimer->host_timer_irq,
1277 map.direct_ptimer->irq.irq,
1278 &arch_timer_irq_ops);
1290 * On VHE system, we only need to configure the EL2 timer trap register once,
1291 * not for every world switch.
1292 * The host kernel runs at EL2 with HCR_EL2.TGE == 1,
1293 * and this makes those bits have no effect for the host kernel execution.
1295 void kvm_timer_init_vhe(void)
1297 /* When HCR_EL2.E2H ==1, EL1PCEN and EL1PCTEN are shifted by 10 */
1298 u32 cnthctl_shift = 10;
1302 * VHE systems allow the guest direct access to the EL1 physical
1305 val = read_sysreg(cnthctl_el2);
1306 val |= (CNTHCTL_EL1PCEN << cnthctl_shift);
1307 val |= (CNTHCTL_EL1PCTEN << cnthctl_shift);
1308 write_sysreg(val, cnthctl_el2);
1311 static void set_timer_irqs(struct kvm *kvm, int vtimer_irq, int ptimer_irq)
1313 struct kvm_vcpu *vcpu;
1316 kvm_for_each_vcpu(i, vcpu, kvm) {
1317 vcpu_vtimer(vcpu)->irq.irq = vtimer_irq;
1318 vcpu_ptimer(vcpu)->irq.irq = ptimer_irq;
1322 int kvm_arm_timer_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
1324 int __user *uaddr = (int __user *)(long)attr->addr;
1325 struct arch_timer_context *vtimer = vcpu_vtimer(vcpu);
1326 struct arch_timer_context *ptimer = vcpu_ptimer(vcpu);
1329 if (!irqchip_in_kernel(vcpu->kvm))
1332 if (get_user(irq, uaddr))
1335 if (!(irq_is_ppi(irq)))
1338 if (vcpu->arch.timer_cpu.enabled)
1341 switch (attr->attr) {
1342 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER:
1343 set_timer_irqs(vcpu->kvm, irq, ptimer->irq.irq);
1345 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER:
1346 set_timer_irqs(vcpu->kvm, vtimer->irq.irq, irq);
1355 int kvm_arm_timer_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
1357 int __user *uaddr = (int __user *)(long)attr->addr;
1358 struct arch_timer_context *timer;
1361 switch (attr->attr) {
1362 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER:
1363 timer = vcpu_vtimer(vcpu);
1365 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER:
1366 timer = vcpu_ptimer(vcpu);
1372 irq = timer->irq.irq;
1373 return put_user(irq, uaddr);
1376 int kvm_arm_timer_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
1378 switch (attr->attr) {
1379 case KVM_ARM_VCPU_TIMER_IRQ_VTIMER:
1380 case KVM_ARM_VCPU_TIMER_IRQ_PTIMER: