arch/arm64/kernel/topology.c

   1 /*
   2  * arch/arm64/kernel/topology.c
   3  *
   4  * Copyright (C) 2011,2013,2014 Linaro Limited.
   5  *
   6  * Based on the arm32 version written by Vincent Guittot in turn based on
   7  * arch/sh/kernel/topology.c
   8  *
   9  * This file is subject to the terms and conditions of the GNU General Public
  10  * License.  See the file "COPYING" in the main directory of this archive
  11  * for more details.
  12  */
  13
  14 #include <linux/acpi.h>
  15 #include <linux/arch_topology.h>
  16 #include <linux/cacheinfo.h>
  17 #include <linux/cpufreq.h>
  18 #include <linux/init.h>
  19 #include <linux/percpu.h>
  20
  21 #include <asm/cpu.h>
  22 #include <asm/cputype.h>
  23 #include <asm/topology.h>
  24
  25 void store_cpu_topology(unsigned int cpuid)
  26 {
  27         struct cpu_topology *cpuid_topo = &cpu_topology[cpuid];
  28         u64 mpidr;
  29
  30         if (cpuid_topo->package_id != -1)
  31                 goto topology_populated;
  32
  33         mpidr = read_cpuid_mpidr();
  34
  35         /* Uniprocessor systems can rely on default topology values */
  36         if (mpidr & MPIDR_UP_BITMASK)
  37                 return;
  38
  39         /*
  40          * This would be the place to create cpu topology based on MPIDR.
  41          *
  42          * However, it cannot be trusted to depict the actual topology; some
  43          * pieces of the architecture enforce an artificial cap on Aff0 values
  44          * (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an
  45          * artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up
  46          * having absolutely no relationship to the actual underlying system
  47          * topology, and cannot be reasonably used as core / package ID.
  48          *
  49          * If the MT bit is set, Aff0 *could* be used to define a thread ID, but
  50          * we still wouldn't be able to obtain a sane core ID. This means we
  51          * need to entirely ignore MPIDR for any topology deduction.
  52          */
  53         cpuid_topo->thread_id  = -1;
  54         cpuid_topo->core_id    = cpuid;
  55         cpuid_topo->package_id = cpu_to_node(cpuid);
  56
  57         pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n",
  58                  cpuid, cpuid_topo->package_id, cpuid_topo->core_id,
  59                  cpuid_topo->thread_id, mpidr);
  60
  61 topology_populated:
  62         update_siblings_masks(cpuid);
  63 }
  64
  65 #ifdef CONFIG_ACPI
  66 static bool __init acpi_cpu_is_threaded(int cpu)
  67 {
  68         int is_threaded = acpi_pptt_cpu_is_thread(cpu);
  69
  70         /*
  71          * if the PPTT doesn't have thread information, assume a homogeneous
  72          * machine and return the current CPU's thread state.
  73          */
  74         if (is_threaded < 0)
  75                 is_threaded = read_cpuid_mpidr() & MPIDR_MT_BITMASK;
  76
  77         return !!is_threaded;
  78 }
  79
  80 /*
  81  * Propagate the topology information of the processor_topology_node tree to the
  82  * cpu_topology array.
  83  */
  84 int __init parse_acpi_topology(void)
  85 {
  86         int cpu, topology_id;
  87
  88         if (acpi_disabled)
  89                 return 0;
  90
  91         for_each_possible_cpu(cpu) {
  92                 int i, cache_id;
  93
  94                 topology_id = find_acpi_cpu_topology(cpu, 0);
  95                 if (topology_id < 0)
  96                         return topology_id;
  97
  98                 if (acpi_cpu_is_threaded(cpu)) {
  99                         cpu_topology[cpu].thread_id = topology_id;
 100                         topology_id = find_acpi_cpu_topology(cpu, 1);
 101                         cpu_topology[cpu].core_id   = topology_id;
 102                 } else {
 103                         cpu_topology[cpu].thread_id  = -1;
 104                         cpu_topology[cpu].core_id    = topology_id;
 105                 }
 106                 topology_id = find_acpi_cpu_topology_package(cpu);
 107                 cpu_topology[cpu].package_id = topology_id;
 108
 109                 i = acpi_find_last_cache_level(cpu);
 110
 111                 if (i > 0) {
 112                         /*
 113                          * this is the only part of cpu_topology that has
 114                          * a direct relationship with the cache topology
 115                          */
 116                         cache_id = find_acpi_cpu_cache_topology(cpu, i);
 117                         if (cache_id > 0)
 118                                 cpu_topology[cpu].llc_id = cache_id;
 119                 }
 120         }
 121
 122         return 0;
 123 }
 124 #endif
 125
 126 #ifdef CONFIG_ARM64_AMU_EXTN
 127 #define read_corecnt()  read_sysreg_s(SYS_AMEVCNTR0_CORE_EL0)
 128 #define read_constcnt() read_sysreg_s(SYS_AMEVCNTR0_CONST_EL0)
 129 #else
 130 #define read_corecnt()  (0UL)
 131 #define read_constcnt() (0UL)
 132 #endif
 133
 134 #undef pr_fmt
 135 #define pr_fmt(fmt) "AMU: " fmt
 136
 137 static DEFINE_PER_CPU_READ_MOSTLY(unsigned long, arch_max_freq_scale);
 138 static DEFINE_PER_CPU(u64, arch_const_cycles_prev);
 139 static DEFINE_PER_CPU(u64, arch_core_cycles_prev);
 140 static cpumask_var_t amu_fie_cpus;
 141
 142 void update_freq_counters_refs(void)
 143 {
 144         this_cpu_write(arch_core_cycles_prev, read_corecnt());
 145         this_cpu_write(arch_const_cycles_prev, read_constcnt());
 146 }
 147
 148 static inline bool freq_counters_valid(int cpu)
 149 {
 150         if ((cpu >= nr_cpu_ids) || !cpumask_test_cpu(cpu, cpu_present_mask))
 151                 return false;
 152
 153         if (!cpu_has_amu_feat(cpu)) {
 154                 pr_debug("CPU%d: counters are not supported.\n", cpu);
 155                 return false;
 156         }
 157
 158         if (unlikely(!per_cpu(arch_const_cycles_prev, cpu) ||
 159                      !per_cpu(arch_core_cycles_prev, cpu))) {
 160                 pr_debug("CPU%d: cycle counters are not enabled.\n", cpu);
 161                 return false;
 162         }
 163
 164         return true;
 165 }
 166
 167 static int freq_inv_set_max_ratio(int cpu, u64 max_rate, u64 ref_rate)
 168 {
 169         u64 ratio;
 170
 171         if (unlikely(!max_rate || !ref_rate)) {
 172                 pr_debug("CPU%d: invalid maximum or reference frequency.\n",
 173                          cpu);
 174                 return -EINVAL;
 175         }
 176
 177         /*
 178          * Pre-compute the fixed ratio between the frequency of the constant
 179          * reference counter and the maximum frequency of the CPU.
 180          *
 181          *                          ref_rate
 182          * arch_max_freq_scale =   ---------- * SCHED_CAPACITY_SCALE²
 183          *                          max_rate
 184          *
 185          * We use a factor of 2 * SCHED_CAPACITY_SHIFT -> SCHED_CAPACITY_SCALE²
 186          * in order to ensure a good resolution for arch_max_freq_scale for
 187          * very low reference frequencies (down to the KHz range which should
 188          * be unlikely).
 189          */
 190         ratio = ref_rate << (2 * SCHED_CAPACITY_SHIFT);
 191         ratio = div64_u64(ratio, max_rate);
 192         if (!ratio) {
 193                 WARN_ONCE(1, "Reference frequency too low.\n");
 194                 return -EINVAL;
 195         }
 196
 197         per_cpu(arch_max_freq_scale, cpu) = (unsigned long)ratio;
 198
 199         return 0;
 200 }
 201
 202 static inline bool
 203 enable_policy_freq_counters(int cpu, cpumask_var_t valid_cpus)
 204 {
 205         struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
 206
 207         if (!policy) {
 208                 pr_debug("CPU%d: No cpufreq policy found.\n", cpu);
 209                 return false;
 210         }
 211
 212         if (cpumask_subset(policy->related_cpus, valid_cpus))
 213                 cpumask_or(amu_fie_cpus, policy->related_cpus,
 214                            amu_fie_cpus);
 215
 216         cpufreq_cpu_put(policy);
 217
 218         return true;
 219 }
 220
 221 static DEFINE_STATIC_KEY_FALSE(amu_fie_key);
 222 #define amu_freq_invariant() static_branch_unlikely(&amu_fie_key)
 223
 224 static int __init init_amu_fie(void)
 225 {
 226         bool invariance_status = topology_scale_freq_invariant();
 227         cpumask_var_t valid_cpus;
 228         bool have_policy = false;
 229         int ret = 0;
 230         int cpu;
 231
 232         if (!zalloc_cpumask_var(&valid_cpus, GFP_KERNEL))
 233                 return -ENOMEM;
 234
 235         if (!zalloc_cpumask_var(&amu_fie_cpus, GFP_KERNEL)) {
 236                 ret = -ENOMEM;
 237                 goto free_valid_mask;
 238         }
 239
 240         for_each_present_cpu(cpu) {
 241                 if (!freq_counters_valid(cpu) ||
 242                     freq_inv_set_max_ratio(cpu,
 243                                            cpufreq_get_hw_max_freq(cpu) * 1000,
 244                                            arch_timer_get_rate()))
 245                         continue;
 246
 247                 cpumask_set_cpu(cpu, valid_cpus);
 248                 have_policy |= enable_policy_freq_counters(cpu, valid_cpus);
 249         }
 250
 251         /*
 252          * If we are not restricted by cpufreq policies, we only enable
 253          * the use of the AMU feature for FIE if all CPUs support AMU.
 254          * Otherwise, enable_policy_freq_counters has already enabled
 255          * policy cpus.
 256          */
 257         if (!have_policy && cpumask_equal(valid_cpus, cpu_present_mask))
 258                 cpumask_or(amu_fie_cpus, amu_fie_cpus, valid_cpus);
 259
 260         if (!cpumask_empty(amu_fie_cpus)) {
 261                 pr_info("CPUs[%*pbl]: counters will be used for FIE.",
 262                         cpumask_pr_args(amu_fie_cpus));
 263                 static_branch_enable(&amu_fie_key);
 264         }
 265
 266         /*
 267          * If the system is not fully invariant after AMU init, disable
 268          * partial use of counters for frequency invariance.
 269          */
 270         if (!topology_scale_freq_invariant())
 271                 static_branch_disable(&amu_fie_key);
 272
 273         /*
 274          * Task scheduler behavior depends on frequency invariance support,
 275          * either cpufreq or counter driven. If the support status changes as
 276          * a result of counter initialisation and use, retrigger the build of
 277          * scheduling domains to ensure the information is propagated properly.
 278          */
 279         if (invariance_status != topology_scale_freq_invariant())
 280                 rebuild_sched_domains_energy();
 281
 282 free_valid_mask:
 283         free_cpumask_var(valid_cpus);
 284
 285         return ret;
 286 }
 287 late_initcall_sync(init_amu_fie);
 288
 289 bool arch_freq_counters_available(const struct cpumask *cpus)
 290 {
 291         return amu_freq_invariant() &&
 292                cpumask_subset(cpus, amu_fie_cpus);
 293 }
 294
 295 void topology_scale_freq_tick(void)
 296 {
 297         u64 prev_core_cnt, prev_const_cnt;
 298         u64 core_cnt, const_cnt, scale;
 299         int cpu = smp_processor_id();
 300
 301         if (!amu_freq_invariant())
 302                 return;
 303
 304         if (!cpumask_test_cpu(cpu, amu_fie_cpus))
 305                 return;
 306
 307         prev_const_cnt = this_cpu_read(arch_const_cycles_prev);
 308         prev_core_cnt = this_cpu_read(arch_core_cycles_prev);
 309
 310         update_freq_counters_refs();
 311
 312         const_cnt = this_cpu_read(arch_const_cycles_prev);
 313         core_cnt = this_cpu_read(arch_core_cycles_prev);
 314
 315         if (unlikely(core_cnt <= prev_core_cnt ||
 316                      const_cnt <= prev_const_cnt))
 317                 return;
 318
 319         /*
 320          *          /\core    arch_max_freq_scale
 321          * scale =  ------- * --------------------
 322          *          /\const   SCHED_CAPACITY_SCALE
 323          *
 324          * See validate_cpu_freq_invariance_counters() for details on
 325          * arch_max_freq_scale and the use of SCHED_CAPACITY_SHIFT.
 326          */
 327         scale = core_cnt - prev_core_cnt;
 328         scale *= this_cpu_read(arch_max_freq_scale);
 329         scale = div64_u64(scale >> SCHED_CAPACITY_SHIFT,
 330                           const_cnt - prev_const_cnt);
 331
 332         scale = min_t(unsigned long, scale, SCHED_CAPACITY_SCALE);
 333         this_cpu_write(freq_scale, (unsigned long)scale);
 334 }
 335
 336 #ifdef CONFIG_ACPI_CPPC_LIB
 337 #include <acpi/cppc_acpi.h>
 338
 339 static void cpu_read_corecnt(void *val)
 340 {
 341         *(u64 *)val = read_corecnt();
 342 }
 343
 344 static void cpu_read_constcnt(void *val)
 345 {
 346         *(u64 *)val = read_constcnt();
 347 }
 348
 349 static inline
 350 int counters_read_on_cpu(int cpu, smp_call_func_t func, u64 *val)
 351 {
 352         /*
 353          * Abort call on counterless CPU or when interrupts are
 354          * disabled - can lead to deadlock in smp sync call.
 355          */
 356         if (!cpu_has_amu_feat(cpu))
 357                 return -EOPNOTSUPP;
 358
 359         if (WARN_ON_ONCE(irqs_disabled()))
 360                 return -EPERM;
 361
 362         smp_call_function_single(cpu, func, val, 1);
 363
 364         return 0;
 365 }
 366
 367 /*
 368  * Refer to drivers/acpi/cppc_acpi.c for the description of the functions
 369  * below.
 370  */
 371 bool cpc_ffh_supported(void)
 372 {
 373         return freq_counters_valid(get_cpu_with_amu_feat());
 374 }
 375
 376 int cpc_read_ffh(int cpu, struct cpc_reg *reg, u64 *val)
 377 {
 378         int ret = -EOPNOTSUPP;
 379
 380         switch ((u64)reg->address) {
 381         case 0x0:
 382                 ret = counters_read_on_cpu(cpu, cpu_read_corecnt, val);
 383                 break;
 384         case 0x1:
 385                 ret = counters_read_on_cpu(cpu, cpu_read_constcnt, val);
 386                 break;
 387         }
 388
 389         if (!ret) {
 390                 *val &= GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
 391                                     reg->bit_offset);
 392                 *val >>= reg->bit_offset;
 393         }
 394
 395         return ret;
 396 }
 397
 398 int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
 399 {
 400         return -EOPNOTSUPP;
 401 }
 402 #endif /* CONFIG_ACPI_CPPC_LIB */