arch/arm64/include/asm/kvm_hyp.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2015 - ARM Ltd
   4  * Author: Marc Zyngier <marc.zyngier@arm.com>
   5  */
   6
   7 #ifndef __ARM64_KVM_HYP_H__
   8 #define __ARM64_KVM_HYP_H__
   9
  10 #include <linux/compiler.h>
  11 #include <linux/kvm_host.h>
  12 #include <asm/alternative.h>
  13 #include <asm/sysreg.h>
  14
  15 DECLARE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
  16 DECLARE_PER_CPU(unsigned long, kvm_hyp_vector);
  17 DECLARE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);
  18
  19 /*
  20  * Unified accessors for registers that have a different encoding
  21  * between VHE and non-VHE. They must be specified without their "ELx"
  22  * encoding, but with the SYS_ prefix, as defined in asm/sysreg.h.
  23  */
  24
  25 #if defined(__KVM_VHE_HYPERVISOR__)
  26
  27 #define read_sysreg_el0(r)      read_sysreg_s(r##_EL02)
  28 #define write_sysreg_el0(v,r)   write_sysreg_s(v, r##_EL02)
  29 #define read_sysreg_el1(r)      read_sysreg_s(r##_EL12)
  30 #define write_sysreg_el1(v,r)   write_sysreg_s(v, r##_EL12)
  31 #define read_sysreg_el2(r)      read_sysreg_s(r##_EL1)
  32 #define write_sysreg_el2(v,r)   write_sysreg_s(v, r##_EL1)
  33
  34 #else // !__KVM_VHE_HYPERVISOR__
  35
  36 #define read_sysreg_elx(r,nvh,vh)                                       \
  37         ({                                                              \
  38                 u64 reg;                                                \
  39                 asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \
  40                                          __mrs_s("%0", r##vh),          \
  41                                          ARM64_HAS_VIRT_HOST_EXTN)      \
  42                              : "=r" (reg));                             \
  43                 reg;                                                    \
  44         })
  45
  46 #define write_sysreg_elx(v,r,nvh,vh)                                    \
  47         do {                                                            \
  48                 u64 __val = (u64)(v);                                   \
  49                 asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"),        \
  50                                          __msr_s(r##vh, "%x0"),         \
  51                                          ARM64_HAS_VIRT_HOST_EXTN)      \
  52                                          : : "rZ" (__val));             \
  53         } while (0)
  54
  55 #define read_sysreg_el0(r)      read_sysreg_elx(r, _EL0, _EL02)
  56 #define write_sysreg_el0(v,r)   write_sysreg_elx(v, r, _EL0, _EL02)
  57 #define read_sysreg_el1(r)      read_sysreg_elx(r, _EL1, _EL12)
  58 #define write_sysreg_el1(v,r)   write_sysreg_elx(v, r, _EL1, _EL12)
  59 #define read_sysreg_el2(r)      read_sysreg_elx(r, _EL2, _EL1)
  60 #define write_sysreg_el2(v,r)   write_sysreg_elx(v, r, _EL2, _EL1)
  61
  62 #endif  // __KVM_VHE_HYPERVISOR__
  63
  64 /*
  65  * Without an __arch_swab32(), we fall back to ___constant_swab32(), but the
  66  * static inline can allow the compiler to out-of-line this. KVM always wants
  67  * the macro version as its always inlined.
  68  */
  69 #define __kvm_swab32(x) ___constant_swab32(x)
  70
  71 int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
  72
  73 void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if);
  74 void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if);
  75 void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if);
  76 void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if);
  77 void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if);
  78 void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if);
  79 int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
  80
  81 #ifdef __KVM_NVHE_HYPERVISOR__
  82 void __timer_enable_traps(struct kvm_vcpu *vcpu);
  83 void __timer_disable_traps(struct kvm_vcpu *vcpu);
  84 #endif
  85
  86 #ifdef __KVM_NVHE_HYPERVISOR__
  87 void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt);
  88 void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt);
  89 #else
  90 void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt);
  91 void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt);
  92 void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt);
  93 void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt);
  94 #endif
  95
  96 void __debug_switch_to_guest(struct kvm_vcpu *vcpu);
  97 void __debug_switch_to_host(struct kvm_vcpu *vcpu);
  98
  99 #ifdef __KVM_NVHE_HYPERVISOR__
 100 void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu);
 101 void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu);
 102 #endif
 103
 104 void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
 105 void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
 106 void __sve_restore_state(void *sve_pffr, u32 *fpsr);
 107
 108 #ifndef __KVM_NVHE_HYPERVISOR__
 109 void activate_traps_vhe_load(struct kvm_vcpu *vcpu);
 110 void deactivate_traps_vhe_put(struct kvm_vcpu *vcpu);
 111 #endif
 112
 113 u64 __guest_enter(struct kvm_vcpu *vcpu);
 114
 115 bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt);
 116
 117 #ifdef __KVM_NVHE_HYPERVISOR__
 118 void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,
 119                                u64 elr, u64 par);
 120 #endif
 121
 122 #ifdef __KVM_NVHE_HYPERVISOR__
 123 void __pkvm_init_switch_pgd(phys_addr_t phys, unsigned long size,
 124                             phys_addr_t pgd, void *sp, void *cont_fn);
 125 int __pkvm_init(phys_addr_t phys, unsigned long size, unsigned long nr_cpus,
 126                 unsigned long *per_cpu_base, u32 hyp_va_bits);
 127 void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
 128 #endif
 129
 130 extern u64 kvm_nvhe_sym(id_aa64pfr0_el1_sys_val);
 131 extern u64 kvm_nvhe_sym(id_aa64pfr1_el1_sys_val);
 132 extern u64 kvm_nvhe_sym(id_aa64isar0_el1_sys_val);
 133 extern u64 kvm_nvhe_sym(id_aa64isar1_el1_sys_val);
 134 extern u64 kvm_nvhe_sym(id_aa64isar2_el1_sys_val);
 135 extern u64 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val);
 136 extern u64 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val);
 137 extern u64 kvm_nvhe_sym(id_aa64mmfr2_el1_sys_val);
 138 extern u64 kvm_nvhe_sym(id_aa64smfr0_el1_sys_val);
 139
 140 extern unsigned long kvm_nvhe_sym(__icache_flags);
 141 extern unsigned int kvm_nvhe_sym(kvm_arm_vmid_bits);
 142
 143 #endif /* __ARM64_KVM_HYP_H__ */