arm64: zynqmp: Add phy description for usb3.0
[platform/kernel/linux-starfive.git] / arch / arm64 / boot / dts / xilinx / zynqmp-zcu100-revC.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * dts file for Xilinx ZynqMP ZCU100 revC
4  *
5  * (C) Copyright 2016 - 2021, Xilinx, Inc.
6  *
7  * Michal Simek <michal.simek@xilinx.com>
8  * Nathalie Chan King Choy
9  */
10
11 /dts-v1/;
12
13 #include "zynqmp.dtsi"
14 #include "zynqmp-clk-ccf.dtsi"
15 #include <dt-bindings/input/input.h>
16 #include <dt-bindings/interrupt-controller/irq.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 #include <dt-bindings/phy/phy.h>
20
21 / {
22         model = "ZynqMP ZCU100 RevC";
23         compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
24
25         aliases {
26                 i2c0 = &i2c1;
27                 rtc0 = &rtc;
28                 serial0 = &uart1;
29                 serial1 = &uart0;
30                 serial2 = &dcc;
31                 spi0 = &spi0;
32                 spi1 = &spi1;
33                 mmc0 = &sdhci0;
34                 mmc1 = &sdhci1;
35         };
36
37         chosen {
38                 bootargs = "earlycon";
39                 stdout-path = "serial0:115200n8";
40         };
41
42         memory@0 {
43                 device_type = "memory";
44                 reg = <0x0 0x0 0x0 0x80000000>;
45         };
46
47         gpio-keys {
48                 compatible = "gpio-keys";
49                 autorepeat;
50                 sw4 {
51                         label = "sw4";
52                         gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
53                         linux,code = <KEY_POWER>;
54                         wakeup-source;
55                         autorepeat;
56                 };
57         };
58
59         leds {
60                 compatible = "gpio-leds";
61                 led-ds2 {
62                         label = "ds2";
63                         gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
64                         linux,default-trigger = "heartbeat";
65                 };
66
67                 led-ds3 {
68                         label = "ds3";
69                         gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
70                         linux,default-trigger = "phy0tx"; /* WLAN tx */
71                         default-state = "off";
72                 };
73
74                 led-ds4 {
75                         label = "ds4";
76                         gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
77                         linux,default-trigger = "phy0rx"; /* WLAN rx */
78                         default-state = "off";
79                 };
80
81                 led-ds5 {
82                         label = "ds5";
83                         gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
84                         linux,default-trigger = "bluetooth-power";
85                 };
86
87                 vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
88                         label = "vbus_det";
89                         gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
90                         default-state = "on";
91                 };
92         };
93
94         wmmcsdio_fixed: fixedregulator-mmcsdio {
95                 compatible = "regulator-fixed";
96                 regulator-name = "wmmcsdio_fixed";
97                 regulator-min-microvolt = <3300000>;
98                 regulator-max-microvolt = <3300000>;
99                 regulator-always-on;
100                 regulator-boot-on;
101         };
102
103         sdio_pwrseq: sdio-pwrseq {
104                 compatible = "mmc-pwrseq-simple";
105                 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
106                 post-power-on-delay-ms = <10>;
107         };
108
109         ina226 {
110                 compatible = "iio-hwmon";
111                 io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
112         };
113
114         si5335_0: si5335_0 { /* clk0_usb - u23 */
115                 compatible = "fixed-clock";
116                 #clock-cells = <0>;
117                 clock-frequency = <26000000>;
118         };
119
120         si5335_1: si5335_1 { /* clk1_dp - u23 */
121                 compatible = "fixed-clock";
122                 #clock-cells = <0>;
123                 clock-frequency = <27000000>;
124         };
125 };
126
127 &dcc {
128         status = "okay";
129 };
130
131 &gpio {
132         status = "okay";
133         gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
134                           "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
135                           "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
136                           "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
137                           "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
138                           "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
139                           "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
140                           "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
141                           "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
142                           "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
143                           "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
144                           "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
145                           "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
146                           "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
147                           "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
148                           "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
149                           "", "",
150                           "", "", "", "", "", "", "", "", "", "",
151                           "", "", "", "", "", "", "", "", "", "",
152                           "", "", "", "", "", "", "", "", "", "",
153                           "", "", "", "", "", "", "", "", "", "",
154                           "", "", "", "", "", "", "", "", "", "",
155                           "", "", "", "", "", "", "", "", "", "",
156                           "", "", "", "", "", "", "", "", "", "",
157                           "", "", "", "", "", "", "", "", "", "",
158                           "", "", "", "", "", "", "", "", "", "",
159                           "", "", "", "";
160 };
161
162 &i2c1 {
163         status = "okay";
164         pinctrl-names = "default", "gpio";
165         pinctrl-0 = <&pinctrl_i2c1_default>;
166         pinctrl-1 = <&pinctrl_i2c1_gpio>;
167         scl-gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
168         sda-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
169         clock-frequency = <100000>;
170         i2c-mux@75 { /* u11 */
171                 compatible = "nxp,pca9548";
172                 #address-cells = <1>;
173                 #size-cells = <0>;
174                 reg = <0x75>;
175                 i2csw_0: i2c@0 {
176                         #address-cells = <1>;
177                         #size-cells = <0>;
178                         reg = <0>;
179                         label = "LS-I2C0";
180                 };
181                 i2csw_1: i2c@1 {
182                         #address-cells = <1>;
183                         #size-cells = <0>;
184                         reg = <1>;
185                         label = "LS-I2C1";
186                 };
187                 i2csw_2: i2c@2 {
188                         #address-cells = <1>;
189                         #size-cells = <0>;
190                         reg = <2>;
191                         label = "HS-I2C2";
192                 };
193                 i2csw_3: i2c@3 {
194                         #address-cells = <1>;
195                         #size-cells = <0>;
196                         reg = <3>;
197                         label = "HS-I2C3";
198                 };
199                 i2csw_4: i2c@4 {
200                         #address-cells = <1>;
201                         #size-cells = <0>;
202                         reg = <0x4>;
203
204                         pmic: pmic@5e { /* Custom TI PMIC u33 */
205                                 compatible = "ti,tps65086";
206                                 reg = <0x5e>;
207                                 interrupt-parent = <&gpio>;
208                                 interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
209                                 #gpio-cells = <2>;
210                                 gpio-controller;
211                         };
212                 };
213                 i2csw_5: i2c@5 {
214                         #address-cells = <1>;
215                         #size-cells = <0>;
216                         reg = <5>;
217                         /* PS_PMBUS */
218                         u35: ina226@40 { /* u35 */
219                                 compatible = "ti,ina226";
220                                 #io-channel-cells = <1>;
221                                 reg = <0x40>;
222                                 shunt-resistor = <10000>;
223                                 /* MIO31 is alert which should be routed to PMUFW */
224                         };
225                 };
226                 i2csw_6: i2c@6 {
227                         #address-cells = <1>;
228                         #size-cells = <0>;
229                         reg = <6>;
230                         /*
231                          * Not Connected
232                          */
233                 };
234                 i2csw_7: i2c@7 {
235                         #address-cells = <1>;
236                         #size-cells = <0>;
237                         reg = <7>;
238                         /*
239                          * usb5744 (DNP) - U5
240                          * 100kHz - this is default freq for us
241                          */
242                 };
243         };
244 };
245
246 &pinctrl0 {
247         status = "okay";
248         pinctrl_i2c1_default: i2c1-default {
249                 mux {
250                         groups = "i2c1_1_grp";
251                         function = "i2c1";
252                 };
253
254                 conf {
255                         groups = "i2c1_1_grp";
256                         bias-pull-up;
257                         slew-rate = <SLEW_RATE_SLOW>;
258                         power-source = <IO_STANDARD_LVCMOS18>;
259                 };
260         };
261
262         pinctrl_i2c1_gpio: i2c1-gpio {
263                 mux {
264                         groups = "gpio0_4_grp", "gpio0_5_grp";
265                         function = "gpio0";
266                 };
267
268                 conf {
269                         groups = "gpio0_4_grp", "gpio0_5_grp";
270                         slew-rate = <SLEW_RATE_SLOW>;
271                         power-source = <IO_STANDARD_LVCMOS18>;
272                 };
273         };
274
275         pinctrl_sdhci0_default: sdhci0-default {
276                 mux {
277                         groups = "sdio0_3_grp";
278                         function = "sdio0";
279                 };
280
281                 conf {
282                         groups = "sdio0_3_grp";
283                         slew-rate = <SLEW_RATE_SLOW>;
284                         power-source = <IO_STANDARD_LVCMOS18>;
285                         bias-disable;
286                 };
287
288                 mux-cd {
289                         groups = "sdio0_cd_0_grp";
290                         function = "sdio0_cd";
291                 };
292
293                 conf-cd {
294                         groups = "sdio0_cd_0_grp";
295                         bias-high-impedance;
296                         bias-pull-up;
297                         slew-rate = <SLEW_RATE_SLOW>;
298                         power-source = <IO_STANDARD_LVCMOS18>;
299                 };
300         };
301
302         pinctrl_sdhci1_default: sdhci1-default {
303                 mux {
304                         groups = "sdio1_2_grp";
305                         function = "sdio1";
306                 };
307
308                 conf {
309                         groups = "sdio1_2_grp";
310                         slew-rate = <SLEW_RATE_SLOW>;
311                         power-source = <IO_STANDARD_LVCMOS18>;
312                         bias-disable;
313                 };
314         };
315
316         pinctrl_spi0_default: spi0-default {
317                 mux {
318                         groups = "spi0_3_grp";
319                         function = "spi0";
320                 };
321
322                 conf {
323                         groups = "spi0_3_grp";
324                         bias-disable;
325                         slew-rate = <SLEW_RATE_SLOW>;
326                         power-source = <IO_STANDARD_LVCMOS18>;
327                 };
328
329                 mux-cs {
330                         groups = "spi0_ss_9_grp";
331                         function = "spi0_ss";
332                 };
333
334                 conf-cs {
335                         groups = "spi0_ss_9_grp";
336                         bias-disable;
337                 };
338
339         };
340
341         pinctrl_spi1_default: spi1-default {
342                 mux {
343                         groups = "spi1_0_grp";
344                         function = "spi1";
345                 };
346
347                 conf {
348                         groups = "spi1_0_grp";
349                         bias-disable;
350                         slew-rate = <SLEW_RATE_SLOW>;
351                         power-source = <IO_STANDARD_LVCMOS18>;
352                 };
353
354                 mux-cs {
355                         groups = "spi1_ss_0_grp";
356                         function = "spi1_ss";
357                 };
358
359                 conf-cs {
360                         groups = "spi1_ss_0_grp";
361                         bias-disable;
362                 };
363
364         };
365
366         pinctrl_uart0_default: uart0-default {
367                 mux {
368                         groups = "uart0_0_grp";
369                         function = "uart0";
370                 };
371
372                 conf {
373                         groups = "uart0_0_grp";
374                         slew-rate = <SLEW_RATE_SLOW>;
375                         power-source = <IO_STANDARD_LVCMOS18>;
376                 };
377
378                 conf-rx {
379                         pins = "MIO3";
380                         bias-high-impedance;
381                 };
382
383                 conf-tx {
384                         pins = "MIO2";
385                         bias-disable;
386                 };
387         };
388
389         pinctrl_uart1_default: uart1-default {
390                 mux {
391                         groups = "uart1_0_grp";
392                         function = "uart1";
393                 };
394
395                 conf {
396                         groups = "uart1_0_grp";
397                         slew-rate = <SLEW_RATE_SLOW>;
398                         power-source = <IO_STANDARD_LVCMOS18>;
399                 };
400
401                 conf-rx {
402                         pins = "MIO1";
403                         bias-high-impedance;
404                 };
405
406                 conf-tx {
407                         pins = "MIO0";
408                         bias-disable;
409                 };
410         };
411
412         pinctrl_usb0_default: usb0-default {
413                 mux {
414                         groups = "usb0_0_grp";
415                         function = "usb0";
416                 };
417
418                 conf {
419                         groups = "usb0_0_grp";
420                         slew-rate = <SLEW_RATE_SLOW>;
421                         power-source = <IO_STANDARD_LVCMOS18>;
422                 };
423
424                 conf-rx {
425                         pins = "MIO52", "MIO53", "MIO55";
426                         bias-high-impedance;
427                 };
428
429                 conf-tx {
430                         pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
431                                "MIO60", "MIO61", "MIO62", "MIO63";
432                         bias-disable;
433                 };
434         };
435
436         pinctrl_usb1_default: usb1-default {
437                 mux {
438                         groups = "usb1_0_grp";
439                         function = "usb1";
440                 };
441
442                 conf {
443                         groups = "usb1_0_grp";
444                         slew-rate = <SLEW_RATE_SLOW>;
445                         power-source = <IO_STANDARD_LVCMOS18>;
446                 };
447
448                 conf-rx {
449                         pins = "MIO64", "MIO65", "MIO67";
450                         bias-high-impedance;
451                 };
452
453                 conf-tx {
454                         pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
455                                "MIO72", "MIO73", "MIO74", "MIO75";
456                         bias-disable;
457                 };
458         };
459 };
460
461 &psgtr {
462         status = "okay";
463         /* usb3, dp */
464         clocks = <&si5335_0>, <&si5335_1>;
465         clock-names = "ref0", "ref1";
466 };
467
468 &rtc {
469         status = "okay";
470 };
471
472 /* SD0 only supports 3.3V, no level shifter */
473 &sdhci0 {
474         status = "okay";
475         no-1-8-v;
476         disable-wp;
477         pinctrl-names = "default";
478         pinctrl-0 = <&pinctrl_sdhci0_default>;
479         xlnx,mio-bank = <0>;
480 };
481
482 &sdhci1 {
483         status = "okay";
484         bus-width = <0x4>;
485         pinctrl-names = "default";
486         pinctrl-0 = <&pinctrl_sdhci1_default>;
487         xlnx,mio-bank = <0>;
488         non-removable;
489         disable-wp;
490         cap-power-off-card;
491         mmc-pwrseq = <&sdio_pwrseq>;
492         vqmmc-supply = <&wmmcsdio_fixed>;
493         #address-cells = <1>;
494         #size-cells = <0>;
495         wlcore: wifi@2 {
496                 compatible = "ti,wl1831";
497                 reg = <2>;
498                 interrupt-parent = <&gpio>;
499                 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
500         };
501 };
502
503 &spi0 { /* Low Speed connector */
504         status = "okay";
505         label = "LS-SPI0";
506         num-cs = <1>;
507         pinctrl-names = "default";
508         pinctrl-0 = <&pinctrl_spi0_default>;
509 };
510
511 &spi1 { /* High Speed connector */
512         status = "okay";
513         label = "HS-SPI1";
514         num-cs = <1>;
515         pinctrl-names = "default";
516         pinctrl-0 = <&pinctrl_spi1_default>;
517 };
518
519 &uart0 {
520         status = "okay";
521         pinctrl-names = "default";
522         pinctrl-0 = <&pinctrl_uart0_default>;
523         bluetooth {
524                 compatible = "ti,wl1831-st";
525                 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
526         };
527 };
528
529 &uart1 {
530         status = "okay";
531         pinctrl-names = "default";
532         pinctrl-0 = <&pinctrl_uart1_default>;
533 };
534
535 /* ULPI SMSC USB3320 */
536 &usb0 {
537         status = "okay";
538         pinctrl-names = "default";
539         pinctrl-0 = <&pinctrl_usb0_default>;
540         dr_mode = "peripheral";
541         phy-names = "usb3-phy";
542         phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
543         maximum-speed = "super-speed";
544 };
545
546 /* ULPI SMSC USB3320 */
547 &usb1 {
548         status = "okay";
549         pinctrl-names = "default";
550         pinctrl-0 = <&pinctrl_usb1_default>;
551         dr_mode = "host";
552         phy-names = "usb3-phy";
553         phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
554         maximum-speed = "super-speed";
555 };
556
557 &watchdog0 {
558         status = "okay";
559 };
560
561 &zynqmp_dpdma {
562         status = "okay";
563 };
564
565 &zynqmp_dpsub {
566         status = "okay";
567         phy-names = "dp-phy0", "dp-phy1";
568         phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
569                <&psgtr 0 PHY_TYPE_DP 1 1>;
570 };