1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include <dt-bindings/gpio/gpio.h>
9 model = "Radxa ROCK 5 Model B";
10 compatible = "radxa,rock-5b", "rockchip,rk3588";
18 stdout-path = "serial2:1500000n8";
22 compatible = "pwm-fan";
23 cooling-levels = <0 95 145 195 255>;
24 fan-supply = <&vcc5v0_sys>;
25 pwms = <&pwm1 0 50000 0>;
30 compatible = "audio-graph-card";
33 widgets = "Microphone", "Mic Jack",
34 "Headphone", "Headphones";
36 routing = "MIC2", "Mic Jack",
40 dais = <&i2s0_8ch_p0>;
41 hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
42 pinctrl-names = "default";
43 pinctrl-0 = <&hp_detect>;
46 vcc5v0_sys: vcc5v0-sys-regulator {
47 compatible = "regulator-fixed";
48 regulator-name = "vcc5v0_sys";
51 regulator-min-microvolt = <5000000>;
52 regulator-max-microvolt = <5000000>;
55 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
56 compatible = "regulator-fixed";
57 regulator-name = "vcc_1v1_nldo_s3";
60 regulator-min-microvolt = <1100000>;
61 regulator-max-microvolt = <1100000>;
62 vin-supply = <&vcc5v0_sys>;
67 cpu-supply = <&vdd_cpu_big0_s0>;
71 cpu-supply = <&vdd_cpu_big0_s0>;
75 cpu-supply = <&vdd_cpu_big1_s0>;
79 cpu-supply = <&vdd_cpu_big1_s0>;
83 cpu-supply = <&vdd_cpu_lit_s0>;
87 cpu-supply = <&vdd_cpu_lit_s0>;
91 cpu-supply = <&vdd_cpu_lit_s0>;
95 cpu-supply = <&vdd_cpu_lit_s0>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&i2c0m2_xfer>;
103 vdd_cpu_big0_s0: regulator@42 {
104 compatible = "rockchip,rk8602";
106 fcs,suspend-voltage-selector = <1>;
107 regulator-name = "vdd_cpu_big0_s0";
110 regulator-min-microvolt = <550000>;
111 regulator-max-microvolt = <1050000>;
112 regulator-ramp-delay = <2300>;
113 vin-supply = <&vcc5v0_sys>;
115 regulator-state-mem {
116 regulator-off-in-suspend;
120 vdd_cpu_big1_s0: regulator@43 {
121 compatible = "rockchip,rk8603", "rockchip,rk8602";
123 fcs,suspend-voltage-selector = <1>;
124 regulator-name = "vdd_cpu_big1_s0";
127 regulator-min-microvolt = <550000>;
128 regulator-max-microvolt = <1050000>;
129 regulator-ramp-delay = <2300>;
130 vin-supply = <&vcc5v0_sys>;
132 regulator-state-mem {
133 regulator-off-in-suspend;
142 compatible = "haoyu,hym8563";
145 clock-output-names = "hym8563";
146 pinctrl-names = "default";
147 pinctrl-0 = <&hym8563_int>;
148 interrupt-parent = <&gpio0>;
149 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
157 es8316: audio-codec@11 {
158 compatible = "everest,es8316";
160 clocks = <&cru I2S0_8CH_MCLKOUT>;
161 clock-names = "mclk";
162 assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
163 assigned-clock-rates = <12288000>;
164 #sound-dai-cells = <0>;
167 es8316_p0_0: endpoint {
168 remote-endpoint = <&i2s0_8ch_p0_0>;
175 pinctrl-names = "default";
176 pinctrl-0 = <&i2s0_lrck
184 i2s0_8ch_p0_0: endpoint {
187 remote-endpoint = <&es8316_p0_0>;
194 hym8563_int: hym8563-int {
195 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
200 hp_detect: hp-detect {
201 rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
211 vref-supply = <&avcc_1v8_s0>;
220 max-frequency = <200000000>;
222 mmc-hs400-enhanced-strobe;
227 max-frequency = <200000000>;
235 vmmc-supply = <&vcc_3v3_s3>;
236 vqmmc-supply = <&vccio_sd_s0>;
242 assigned-clocks = <&cru CLK_SPI2>;
243 assigned-clock-rates = <200000000>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
249 compatible = "rockchip,rk806";
250 spi-max-frequency = <1000000>;
253 interrupt-parent = <&gpio0>;
254 interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
258 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
260 vcc1-supply = <&vcc5v0_sys>;
261 vcc2-supply = <&vcc5v0_sys>;
262 vcc3-supply = <&vcc5v0_sys>;
263 vcc4-supply = <&vcc5v0_sys>;
264 vcc5-supply = <&vcc5v0_sys>;
265 vcc6-supply = <&vcc5v0_sys>;
266 vcc7-supply = <&vcc5v0_sys>;
267 vcc8-supply = <&vcc5v0_sys>;
268 vcc9-supply = <&vcc5v0_sys>;
269 vcc10-supply = <&vcc5v0_sys>;
270 vcc11-supply = <&vcc_2v0_pldo_s3>;
271 vcc12-supply = <&vcc5v0_sys>;
272 vcc13-supply = <&vcc_1v1_nldo_s3>;
273 vcc14-supply = <&vcc_1v1_nldo_s3>;
274 vcca-supply = <&vcc5v0_sys>;
279 rk806_dvs1_null: dvs1-null-pins {
280 pins = "gpio_pwrctrl2";
281 function = "pin_fun0";
284 rk806_dvs2_null: dvs2-null-pins {
285 pins = "gpio_pwrctrl2";
286 function = "pin_fun0";
289 rk806_dvs3_null: dvs3-null-pins {
290 pins = "gpio_pwrctrl3";
291 function = "pin_fun0";
295 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
297 regulator-min-microvolt = <550000>;
298 regulator-max-microvolt = <950000>;
299 regulator-ramp-delay = <12500>;
300 regulator-name = "vdd_gpu_s0";
301 regulator-enable-ramp-delay = <400>;
303 regulator-state-mem {
304 regulator-off-in-suspend;
308 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
311 regulator-min-microvolt = <550000>;
312 regulator-max-microvolt = <950000>;
313 regulator-ramp-delay = <12500>;
314 regulator-name = "vdd_cpu_lit_s0";
316 regulator-state-mem {
317 regulator-off-in-suspend;
321 vdd_log_s0: dcdc-reg3 {
324 regulator-min-microvolt = <675000>;
325 regulator-max-microvolt = <750000>;
326 regulator-ramp-delay = <12500>;
327 regulator-name = "vdd_log_s0";
329 regulator-state-mem {
330 regulator-off-in-suspend;
331 regulator-suspend-microvolt = <750000>;
335 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
338 regulator-min-microvolt = <550000>;
339 regulator-max-microvolt = <950000>;
340 regulator-ramp-delay = <12500>;
341 regulator-name = "vdd_vdenc_s0";
343 regulator-state-mem {
344 regulator-off-in-suspend;
348 vdd_ddr_s0: dcdc-reg5 {
351 regulator-min-microvolt = <675000>;
352 regulator-max-microvolt = <900000>;
353 regulator-ramp-delay = <12500>;
354 regulator-name = "vdd_ddr_s0";
356 regulator-state-mem {
357 regulator-off-in-suspend;
358 regulator-suspend-microvolt = <850000>;
362 vdd2_ddr_s3: dcdc-reg6 {
365 regulator-name = "vdd2_ddr_s3";
367 regulator-state-mem {
368 regulator-on-in-suspend;
372 vcc_2v0_pldo_s3: dcdc-reg7 {
375 regulator-min-microvolt = <2000000>;
376 regulator-max-microvolt = <2000000>;
377 regulator-ramp-delay = <12500>;
378 regulator-name = "vdd_2v0_pldo_s3";
380 regulator-state-mem {
381 regulator-on-in-suspend;
382 regulator-suspend-microvolt = <2000000>;
386 vcc_3v3_s3: dcdc-reg8 {
389 regulator-min-microvolt = <3300000>;
390 regulator-max-microvolt = <3300000>;
391 regulator-name = "vcc_3v3_s3";
393 regulator-state-mem {
394 regulator-on-in-suspend;
395 regulator-suspend-microvolt = <3300000>;
399 vddq_ddr_s0: dcdc-reg9 {
402 regulator-name = "vddq_ddr_s0";
404 regulator-state-mem {
405 regulator-off-in-suspend;
409 vcc_1v8_s3: dcdc-reg10 {
412 regulator-min-microvolt = <1800000>;
413 regulator-max-microvolt = <1800000>;
414 regulator-name = "vcc_1v8_s3";
416 regulator-state-mem {
417 regulator-on-in-suspend;
418 regulator-suspend-microvolt = <1800000>;
422 avcc_1v8_s0: pldo-reg1 {
425 regulator-min-microvolt = <1800000>;
426 regulator-max-microvolt = <1800000>;
427 regulator-name = "avcc_1v8_s0";
429 regulator-state-mem {
430 regulator-off-in-suspend;
434 vcc_1v8_s0: pldo-reg2 {
437 regulator-min-microvolt = <1800000>;
438 regulator-max-microvolt = <1800000>;
439 regulator-name = "vcc_1v8_s0";
441 regulator-state-mem {
442 regulator-off-in-suspend;
443 regulator-suspend-microvolt = <1800000>;
447 avdd_1v2_s0: pldo-reg3 {
450 regulator-min-microvolt = <1200000>;
451 regulator-max-microvolt = <1200000>;
452 regulator-name = "avdd_1v2_s0";
454 regulator-state-mem {
455 regulator-off-in-suspend;
459 vcc_3v3_s0: pldo-reg4 {
462 regulator-min-microvolt = <3300000>;
463 regulator-max-microvolt = <3300000>;
464 regulator-ramp-delay = <12500>;
465 regulator-name = "vcc_3v3_s0";
467 regulator-state-mem {
468 regulator-off-in-suspend;
472 vccio_sd_s0: pldo-reg5 {
475 regulator-min-microvolt = <1800000>;
476 regulator-max-microvolt = <3300000>;
477 regulator-ramp-delay = <12500>;
478 regulator-name = "vccio_sd_s0";
480 regulator-state-mem {
481 regulator-off-in-suspend;
485 pldo6_s3: pldo-reg6 {
488 regulator-min-microvolt = <1800000>;
489 regulator-max-microvolt = <1800000>;
490 regulator-name = "pldo6_s3";
492 regulator-state-mem {
493 regulator-on-in-suspend;
494 regulator-suspend-microvolt = <1800000>;
498 vdd_0v75_s3: nldo-reg1 {
501 regulator-min-microvolt = <750000>;
502 regulator-max-microvolt = <750000>;
503 regulator-name = "vdd_0v75_s3";
505 regulator-state-mem {
506 regulator-on-in-suspend;
507 regulator-suspend-microvolt = <750000>;
511 vdd_ddr_pll_s0: nldo-reg2 {
514 regulator-min-microvolt = <850000>;
515 regulator-max-microvolt = <850000>;
516 regulator-name = "vdd_ddr_pll_s0";
518 regulator-state-mem {
519 regulator-off-in-suspend;
520 regulator-suspend-microvolt = <850000>;
524 avdd_0v75_s0: nldo-reg3 {
527 regulator-min-microvolt = <750000>;
528 regulator-max-microvolt = <750000>;
529 regulator-name = "avdd_0v75_s0";
531 regulator-state-mem {
532 regulator-off-in-suspend;
536 vdd_0v85_s0: nldo-reg4 {
539 regulator-min-microvolt = <850000>;
540 regulator-max-microvolt = <850000>;
541 regulator-name = "vdd_0v85_s0";
543 regulator-state-mem {
544 regulator-off-in-suspend;
548 vdd_0v75_s0: nldo-reg5 {
551 regulator-min-microvolt = <750000>;
552 regulator-max-microvolt = <750000>;
553 regulator-name = "vdd_0v75_s0";
555 regulator-state-mem {
556 regulator-off-in-suspend;
564 pinctrl-0 = <&uart2m0_xfer>;