1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
6 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-opp.dtsi"
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&led_pin_module>;
18 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
19 linux,default-trigger = "heartbeat";
25 * Overwrite the opp-table for CPUB as this board uses a different
26 * regulator (FAN53555) that only allows 10mV steps and therefore
27 * can't reach the operation point target voltages from rk3399-opp.dtsi
29 /delete-node/ opp-table1;
30 cluster1_opp: opp-table1 {
31 compatible = "operating-points-v2";
35 opp-hz = /bits/ 64 <408000000>;
36 opp-microvolt = <800000>;
37 clock-latency-ns = <40000>;
40 opp-hz = /bits/ 64 <600000000>;
41 opp-microvolt = <800000>;
44 opp-hz = /bits/ 64 <816000000>;
45 opp-microvolt = <830000>;
49 opp-hz = /bits/ 64 <1008000000>;
50 opp-microvolt = <880000>;
53 opp-hz = /bits/ 64 <1200000000>;
54 opp-microvolt = <950000>;
57 opp-hz = /bits/ 64 <1416000000>;
58 opp-microvolt = <1030000>;
61 opp-hz = /bits/ 64 <1608000000>;
62 opp-microvolt = <1100000>;
65 opp-hz = /bits/ 64 <1800000000>;
66 opp-microvolt = <1200000>;
69 opp-hz = /bits/ 64 <1992000000>;
70 opp-microvolt = <1230000>;
75 clkin_gmac: external-gmac-clock {
76 compatible = "fixed-clock";
77 clock-frequency = <125000000>;
78 clock-output-names = "clkin_gmac";
82 vcc1v2_phy: vcc1v2-phy {
83 compatible = "regulator-fixed";
84 regulator-name = "vcc1v2_phy";
87 regulator-min-microvolt = <1200000>;
88 regulator-max-microvolt = <1200000>;
89 vin-supply = <&vcc5v0_sys>;
92 vcc3v3_sys: vcc3v3-sys {
93 compatible = "regulator-fixed";
94 regulator-name = "vcc3v3_sys";
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99 vin-supply = <&vcc5v0_sys>;
102 vcc5v0_host: vcc5v0-host-regulator {
103 compatible = "regulator-fixed";
104 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
106 pinctrl-names = "default";
107 pinctrl-0 = <&vcc5v0_host_en>;
108 regulator-name = "vcc5v0_host";
110 vin-supply = <&vcc5v0_sys>;
113 vcc5v0_sys: vcc5v0-sys {
114 compatible = "regulator-fixed";
115 regulator-name = "vcc5v0_sys";
118 regulator-min-microvolt = <5000000>;
119 regulator-max-microvolt = <5000000>;
124 cpu-supply = <&vdd_cpu_b>;
128 cpu-supply = <&vdd_cpu_b>;
132 cpu-supply = <&vdd_cpu_l>;
136 cpu-supply = <&vdd_cpu_l>;
140 cpu-supply = <&vdd_cpu_l>;
144 cpu-supply = <&vdd_cpu_l>;
149 drive-impedance-ohm = <33>;
153 assigned-clocks = <&cru SCLK_RMII_SRC>;
154 assigned-clock-parents = <&clkin_gmac>;
155 clock_in_out = "input";
156 phy-supply = <&vcc1v2_phy>;
158 pinctrl-names = "default";
159 pinctrl-0 = <&rgmii_pins>;
160 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
161 snps,reset-active-low;
162 snps,reset-delays-us = <0 10000 50000>;
170 i2c-scl-rising-time-ns = <168>;
171 i2c-scl-falling-time-ns = <4>;
172 clock-frequency = <400000>;
175 compatible = "rockchip,rk808";
177 interrupt-parent = <&gpio1>;
178 interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
180 clock-output-names = "xin32k", "rk808-clkout2";
181 pinctrl-names = "default";
182 pinctrl-0 = <&pmic_int_l>;
183 rockchip,system-power-controller;
186 vcc1-supply = <&vcc5v0_sys>;
187 vcc2-supply = <&vcc5v0_sys>;
188 vcc3-supply = <&vcc5v0_sys>;
189 vcc4-supply = <&vcc5v0_sys>;
190 vcc6-supply = <&vcc5v0_sys>;
191 vcc7-supply = <&vcc5v0_sys>;
192 vcc8-supply = <&vcc3v3_sys>;
193 vcc9-supply = <&vcc5v0_sys>;
194 vcc10-supply = <&vcc5v0_sys>;
195 vcc11-supply = <&vcc5v0_sys>;
196 vcc12-supply = <&vcc3v3_sys>;
197 vddio-supply = <&vcc1v8_pmu>;
200 vdd_center: DCDC_REG1 {
201 regulator-name = "vdd_center";
202 regulator-min-microvolt = <750000>;
203 regulator-max-microvolt = <1350000>;
204 regulator-ramp-delay = <6001>;
207 regulator-state-mem {
208 regulator-off-in-suspend;
212 vdd_cpu_l: DCDC_REG2 {
213 regulator-name = "vdd_cpu_l";
214 regulator-min-microvolt = <750000>;
215 regulator-max-microvolt = <1350000>;
216 regulator-ramp-delay = <6001>;
219 regulator-state-mem {
220 regulator-off-in-suspend;
225 regulator-name = "vcc_ddr";
228 regulator-state-mem {
229 regulator-on-in-suspend;
234 regulator-name = "vcc_1v8";
235 regulator-min-microvolt = <1800000>;
236 regulator-max-microvolt = <1800000>;
239 regulator-state-mem {
240 regulator-on-in-suspend;
241 regulator-suspend-microvolt = <1800000>;
246 regulator-name = "vcc_ldo1";
247 regulator-min-microvolt = <1800000>;
248 regulator-max-microvolt = <1800000>;
250 regulator-state-mem {
251 regulator-off-in-suspend;
255 vcc1v8_hdmi: LDO_REG2 {
256 regulator-name = "vcc1v8_hdmi";
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <1800000>;
261 regulator-state-mem {
262 regulator-off-in-suspend;
266 vcc1v8_pmu: LDO_REG3 {
267 regulator-name = "vcc1v8_pmu";
268 regulator-min-microvolt = <1800000>;
269 regulator-max-microvolt = <1800000>;
272 regulator-state-mem {
273 regulator-on-in-suspend;
274 regulator-suspend-microvolt = <1800000>;
279 regulator-name = "vcc_sd";
280 regulator-min-microvolt = <1800000>;
281 regulator-max-microvolt = <3000000>;
284 regulator-state-mem {
285 regulator-on-in-suspend;
286 regulator-suspend-microvolt = <3000000>;
291 regulator-name = "vcc_ldo5";
292 regulator-min-microvolt = <3000000>;
293 regulator-max-microvolt = <3000000>;
295 regulator-state-mem {
296 regulator-off-in-suspend;
301 regulator-name = "vcc_ldo6";
302 regulator-min-microvolt = <1500000>;
303 regulator-max-microvolt = <1500000>;
305 regulator-state-mem {
306 regulator-off-in-suspend;
310 vcc0v9_hdmi: LDO_REG7 {
311 regulator-name = "vcc0v9_hdmi";
312 regulator-min-microvolt = <900000>;
313 regulator-max-microvolt = <900000>;
316 regulator-state-mem {
317 regulator-off-in-suspend;
321 vcc_efuse: LDO_REG8 {
322 regulator-name = "vcc_efuse";
323 regulator-min-microvolt = <1800000>;
324 regulator-max-microvolt = <1800000>;
327 regulator-state-mem {
328 regulator-off-in-suspend;
332 vcc3v3_s3: SWITCH_REG1 {
333 regulator-name = "vcc3v3_s3";
336 regulator-state-mem {
337 regulator-off-in-suspend;
341 vcc3v3_s0: SWITCH_REG2 {
342 regulator-name = "vcc3v3_s0";
345 regulator-state-mem {
346 regulator-off-in-suspend;
352 vdd_gpu: regulator@60 {
353 compatible = "fcs,fan53555";
355 fcs,suspend-voltage-selector = <1>;
356 regulator-name = "vdd_gpu";
357 regulator-min-microvolt = <600000>;
358 regulator-max-microvolt = <1230000>;
359 regulator-ramp-delay = <1000>;
362 vin-supply = <&vcc5v0_sys>;
368 clock-frequency = <400000>;
371 compatible = "ti,amc6821";
373 #cooling-cells = <2>;
377 compatible = "isil,isl1208";
384 clock-frequency = <400000>;
386 vdd_cpu_b: regulator@60 {
387 compatible = "fcs,fan53555";
389 vin-supply = <&vcc5v0_sys>;
390 regulator-name = "vdd_cpu_b";
391 regulator-min-microvolt = <600000>;
392 regulator-max-microvolt = <1230000>;
393 regulator-ramp-delay = <1000>;
394 fcs,suspend-voltage-selector = <1>;
401 pinctrl-0 = <&i2s0_2ch_bus>;
402 rockchip,playback-channels = <2>;
403 rockchip,capture-channels = <2>;
408 * As Q7 does not specify neither a global nor a RX clock for I2S these
409 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
410 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent
415 <3 RK_PD0 1 &pcfg_pull_none>,
416 <3 RK_PD2 1 &pcfg_pull_none>,
417 <3 RK_PD3 1 &pcfg_pull_none>,
418 <3 RK_PD7 1 &pcfg_pull_none>;
423 bt656-supply = <&vcc_1v8>;
424 audio-supply = <&vcc_1v8>;
425 sdmmc-supply = <&vcc_sd>;
426 gpio1830-supply = <&vcc_1v8>;
431 pmu1830-supply = <&vcc_1v8>;
440 i2c8_xfer_a: i2c8-xfer {
442 <1 RK_PC4 1 &pcfg_pull_up>,
443 <1 RK_PC5 1 &pcfg_pull_up>;
448 led_pin_module: led-module-gpio {
450 <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
455 pmic_int_l: pmic-int-l {
457 <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
462 vcc5v0_host_en: vcc5v0-host-en {
464 <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
472 mmc-hs400-enhanced-strobe;
485 compatible = "jedec,spi-nor";
487 spi-max-frequency = <50000000>;
496 rockchip,hw-tshut-mode = <1>;
497 rockchip,hw-tshut-polarity = <1>;
504 u2phy1_otg: otg-port {
508 u2phy1_host: host-port {
509 phy-supply = <&vcc5v0_host>;