arch/arm64/boot/dts/renesas/r8a774c0.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the RZ/G2E (R8A774C0) SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a774c0-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a774c0";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         /*
  18          * The external audio clocks are configured as 0 Hz fixed frequency
  19          * clocks by default.
  20          * Boards that provide audio clocks should override them.
  21          */
  22         audio_clk_a: audio_clk_a {
  23                 compatible = "fixed-clock";
  24                 #clock-cells = <0>;
  25                 clock-frequency = <0>;
  26         };
  27
  28         audio_clk_b: audio_clk_b {
  29                 compatible = "fixed-clock";
  30                 #clock-cells = <0>;
  31                 clock-frequency = <0>;
  32         };
  33
  34         audio_clk_c: audio_clk_c {
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <0>;
  38         };
  39
  40         /* External CAN clock - to be overridden by boards that provide it */
  41         can_clk: can {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         cpus {
  48                 #address-cells = <1>;
  49                 #size-cells = <0>;
  50
  51                 a53_0: cpu@0 {
  52                         compatible = "arm,cortex-a53", "arm,armv8";
  53                         reg = <0>;
  54                         device_type = "cpu";
  55                         power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
  56                         next-level-cache = <&L2_CA53>;
  57                         enable-method = "psci";
  58                 };
  59
  60                 a53_1: cpu@1 {
  61                         compatible = "arm,cortex-a53", "arm,armv8";
  62                         reg = <1>;
  63                         device_type = "cpu";
  64                         power-domains = <&sysc R8A774C0_PD_CA53_CPU1>;
  65                         next-level-cache = <&L2_CA53>;
  66                         enable-method = "psci";
  67                 };
  68
  69                 L2_CA53: cache-controller-0 {
  70                         compatible = "cache";
  71                         power-domains = <&sysc R8A774C0_PD_CA53_SCU>;
  72                         cache-unified;
  73                         cache-level = <2>;
  74                 };
  75         };
  76
  77         extal_clk: extal {
  78                 compatible = "fixed-clock";
  79                 #clock-cells = <0>;
  80                 /* This value must be overridden by the board */
  81                 clock-frequency = <0>;
  82         };
  83
  84         /* External PCIe clock - can be overridden by the board */
  85         pcie_bus_clk: pcie_bus {
  86                 compatible = "fixed-clock";
  87                 #clock-cells = <0>;
  88                 clock-frequency = <0>;
  89         };
  90
  91         pmu_a53 {
  92                 compatible = "arm,cortex-a53-pmu";
  93                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
  94                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  95                 interrupt-affinity = <&a53_0>, <&a53_1>;
  96         };
  97
  98         psci {
  99                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 100                 method = "smc";
 101         };
 102
 103         /* External SCIF clock - to be overridden by boards that provide it */
 104         scif_clk: scif {
 105                 compatible = "fixed-clock";
 106                 #clock-cells = <0>;
 107                 clock-frequency = <0>;
 108         };
 109
 110         soc: soc {
 111                 compatible = "simple-bus";
 112                 interrupt-parent = <&gic>;
 113                 #address-cells = <2>;
 114                 #size-cells = <2>;
 115                 ranges;
 116
 117                 rwdt: watchdog@e6020000 {
 118                         compatible = "renesas,r8a774c0-wdt",
 119                                      "renesas,rcar-gen3-wdt";
 120                         reg = <0 0xe6020000 0 0x0c>;
 121                         clocks = <&cpg CPG_MOD 402>;
 122                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 123                         resets = <&cpg 402>;
 124                         status = "disabled";
 125                 };
 126
 127                 gpio0: gpio@e6050000 {
 128                         compatible = "renesas,gpio-r8a774c0",
 129                                      "renesas,rcar-gen3-gpio";
 130                         reg = <0 0xe6050000 0 0x50>;
 131                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 132                         #gpio-cells = <2>;
 133                         gpio-controller;
 134                         gpio-ranges = <&pfc 0 0 18>;
 135                         #interrupt-cells = <2>;
 136                         interrupt-controller;
 137                         clocks = <&cpg CPG_MOD 912>;
 138                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 139                         resets = <&cpg 912>;
 140                 };
 141
 142                 gpio1: gpio@e6051000 {
 143                         compatible = "renesas,gpio-r8a774c0",
 144                                      "renesas,rcar-gen3-gpio";
 145                         reg = <0 0xe6051000 0 0x50>;
 146                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 147                         #gpio-cells = <2>;
 148                         gpio-controller;
 149                         gpio-ranges = <&pfc 0 32 23>;
 150                         #interrupt-cells = <2>;
 151                         interrupt-controller;
 152                         clocks = <&cpg CPG_MOD 911>;
 153                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 154                         resets = <&cpg 911>;
 155                 };
 156
 157                 gpio2: gpio@e6052000 {
 158                         compatible = "renesas,gpio-r8a774c0",
 159                                      "renesas,rcar-gen3-gpio";
 160                         reg = <0 0xe6052000 0 0x50>;
 161                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 162                         #gpio-cells = <2>;
 163                         gpio-controller;
 164                         gpio-ranges = <&pfc 0 64 26>;
 165                         #interrupt-cells = <2>;
 166                         interrupt-controller;
 167                         clocks = <&cpg CPG_MOD 910>;
 168                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 169                         resets = <&cpg 910>;
 170                 };
 171
 172                 gpio3: gpio@e6053000 {
 173                         compatible = "renesas,gpio-r8a774c0",
 174                                      "renesas,rcar-gen3-gpio";
 175                         reg = <0 0xe6053000 0 0x50>;
 176                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 177                         #gpio-cells = <2>;
 178                         gpio-controller;
 179                         gpio-ranges = <&pfc 0 96 16>;
 180                         #interrupt-cells = <2>;
 181                         interrupt-controller;
 182                         clocks = <&cpg CPG_MOD 909>;
 183                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 184                         resets = <&cpg 909>;
 185                 };
 186
 187                 gpio4: gpio@e6054000 {
 188                         compatible = "renesas,gpio-r8a774c0",
 189                                      "renesas,rcar-gen3-gpio";
 190                         reg = <0 0xe6054000 0 0x50>;
 191                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 192                         #gpio-cells = <2>;
 193                         gpio-controller;
 194                         gpio-ranges = <&pfc 0 128 11>;
 195                         #interrupt-cells = <2>;
 196                         interrupt-controller;
 197                         clocks = <&cpg CPG_MOD 908>;
 198                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 199                         resets = <&cpg 908>;
 200                 };
 201
 202                 gpio5: gpio@e6055000 {
 203                         compatible = "renesas,gpio-r8a774c0",
 204                                      "renesas,rcar-gen3-gpio";
 205                         reg = <0 0xe6055000 0 0x50>;
 206                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 207                         #gpio-cells = <2>;
 208                         gpio-controller;
 209                         gpio-ranges = <&pfc 0 160 20>;
 210                         #interrupt-cells = <2>;
 211                         interrupt-controller;
 212                         clocks = <&cpg CPG_MOD 907>;
 213                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 214                         resets = <&cpg 907>;
 215                 };
 216
 217                 gpio6: gpio@e6055400 {
 218                         compatible = "renesas,gpio-r8a774c0",
 219                                      "renesas,rcar-gen3-gpio";
 220                         reg = <0 0xe6055400 0 0x50>;
 221                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 222                         #gpio-cells = <2>;
 223                         gpio-controller;
 224                         gpio-ranges = <&pfc 0 192 18>;
 225                         #interrupt-cells = <2>;
 226                         interrupt-controller;
 227                         clocks = <&cpg CPG_MOD 906>;
 228                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 229                         resets = <&cpg 906>;
 230                 };
 231
 232                 pfc: pin-controller@e6060000 {
 233                         compatible = "renesas,pfc-r8a774c0";
 234                         reg = <0 0xe6060000 0 0x508>;
 235                 };
 236
 237                 cpg: clock-controller@e6150000 {
 238                         compatible = "renesas,r8a774c0-cpg-mssr";
 239                         reg = <0 0xe6150000 0 0x1000>;
 240                         clocks = <&extal_clk>;
 241                         clock-names = "extal";
 242                         #clock-cells = <2>;
 243                         #power-domain-cells = <0>;
 244                         #reset-cells = <1>;
 245                 };
 246
 247                 rst: reset-controller@e6160000 {
 248                         compatible = "renesas,r8a774c0-rst";
 249                         reg = <0 0xe6160000 0 0x0200>;
 250                 };
 251
 252                 sysc: system-controller@e6180000 {
 253                         compatible = "renesas,r8a774c0-sysc";
 254                         reg = <0 0xe6180000 0 0x0400>;
 255                         #power-domain-cells = <1>;
 256                 };
 257
 258                 thermal: thermal@e6190000 {
 259                         compatible = "renesas,thermal-r8a774c0";
 260                         reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
 261                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 262                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 264                         clocks = <&cpg CPG_MOD 522>;
 265                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 266                         resets = <&cpg 522>;
 267                         #thermal-sensor-cells = <0>;
 268                 };
 269
 270                 intc_ex: interrupt-controller@e61c0000 {
 271                         compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc";
 272                         #interrupt-cells = <2>;
 273                         interrupt-controller;
 274                         reg = <0 0xe61c0000 0 0x200>;
 275                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 276                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 277                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 278                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 279                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 280                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 281                         clocks = <&cpg CPG_MOD 407>;
 282                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 283                         resets = <&cpg 407>;
 284                 };
 285
 286                 i2c0: i2c@e6500000 {
 287                         #address-cells = <1>;
 288                         #size-cells = <0>;
 289                         compatible = "renesas,i2c-r8a774c0",
 290                                      "renesas,rcar-gen3-i2c";
 291                         reg = <0 0xe6500000 0 0x40>;
 292                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 293                         clocks = <&cpg CPG_MOD 931>;
 294                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 295                         resets = <&cpg 931>;
 296                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 297                                <&dmac2 0x91>, <&dmac2 0x90>;
 298                         dma-names = "tx", "rx", "tx", "rx";
 299                         i2c-scl-internal-delay-ns = <110>;
 300                         status = "disabled";
 301                 };
 302
 303                 i2c1: i2c@e6508000 {
 304                         #address-cells = <1>;
 305                         #size-cells = <0>;
 306                         compatible = "renesas,i2c-r8a774c0",
 307                                      "renesas,rcar-gen3-i2c";
 308                         reg = <0 0xe6508000 0 0x40>;
 309                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 310                         clocks = <&cpg CPG_MOD 930>;
 311                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 312                         resets = <&cpg 930>;
 313                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 314                                <&dmac2 0x93>, <&dmac2 0x92>;
 315                         dma-names = "tx", "rx", "tx", "rx";
 316                         i2c-scl-internal-delay-ns = <6>;
 317                         status = "disabled";
 318                 };
 319
 320                 i2c2: i2c@e6510000 {
 321                         #address-cells = <1>;
 322                         #size-cells = <0>;
 323                         compatible = "renesas,i2c-r8a774c0",
 324                                      "renesas,rcar-gen3-i2c";
 325                         reg = <0 0xe6510000 0 0x40>;
 326                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 327                         clocks = <&cpg CPG_MOD 929>;
 328                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 329                         resets = <&cpg 929>;
 330                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 331                                <&dmac2 0x95>, <&dmac2 0x94>;
 332                         dma-names = "tx", "rx", "tx", "rx";
 333                         i2c-scl-internal-delay-ns = <6>;
 334                         status = "disabled";
 335                 };
 336
 337                 i2c3: i2c@e66d0000 {
 338                         #address-cells = <1>;
 339                         #size-cells = <0>;
 340                         compatible = "renesas,i2c-r8a774c0",
 341                                      "renesas,rcar-gen3-i2c";
 342                         reg = <0 0xe66d0000 0 0x40>;
 343                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 344                         clocks = <&cpg CPG_MOD 928>;
 345                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 346                         resets = <&cpg 928>;
 347                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 348                         dma-names = "tx", "rx";
 349                         i2c-scl-internal-delay-ns = <110>;
 350                         status = "disabled";
 351                 };
 352
 353                 i2c4: i2c@e66d8000 {
 354                         #address-cells = <1>;
 355                         #size-cells = <0>;
 356                         compatible = "renesas,i2c-r8a774c0",
 357                                      "renesas,rcar-gen3-i2c";
 358                         reg = <0 0xe66d8000 0 0x40>;
 359                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 360                         clocks = <&cpg CPG_MOD 927>;
 361                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 362                         resets = <&cpg 927>;
 363                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 364                         dma-names = "tx", "rx";
 365                         i2c-scl-internal-delay-ns = <6>;
 366                         status = "disabled";
 367                 };
 368
 369                 i2c5: i2c@e66e0000 {
 370                         #address-cells = <1>;
 371                         #size-cells = <0>;
 372                         compatible = "renesas,i2c-r8a774c0",
 373                                      "renesas,rcar-gen3-i2c";
 374                         reg = <0 0xe66e0000 0 0x40>;
 375                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 376                         clocks = <&cpg CPG_MOD 919>;
 377                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 378                         resets = <&cpg 919>;
 379                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 380                         dma-names = "tx", "rx";
 381                         i2c-scl-internal-delay-ns = <6>;
 382                         status = "disabled";
 383                 };
 384
 385                 i2c6: i2c@e66e8000 {
 386                         #address-cells = <1>;
 387                         #size-cells = <0>;
 388                         compatible = "renesas,i2c-r8a774c0",
 389                                      "renesas,rcar-gen3-i2c";
 390                         reg = <0 0xe66e8000 0 0x40>;
 391                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 392                         clocks = <&cpg CPG_MOD 918>;
 393                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 394                         resets = <&cpg 918>;
 395                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 396                         dma-names = "tx", "rx";
 397                         i2c-scl-internal-delay-ns = <6>;
 398                         status = "disabled";
 399                 };
 400
 401                 i2c7: i2c@e6690000 {
 402                         #address-cells = <1>;
 403                         #size-cells = <0>;
 404                         compatible = "renesas,i2c-r8a774c0",
 405                                      "renesas,rcar-gen3-i2c";
 406                         reg = <0 0xe6690000 0 0x40>;
 407                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 408                         clocks = <&cpg CPG_MOD 1003>;
 409                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 410                         resets = <&cpg 1003>;
 411                         i2c-scl-internal-delay-ns = <6>;
 412                         status = "disabled";
 413                 };
 414
 415                 i2c_dvfs: i2c@e60b0000 {
 416                         #address-cells = <1>;
 417                         #size-cells = <0>;
 418                         compatible = "renesas,iic-r8a774c0";
 419                         reg = <0 0xe60b0000 0 0x15>;
 420                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 421                         clocks = <&cpg CPG_MOD 926>;
 422                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 423                         resets = <&cpg 926>;
 424                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 425                         dma-names = "tx", "rx";
 426                         status = "disabled";
 427                 };
 428
 429                 hscif0: serial@e6540000 {
 430                         compatible = "renesas,hscif-r8a774c0",
 431                                      "renesas,rcar-gen3-hscif",
 432                                      "renesas,hscif";
 433                         reg = <0 0xe6540000 0 0x60>;
 434                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 435                         clocks = <&cpg CPG_MOD 520>,
 436                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 437                                  <&scif_clk>;
 438                         clock-names = "fck", "brg_int", "scif_clk";
 439                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 440                                <&dmac2 0x31>, <&dmac2 0x30>;
 441                         dma-names = "tx", "rx", "tx", "rx";
 442                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 443                         resets = <&cpg 520>;
 444                         status = "disabled";
 445                 };
 446
 447                 hscif1: serial@e6550000 {
 448                         compatible = "renesas,hscif-r8a774c0",
 449                                      "renesas,rcar-gen3-hscif",
 450                                      "renesas,hscif";
 451                         reg = <0 0xe6550000 0 0x60>;
 452                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 519>,
 454                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 455                                  <&scif_clk>;
 456                         clock-names = "fck", "brg_int", "scif_clk";
 457                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 458                                <&dmac2 0x33>, <&dmac2 0x32>;
 459                         dma-names = "tx", "rx", "tx", "rx";
 460                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 461                         resets = <&cpg 519>;
 462                         status = "disabled";
 463                 };
 464
 465                 hscif2: serial@e6560000 {
 466                         compatible = "renesas,hscif-r8a774c0",
 467                                      "renesas,rcar-gen3-hscif",
 468                                      "renesas,hscif";
 469                         reg = <0 0xe6560000 0 0x60>;
 470                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 471                         clocks = <&cpg CPG_MOD 518>,
 472                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 473                                  <&scif_clk>;
 474                         clock-names = "fck", "brg_int", "scif_clk";
 475                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 476                                <&dmac2 0x35>, <&dmac2 0x34>;
 477                         dma-names = "tx", "rx", "tx", "rx";
 478                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 479                         resets = <&cpg 518>;
 480                         status = "disabled";
 481                 };
 482
 483                 hscif3: serial@e66a0000 {
 484                         compatible = "renesas,hscif-r8a774c0",
 485                                      "renesas,rcar-gen3-hscif",
 486                                      "renesas,hscif";
 487                         reg = <0 0xe66a0000 0 0x60>;
 488                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 489                         clocks = <&cpg CPG_MOD 517>,
 490                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 491                                  <&scif_clk>;
 492                         clock-names = "fck", "brg_int", "scif_clk";
 493                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 494                         dma-names = "tx", "rx";
 495                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 496                         resets = <&cpg 517>;
 497                         status = "disabled";
 498                 };
 499
 500                 hscif4: serial@e66b0000 {
 501                         compatible = "renesas,hscif-r8a774c0",
 502                                      "renesas,rcar-gen3-hscif",
 503                                      "renesas,hscif";
 504                         reg = <0 0xe66b0000 0 0x60>;
 505                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 506                         clocks = <&cpg CPG_MOD 516>,
 507                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 508                                  <&scif_clk>;
 509                         clock-names = "fck", "brg_int", "scif_clk";
 510                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 511                         dma-names = "tx", "rx";
 512                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 513                         resets = <&cpg 516>;
 514                         status = "disabled";
 515                 };
 516
 517                 hsusb: usb@e6590000 {
 518                         compatible = "renesas,usbhs-r8a774c0",
 519                                      "renesas,rcar-gen3-usbhs";
 520                         reg = <0 0xe6590000 0 0x200>;
 521                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 522                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 523                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 524                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 525                         dma-names = "ch0", "ch1", "ch2", "ch3";
 526                         renesas,buswait = <11>;
 527                         phys = <&usb2_phy0>;
 528                         phy-names = "usb";
 529                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 530                         resets = <&cpg 704>, <&cpg 703>;
 531                         status = "disabled";
 532                 };
 533
 534                 usb_dmac0: dma-controller@e65a0000 {
 535                         compatible = "renesas,r8a774c0-usb-dmac",
 536                                      "renesas,usb-dmac";
 537                         reg = <0 0xe65a0000 0 0x100>;
 538                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 539                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 540                         interrupt-names = "ch0", "ch1";
 541                         clocks = <&cpg CPG_MOD 330>;
 542                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 543                         resets = <&cpg 330>;
 544                         #dma-cells = <1>;
 545                         dma-channels = <2>;
 546                 };
 547
 548                 usb_dmac1: dma-controller@e65b0000 {
 549                         compatible = "renesas,r8a774c0-usb-dmac",
 550                                      "renesas,usb-dmac";
 551                         reg = <0 0xe65b0000 0 0x100>;
 552                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 553                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 554                         interrupt-names = "ch0", "ch1";
 555                         clocks = <&cpg CPG_MOD 331>;
 556                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 557                         resets = <&cpg 331>;
 558                         #dma-cells = <1>;
 559                         dma-channels = <2>;
 560                 };
 561
 562                 dmac0: dma-controller@e6700000 {
 563                         compatible = "renesas,dmac-r8a774c0",
 564                                      "renesas,rcar-dmac";
 565                         reg = <0 0xe6700000 0 0x10000>;
 566                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 567                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 570                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 571                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 572                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 573                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 574                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 575                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 576                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 577                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 578                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 579                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 580                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 581                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 582                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 583                         interrupt-names = "error",
 584                                         "ch0", "ch1", "ch2", "ch3",
 585                                         "ch4", "ch5", "ch6", "ch7",
 586                                         "ch8", "ch9", "ch10", "ch11",
 587                                         "ch12", "ch13", "ch14", "ch15";
 588                         clocks = <&cpg CPG_MOD 219>;
 589                         clock-names = "fck";
 590                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 591                         resets = <&cpg 219>;
 592                         #dma-cells = <1>;
 593                         dma-channels = <16>;
 594                 };
 595
 596                 dmac1: dma-controller@e7300000 {
 597                         compatible = "renesas,dmac-r8a774c0",
 598                                      "renesas,rcar-dmac";
 599                         reg = <0 0xe7300000 0 0x10000>;
 600                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 601                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 602                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 603                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 604                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 605                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 606                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 607                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 608                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 609                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 610                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 611                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 612                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 613                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 614                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 615                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 616                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 617                         interrupt-names = "error",
 618                                         "ch0", "ch1", "ch2", "ch3",
 619                                         "ch4", "ch5", "ch6", "ch7",
 620                                         "ch8", "ch9", "ch10", "ch11",
 621                                         "ch12", "ch13", "ch14", "ch15";
 622                         clocks = <&cpg CPG_MOD 218>;
 623                         clock-names = "fck";
 624                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 625                         resets = <&cpg 218>;
 626                         #dma-cells = <1>;
 627                         dma-channels = <16>;
 628                 };
 629
 630                 dmac2: dma-controller@e7310000 {
 631                         compatible = "renesas,dmac-r8a774c0",
 632                                      "renesas,rcar-dmac";
 633                         reg = <0 0xe7310000 0 0x10000>;
 634                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 635                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 636                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 637                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 638                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 639                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 640                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 641                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 642                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 643                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 644                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 645                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 646                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 647                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 648                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 649                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 650                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 651                         interrupt-names = "error",
 652                                         "ch0", "ch1", "ch2", "ch3",
 653                                         "ch4", "ch5", "ch6", "ch7",
 654                                         "ch8", "ch9", "ch10", "ch11",
 655                                         "ch12", "ch13", "ch14", "ch15";
 656                         clocks = <&cpg CPG_MOD 217>;
 657                         clock-names = "fck";
 658                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 659                         resets = <&cpg 217>;
 660                         #dma-cells = <1>;
 661                         dma-channels = <16>;
 662                 };
 663
 664                 ipmmu_ds0: mmu@e6740000 {
 665                         compatible = "renesas,ipmmu-r8a774c0";
 666                         reg = <0 0xe6740000 0 0x1000>;
 667                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 668                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 669                         #iommu-cells = <1>;
 670                 };
 671
 672                 ipmmu_ds1: mmu@e7740000 {
 673                         compatible = "renesas,ipmmu-r8a774c0";
 674                         reg = <0 0xe7740000 0 0x1000>;
 675                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 676                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 677                         #iommu-cells = <1>;
 678                 };
 679
 680                 ipmmu_hc: mmu@e6570000 {
 681                         compatible = "renesas,ipmmu-r8a774c0";
 682                         reg = <0 0xe6570000 0 0x1000>;
 683                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 684                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 685                         #iommu-cells = <1>;
 686                 };
 687
 688                 ipmmu_mm: mmu@e67b0000 {
 689                         compatible = "renesas,ipmmu-r8a774c0";
 690                         reg = <0 0xe67b0000 0 0x1000>;
 691                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 692                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 693                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 694                         #iommu-cells = <1>;
 695                 };
 696
 697                 ipmmu_mp: mmu@ec670000 {
 698                         compatible = "renesas,ipmmu-r8a774c0";
 699                         reg = <0 0xec670000 0 0x1000>;
 700                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 701                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 702                         #iommu-cells = <1>;
 703                 };
 704
 705                 ipmmu_pv0: mmu@fd800000 {
 706                         compatible = "renesas,ipmmu-r8a774c0";
 707                         reg = <0 0xfd800000 0 0x1000>;
 708                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 709                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 710                         #iommu-cells = <1>;
 711                 };
 712
 713                 ipmmu_vc0: mmu@fe6b0000 {
 714                         compatible = "renesas,ipmmu-r8a774c0";
 715                         reg = <0 0xfe6b0000 0 0x1000>;
 716                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 717                         power-domains = <&sysc R8A774C0_PD_A3VC>;
 718                         #iommu-cells = <1>;
 719                 };
 720
 721                 ipmmu_vi0: mmu@febd0000 {
 722                         compatible = "renesas,ipmmu-r8a774c0";
 723                         reg = <0 0xfebd0000 0 0x1000>;
 724                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 725                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 726                         #iommu-cells = <1>;
 727                 };
 728
 729                 ipmmu_vp0: mmu@fe990000 {
 730                         compatible = "renesas,ipmmu-r8a774c0";
 731                         reg = <0 0xfe990000 0 0x1000>;
 732                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 733                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 734                         #iommu-cells = <1>;
 735                 };
 736
 737                 avb: ethernet@e6800000 {
 738                         compatible = "renesas,etheravb-r8a774c0",
 739                                      "renesas,etheravb-rcar-gen3";
 740                         reg = <0 0xe6800000 0 0x800>;
 741                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 742                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 743                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 744                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 745                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 746                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 747                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 748                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 749                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 750                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 751                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 752                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 753                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 754                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 755                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 756                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 757                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 758                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 759                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 760                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 761                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 762                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 763                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 764                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 765                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 766                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 767                                           "ch4", "ch5", "ch6", "ch7",
 768                                           "ch8", "ch9", "ch10", "ch11",
 769                                           "ch12", "ch13", "ch14", "ch15",
 770                                           "ch16", "ch17", "ch18", "ch19",
 771                                           "ch20", "ch21", "ch22", "ch23",
 772                                           "ch24";
 773                         clocks = <&cpg CPG_MOD 812>;
 774                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 775                         resets = <&cpg 812>;
 776                         phy-mode = "rgmii";
 777                         #address-cells = <1>;
 778                         #size-cells = <0>;
 779                         status = "disabled";
 780                 };
 781
 782                 can0: can@e6c30000 {
 783                         compatible = "renesas,can-r8a774c0",
 784                                      "renesas,rcar-gen3-can";
 785                         reg = <0 0xe6c30000 0 0x1000>;
 786                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 787                         clocks = <&cpg CPG_MOD 916>, <&can_clk>;
 788                         clock-names = "clkp1", "can_clk";
 789                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 790                         resets = <&cpg 916>;
 791                         status = "disabled";
 792                 };
 793
 794                 can1: can@e6c38000 {
 795                         compatible = "renesas,can-r8a774c0",
 796                                      "renesas,rcar-gen3-can";
 797                         reg = <0 0xe6c38000 0 0x1000>;
 798                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 799                         clocks = <&cpg CPG_MOD 915>, <&can_clk>;
 800                         clock-names = "clkp1", "can_clk";
 801                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 802                         resets = <&cpg 915>;
 803                         status = "disabled";
 804                 };
 805
 806                 pwm0: pwm@e6e30000 {
 807                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 808                         reg = <0 0xe6e30000 0 0x8>;
 809                         clocks = <&cpg CPG_MOD 523>;
 810                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 811                         resets = <&cpg 523>;
 812                         #pwm-cells = <2>;
 813                         status = "disabled";
 814                 };
 815
 816                 pwm1: pwm@e6e31000 {
 817                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 818                         reg = <0 0xe6e31000 0 0x8>;
 819                         clocks = <&cpg CPG_MOD 523>;
 820                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 821                         resets = <&cpg 523>;
 822                         #pwm-cells = <2>;
 823                         status = "disabled";
 824                 };
 825
 826                 pwm2: pwm@e6e32000 {
 827                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 828                         reg = <0 0xe6e32000 0 0x8>;
 829                         clocks = <&cpg CPG_MOD 523>;
 830                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 831                         resets = <&cpg 523>;
 832                         #pwm-cells = <2>;
 833                         status = "disabled";
 834                 };
 835
 836                 pwm3: pwm@e6e33000 {
 837                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 838                         reg = <0 0xe6e33000 0 0x8>;
 839                         clocks = <&cpg CPG_MOD 523>;
 840                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 841                         resets = <&cpg 523>;
 842                         #pwm-cells = <2>;
 843                         status = "disabled";
 844                 };
 845
 846                 pwm4: pwm@e6e34000 {
 847                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 848                         reg = <0 0xe6e34000 0 0x8>;
 849                         clocks = <&cpg CPG_MOD 523>;
 850                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 851                         resets = <&cpg 523>;
 852                         #pwm-cells = <2>;
 853                         status = "disabled";
 854                 };
 855
 856                 pwm5: pwm@e6e35000 {
 857                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 858                         reg = <0 0xe6e35000 0 0x8>;
 859                         clocks = <&cpg CPG_MOD 523>;
 860                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 861                         resets = <&cpg 523>;
 862                         #pwm-cells = <2>;
 863                         status = "disabled";
 864                 };
 865
 866                 pwm6: pwm@e6e36000 {
 867                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 868                         reg = <0 0xe6e36000 0 0x8>;
 869                         clocks = <&cpg CPG_MOD 523>;
 870                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 871                         resets = <&cpg 523>;
 872                         #pwm-cells = <2>;
 873                         status = "disabled";
 874                 };
 875
 876                 scif0: serial@e6e60000 {
 877                         compatible = "renesas,scif-r8a774c0",
 878                                      "renesas,rcar-gen3-scif", "renesas,scif";
 879                         reg = <0 0xe6e60000 0 64>;
 880                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 881                         clocks = <&cpg CPG_MOD 207>,
 882                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 883                                  <&scif_clk>;
 884                         clock-names = "fck", "brg_int", "scif_clk";
 885                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 886                                <&dmac2 0x51>, <&dmac2 0x50>;
 887                         dma-names = "tx", "rx", "tx", "rx";
 888                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 889                         resets = <&cpg 207>;
 890                         status = "disabled";
 891                 };
 892
 893                 scif1: serial@e6e68000 {
 894                         compatible = "renesas,scif-r8a774c0",
 895                                      "renesas,rcar-gen3-scif", "renesas,scif";
 896                         reg = <0 0xe6e68000 0 64>;
 897                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 898                         clocks = <&cpg CPG_MOD 206>,
 899                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 900                                  <&scif_clk>;
 901                         clock-names = "fck", "brg_int", "scif_clk";
 902                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 903                                <&dmac2 0x53>, <&dmac2 0x52>;
 904                         dma-names = "tx", "rx", "tx", "rx";
 905                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 906                         resets = <&cpg 206>;
 907                         status = "disabled";
 908                 };
 909
 910                 scif2: serial@e6e88000 {
 911                         compatible = "renesas,scif-r8a774c0",
 912                                      "renesas,rcar-gen3-scif", "renesas,scif";
 913                         reg = <0 0xe6e88000 0 64>;
 914                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 915                         clocks = <&cpg CPG_MOD 310>,
 916                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 917                                  <&scif_clk>;
 918                         clock-names = "fck", "brg_int", "scif_clk";
 919                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 920                         resets = <&cpg 310>;
 921                         status = "disabled";
 922                 };
 923
 924                 scif3: serial@e6c50000 {
 925                         compatible = "renesas,scif-r8a774c0",
 926                                      "renesas,rcar-gen3-scif", "renesas,scif";
 927                         reg = <0 0xe6c50000 0 64>;
 928                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 929                         clocks = <&cpg CPG_MOD 204>,
 930                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 931                                  <&scif_clk>;
 932                         clock-names = "fck", "brg_int", "scif_clk";
 933                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 934                         dma-names = "tx", "rx";
 935                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 936                         resets = <&cpg 204>;
 937                         status = "disabled";
 938                 };
 939
 940                 scif4: serial@e6c40000 {
 941                         compatible = "renesas,scif-r8a774c0",
 942                                      "renesas,rcar-gen3-scif", "renesas,scif";
 943                         reg = <0 0xe6c40000 0 64>;
 944                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 945                         clocks = <&cpg CPG_MOD 203>,
 946                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 947                                  <&scif_clk>;
 948                         clock-names = "fck", "brg_int", "scif_clk";
 949                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 950                         dma-names = "tx", "rx";
 951                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 952                         resets = <&cpg 203>;
 953                         status = "disabled";
 954                 };
 955
 956                 scif5: serial@e6f30000 {
 957                         compatible = "renesas,scif-r8a774c0",
 958                                      "renesas,rcar-gen3-scif", "renesas,scif";
 959                         reg = <0 0xe6f30000 0 64>;
 960                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 961                         clocks = <&cpg CPG_MOD 202>,
 962                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 963                                  <&scif_clk>;
 964                         clock-names = "fck", "brg_int", "scif_clk";
 965                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
 966                                <&dmac2 0x5b>, <&dmac2 0x5a>;
 967                         dma-names = "tx", "rx", "tx", "rx";
 968                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 969                         resets = <&cpg 202>;
 970                         status = "disabled";
 971                 };
 972
 973                 msiof0: spi@e6e90000 {
 974                         compatible = "renesas,msiof-r8a774c0",
 975                                      "renesas,rcar-gen3-msiof";
 976                         reg = <0 0xe6e90000 0 0x0064>;
 977                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 978                         clocks = <&cpg CPG_MOD 211>;
 979                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
 980                                <&dmac2 0x41>, <&dmac2 0x40>;
 981                         dma-names = "tx", "rx", "tx", "rx";
 982                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 983                         resets = <&cpg 211>;
 984                         #address-cells = <1>;
 985                         #size-cells = <0>;
 986                         status = "disabled";
 987                 };
 988
 989                 msiof1: spi@e6ea0000 {
 990                         compatible = "renesas,msiof-r8a774c0",
 991                                      "renesas,rcar-gen3-msiof";
 992                         reg = <0 0xe6ea0000 0 0x0064>;
 993                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
 994                         clocks = <&cpg CPG_MOD 210>;
 995                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
 996                                <&dmac2 0x43>, <&dmac2 0x42>;
 997                         dma-names = "tx", "rx", "tx", "rx";
 998                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 999                         resets = <&cpg 210>;
1000                         #address-cells = <1>;
1001                         #size-cells = <0>;
1002                         status = "disabled";
1003                 };
1004
1005                 msiof2: spi@e6c00000 {
1006                         compatible = "renesas,msiof-r8a774c0",
1007                                      "renesas,rcar-gen3-msiof";
1008                         reg = <0 0xe6c00000 0 0x0064>;
1009                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1010                         clocks = <&cpg CPG_MOD 209>;
1011                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1012                         dma-names = "tx", "rx";
1013                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1014                         resets = <&cpg 209>;
1015                         #address-cells = <1>;
1016                         #size-cells = <0>;
1017                         status = "disabled";
1018                 };
1019
1020                 msiof3: spi@e6c10000 {
1021                         compatible = "renesas,msiof-r8a774c0",
1022                                      "renesas,rcar-gen3-msiof";
1023                         reg = <0 0xe6c10000 0 0x0064>;
1024                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1025                         clocks = <&cpg CPG_MOD 208>;
1026                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1027                         dma-names = "tx", "rx";
1028                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1029                         resets = <&cpg 208>;
1030                         #address-cells = <1>;
1031                         #size-cells = <0>;
1032                         status = "disabled";
1033                 };
1034
1035                 rcar_sound: sound@ec500000 {
1036                         /*
1037                          * #sound-dai-cells is required
1038                          *
1039                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1040                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1041                          */
1042                         /*
1043                          * #clock-cells is required for audio_clkout0/1/2/3
1044                          *
1045                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1046                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1047                          */
1048                         compatible = "renesas,rcar_sound-r8a774c0",
1049                                      "renesas,rcar_sound-gen3";
1050                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1051                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1052                                 <0 0xec540000 0 0x1000>, /* SSIU */
1053                                 <0 0xec541000 0 0x280>,  /* SSI */
1054                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1055                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1056
1057                         clocks = <&cpg CPG_MOD 1005>,
1058                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1059                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1060                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1061                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1062                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1063                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1064                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1065                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1066                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1067                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1068                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1069                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1070                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1071                                  <&audio_clk_a>, <&audio_clk_b>,
1072                                  <&audio_clk_c>,
1073                                  <&cpg CPG_CORE R8A774C0_CLK_ZA2>;
1074                         clock-names = "ssi-all",
1075                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1076                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1077                                       "ssi.1", "ssi.0",
1078                                       "src.9", "src.8", "src.7", "src.6",
1079                                       "src.5", "src.4", "src.3", "src.2",
1080                                       "src.1", "src.0",
1081                                       "mix.1", "mix.0",
1082                                       "ctu.1", "ctu.0",
1083                                       "dvc.0", "dvc.1",
1084                                       "clk_a", "clk_b", "clk_c", "clk_i";
1085                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1086                         resets = <&cpg 1005>,
1087                                  <&cpg 1006>, <&cpg 1007>,
1088                                  <&cpg 1008>, <&cpg 1009>,
1089                                  <&cpg 1010>, <&cpg 1011>,
1090                                  <&cpg 1012>, <&cpg 1013>,
1091                                  <&cpg 1014>, <&cpg 1015>;
1092                         reset-names = "ssi-all",
1093                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1094                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1095                                       "ssi.1", "ssi.0";
1096                         status = "disabled";
1097
1098                         rcar_sound,dvc {
1099                                 dvc0: dvc-0 {
1100                                         dmas = <&audma0 0xbc>;
1101                                         dma-names = "tx";
1102                                 };
1103                                 dvc1: dvc-1 {
1104                                         dmas = <&audma0 0xbe>;
1105                                         dma-names = "tx";
1106                                 };
1107                         };
1108
1109                         rcar_sound,mix {
1110                                 mix0: mix-0 { };
1111                                 mix1: mix-1 { };
1112                         };
1113
1114                         rcar_sound,ctu {
1115                                 ctu00: ctu-0 { };
1116                                 ctu01: ctu-1 { };
1117                                 ctu02: ctu-2 { };
1118                                 ctu03: ctu-3 { };
1119                                 ctu10: ctu-4 { };
1120                                 ctu11: ctu-5 { };
1121                                 ctu12: ctu-6 { };
1122                                 ctu13: ctu-7 { };
1123                         };
1124
1125                         rcar_sound,src {
1126                                 src0: src-0 {
1127                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1128                                         dmas = <&audma0 0x85>, <&audma0 0x9a>;
1129                                         dma-names = "rx", "tx";
1130                                 };
1131                                 src1: src-1 {
1132                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1133                                         dmas = <&audma0 0x87>, <&audma0 0x9c>;
1134                                         dma-names = "rx", "tx";
1135                                 };
1136                                 src2: src-2 {
1137                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1138                                         dmas = <&audma0 0x89>, <&audma0 0x9e>;
1139                                         dma-names = "rx", "tx";
1140                                 };
1141                                 src3: src-3 {
1142                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1143                                         dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1144                                         dma-names = "rx", "tx";
1145                                 };
1146                                 src4: src-4 {
1147                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1148                                         dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1149                                         dma-names = "rx", "tx";
1150                                 };
1151                                 src5: src-5 {
1152                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1153                                         dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1154                                         dma-names = "rx", "tx";
1155                                 };
1156                                 src6: src-6 {
1157                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1158                                         dmas = <&audma0 0x91>, <&audma0 0xb4>;
1159                                         dma-names = "rx", "tx";
1160                                 };
1161                                 src7: src-7 {
1162                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1163                                         dmas = <&audma0 0x93>, <&audma0 0xb6>;
1164                                         dma-names = "rx", "tx";
1165                                 };
1166                                 src8: src-8 {
1167                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1168                                         dmas = <&audma0 0x95>, <&audma0 0xb8>;
1169                                         dma-names = "rx", "tx";
1170                                 };
1171                                 src9: src-9 {
1172                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1173                                         dmas = <&audma0 0x97>, <&audma0 0xba>;
1174                                         dma-names = "rx", "tx";
1175                                 };
1176                         };
1177
1178                         rcar_sound,ssi {
1179                                 ssi0: ssi-0 {
1180                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1181                                         dmas = <&audma0 0x01>, <&audma0 0x02>,
1182                                                <&audma0 0x15>, <&audma0 0x16>;
1183                                         dma-names = "rx", "tx", "rxu", "txu";
1184                                 };
1185                                 ssi1: ssi-1 {
1186                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1187                                         dmas = <&audma0 0x03>, <&audma0 0x04>,
1188                                                <&audma0 0x49>, <&audma0 0x4a>;
1189                                         dma-names = "rx", "tx", "rxu", "txu";
1190                                 };
1191                                 ssi2: ssi-2 {
1192                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1193                                         dmas = <&audma0 0x05>, <&audma0 0x06>,
1194                                                <&audma0 0x63>, <&audma0 0x64>;
1195                                         dma-names = "rx", "tx", "rxu", "txu";
1196                                 };
1197                                 ssi3: ssi-3 {
1198                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1199                                         dmas = <&audma0 0x07>, <&audma0 0x08>,
1200                                                <&audma0 0x6f>, <&audma0 0x70>;
1201                                         dma-names = "rx", "tx", "rxu", "txu";
1202                                 };
1203                                 ssi4: ssi-4 {
1204                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1205                                         dmas = <&audma0 0x09>, <&audma0 0x0a>,
1206                                                <&audma0 0x71>, <&audma0 0x72>;
1207                                         dma-names = "rx", "tx", "rxu", "txu";
1208                                 };
1209                                 ssi5: ssi-5 {
1210                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1211                                         dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1212                                                <&audma0 0x73>, <&audma0 0x74>;
1213                                         dma-names = "rx", "tx", "rxu", "txu";
1214                                 };
1215                                 ssi6: ssi-6 {
1216                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1217                                         dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1218                                                <&audma0 0x75>, <&audma0 0x76>;
1219                                         dma-names = "rx", "tx", "rxu", "txu";
1220                                 };
1221                                 ssi7: ssi-7 {
1222                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1223                                         dmas = <&audma0 0x0f>, <&audma0 0x10>,
1224                                                <&audma0 0x79>, <&audma0 0x7a>;
1225                                         dma-names = "rx", "tx", "rxu", "txu";
1226                                 };
1227                                 ssi8: ssi-8 {
1228                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1229                                         dmas = <&audma0 0x11>, <&audma0 0x12>,
1230                                                <&audma0 0x7b>, <&audma0 0x7c>;
1231                                         dma-names = "rx", "tx", "rxu", "txu";
1232                                 };
1233                                 ssi9: ssi-9 {
1234                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1235                                         dmas = <&audma0 0x13>, <&audma0 0x14>,
1236                                                <&audma0 0x7d>, <&audma0 0x7e>;
1237                                         dma-names = "rx", "tx", "rxu", "txu";
1238                                 };
1239                         };
1240                 };
1241
1242                 audma0: dma-controller@ec700000 {
1243                         compatible = "renesas,dmac-r8a774c0",
1244                                      "renesas,rcar-dmac";
1245                         reg = <0 0xec700000 0 0x10000>;
1246                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1247                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1248                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1249                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1250                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1251                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1252                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1253                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1254                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1255                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1256                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1257                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1258                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1259                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1260                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1261                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1262                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1263                         interrupt-names = "error",
1264                                         "ch0", "ch1", "ch2", "ch3",
1265                                         "ch4", "ch5", "ch6", "ch7",
1266                                         "ch8", "ch9", "ch10", "ch11",
1267                                         "ch12", "ch13", "ch14", "ch15";
1268                         clocks = <&cpg CPG_MOD 502>;
1269                         clock-names = "fck";
1270                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1271                         resets = <&cpg 502>;
1272                         #dma-cells = <1>;
1273                         dma-channels = <16>;
1274                 };
1275
1276                 xhci0: usb@ee000000 {
1277                         compatible = "renesas,xhci-r8a774c0",
1278                                      "renesas,rcar-gen3-xhci";
1279                         reg = <0 0xee000000 0 0xc00>;
1280                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1281                         clocks = <&cpg CPG_MOD 328>;
1282                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1283                         resets = <&cpg 328>;
1284                         status = "disabled";
1285                 };
1286
1287                 usb3_peri0: usb@ee020000 {
1288                         compatible = "renesas,r8a774c0-usb3-peri",
1289                                      "renesas,rcar-gen3-usb3-peri";
1290                         reg = <0 0xee020000 0 0x400>;
1291                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1292                         clocks = <&cpg CPG_MOD 328>;
1293                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1294                         resets = <&cpg 328>;
1295                         status = "disabled";
1296                 };
1297
1298                 ohci0: usb@ee080000 {
1299                         compatible = "generic-ohci";
1300                         reg = <0 0xee080000 0 0x100>;
1301                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1302                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1303                         phys = <&usb2_phy0>;
1304                         phy-names = "usb";
1305                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1306                         resets = <&cpg 703>, <&cpg 704>;
1307                         status = "disabled";
1308                 };
1309
1310                 ehci0: usb@ee080100 {
1311                         compatible = "generic-ehci";
1312                         reg = <0 0xee080100 0 0x100>;
1313                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1314                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1315                         phys = <&usb2_phy0>;
1316                         phy-names = "usb";
1317                         companion = <&ohci0>;
1318                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1319                         resets = <&cpg 703>, <&cpg 704>;
1320                         status = "disabled";
1321                 };
1322
1323                 usb2_phy0: usb-phy@ee080200 {
1324                         compatible = "renesas,usb2-phy-r8a774c0",
1325                                      "renesas,rcar-gen3-usb2-phy";
1326                         reg = <0 0xee080200 0 0x700>;
1327                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1328                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1329                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1330                         resets = <&cpg 703>, <&cpg 704>;
1331                         #phy-cells = <0>;
1332                         status = "disabled";
1333                 };
1334
1335                 sdhi0: sd@ee100000 {
1336                         compatible = "renesas,sdhi-r8a774c0",
1337                                      "renesas,rcar-gen3-sdhi";
1338                         reg = <0 0xee100000 0 0x2000>;
1339                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1340                         clocks = <&cpg CPG_MOD 314>;
1341                         max-frequency = <200000000>;
1342                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1343                         resets = <&cpg 314>;
1344                         status = "disabled";
1345                 };
1346
1347                 sdhi1: sd@ee120000 {
1348                         compatible = "renesas,sdhi-r8a774c0",
1349                                      "renesas,rcar-gen3-sdhi";
1350                         reg = <0 0xee120000 0 0x2000>;
1351                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1352                         clocks = <&cpg CPG_MOD 313>;
1353                         max-frequency = <200000000>;
1354                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1355                         resets = <&cpg 313>;
1356                         status = "disabled";
1357                 };
1358
1359                 sdhi3: sd@ee160000 {
1360                         compatible = "renesas,sdhi-r8a774c0",
1361                                      "renesas,rcar-gen3-sdhi";
1362                         reg = <0 0xee160000 0 0x2000>;
1363                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1364                         clocks = <&cpg CPG_MOD 311>;
1365                         max-frequency = <200000000>;
1366                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1367                         resets = <&cpg 311>;
1368                         status = "disabled";
1369                 };
1370
1371                 gic: interrupt-controller@f1010000 {
1372                         compatible = "arm,gic-400";
1373                         #interrupt-cells = <3>;
1374                         #address-cells = <0>;
1375                         interrupt-controller;
1376                         reg = <0x0 0xf1010000 0 0x1000>,
1377                               <0x0 0xf1020000 0 0x20000>,
1378                               <0x0 0xf1040000 0 0x20000>,
1379                               <0x0 0xf1060000 0 0x20000>;
1380                         interrupts = <GIC_PPI 9
1381                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1382                         clocks = <&cpg CPG_MOD 408>;
1383                         clock-names = "clk";
1384                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1385                         resets = <&cpg 408>;
1386                 };
1387
1388                 vspb0: vsp@fe960000 {
1389                         compatible = "renesas,vsp2";
1390                         reg = <0 0xfe960000 0 0x8000>;
1391                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1392                         clocks = <&cpg CPG_MOD 626>;
1393                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1394                         resets = <&cpg 626>;
1395                         renesas,fcp = <&fcpvb0>;
1396                 };
1397
1398                 fcpvb0: fcp@fe96f000 {
1399                         compatible = "renesas,fcpv";
1400                         reg = <0 0xfe96f000 0 0x200>;
1401                         clocks = <&cpg CPG_MOD 607>;
1402                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1403                         resets = <&cpg 607>;
1404                         iommus = <&ipmmu_vp0 5>;
1405                 };
1406
1407                 vspi0: vsp@fe9a0000 {
1408                         compatible = "renesas,vsp2";
1409                         reg = <0 0xfe9a0000 0 0x8000>;
1410                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1411                         clocks = <&cpg CPG_MOD 631>;
1412                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1413                         resets = <&cpg 631>;
1414                         renesas,fcp = <&fcpvi0>;
1415                 };
1416
1417                 fcpvi0: fcp@fe9af000 {
1418                         compatible = "renesas,fcpv";
1419                         reg = <0 0xfe9af000 0 0x200>;
1420                         clocks = <&cpg CPG_MOD 611>;
1421                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1422                         resets = <&cpg 611>;
1423                         iommus = <&ipmmu_vp0 8>;
1424                 };
1425
1426                 vspd0: vsp@fea20000 {
1427                         compatible = "renesas,vsp2";
1428                         reg = <0 0xfea20000 0 0x7000>;
1429                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1430                         clocks = <&cpg CPG_MOD 623>;
1431                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1432                         resets = <&cpg 623>;
1433                         renesas,fcp = <&fcpvd0>;
1434                 };
1435
1436                 fcpvd0: fcp@fea27000 {
1437                         compatible = "renesas,fcpv";
1438                         reg = <0 0xfea27000 0 0x200>;
1439                         clocks = <&cpg CPG_MOD 603>;
1440                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1441                         resets = <&cpg 603>;
1442                         iommus = <&ipmmu_vi0 8>;
1443                 };
1444
1445                 vspd1: vsp@fea28000 {
1446                         compatible = "renesas,vsp2";
1447                         reg = <0 0xfea28000 0 0x7000>;
1448                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1449                         clocks = <&cpg CPG_MOD 622>;
1450                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1451                         resets = <&cpg 622>;
1452                         renesas,fcp = <&fcpvd1>;
1453                 };
1454
1455                 fcpvd1: fcp@fea2f000 {
1456                         compatible = "renesas,fcpv";
1457                         reg = <0 0xfea2f000 0 0x200>;
1458                         clocks = <&cpg CPG_MOD 602>;
1459                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1460                         resets = <&cpg 602>;
1461                         iommus = <&ipmmu_vi0 9>;
1462                 };
1463
1464                 du: display@feb00000 {
1465                         compatible = "renesas,du-r8a774c0";
1466                         reg = <0 0xfeb00000 0 0x80000>;
1467                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1468                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1469                         clocks = <&cpg CPG_MOD 724>,
1470                                  <&cpg CPG_MOD 723>;
1471                         clock-names = "du.0", "du.1";
1472                         vsps = <&vspd0 0 &vspd1 0>;
1473                         status = "disabled";
1474
1475                         ports {
1476                                 #address-cells = <1>;
1477                                 #size-cells = <0>;
1478
1479                                 port@0 {
1480                                         reg = <0>;
1481                                         du_out_rgb: endpoint {
1482                                         };
1483                                 };
1484
1485                                 port@1 {
1486                                         reg = <1>;
1487                                         du_out_lvds0: endpoint {
1488                                                 remote-endpoint = <&lvds0_in>;
1489                                         };
1490                                 };
1491
1492                                 port@2 {
1493                                         reg = <2>;
1494                                         du_out_lvds1: endpoint {
1495                                                 remote-endpoint = <&lvds1_in>;
1496                                         };
1497                                 };
1498                         };
1499                 };
1500
1501                 lvds0: lvds-encoder@feb90000 {
1502                         compatible = "renesas,r8a774c0-lvds";
1503                         reg = <0 0xfeb90000 0 0x20>;
1504                         clocks = <&cpg CPG_MOD 727>;
1505                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1506                         resets = <&cpg 727>;
1507                         status = "disabled";
1508
1509                         ports {
1510                                 #address-cells = <1>;
1511                                 #size-cells = <0>;
1512
1513                                 port@0 {
1514                                         reg = <0>;
1515                                         lvds0_in: endpoint {
1516                                                 remote-endpoint = <&du_out_lvds0>;
1517                                         };
1518                                 };
1519
1520                                 port@1 {
1521                                         reg = <1>;
1522                                         lvds0_out: endpoint {
1523                                         };
1524                                 };
1525                         };
1526                 };
1527
1528                 lvds1: lvds-encoder@feb90100 {
1529                         compatible = "renesas,r8a774c0-lvds";
1530                         reg = <0 0xfeb90100 0 0x20>;
1531                         clocks = <&cpg CPG_MOD 727>;
1532                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1533                         resets = <&cpg 726>;
1534                         status = "disabled";
1535
1536                         ports {
1537                                 #address-cells = <1>;
1538                                 #size-cells = <0>;
1539
1540                                 port@0 {
1541                                         reg = <0>;
1542                                         lvds1_in: endpoint {
1543                                                 remote-endpoint = <&du_out_lvds1>;
1544                                         };
1545                                 };
1546
1547                                 port@1 {
1548                                         reg = <1>;
1549                                         lvds1_out: endpoint {
1550                                         };
1551                                 };
1552                         };
1553                 };
1554
1555                 prr: chipid@fff00044 {
1556                         compatible = "renesas,prr";
1557                         reg = <0 0xfff00044 0 4>;
1558                 };
1559         };
1560
1561         thermal-zones {
1562                 cpu-thermal {
1563                         polling-delay-passive = <250>;
1564                         polling-delay = <1000>;
1565                         thermal-sensors = <&thermal>;
1566
1567                         trips {
1568                                 cpu-crit {
1569                                         temperature = <120000>;
1570                                         hysteresis = <2000>;
1571                                         type = "critical";
1572                                 };
1573                         };
1574
1575                         cooling-maps {
1576                         };
1577                 };
1578         };
1579
1580         timer {
1581                 compatible = "arm,armv8-timer";
1582                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1583                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1584                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1585                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1586         };
1587
1588         /* External USB clocks - can be overridden by the board */
1589         usb3s0_clk: usb3s0 {
1590                 compatible = "fixed-clock";
1591                 #clock-cells = <0>;
1592                 clock-frequency = <0>;
1593         };
1594
1595         usb_extal_clk: usb_extal {
1596                 compatible = "fixed-clock";
1597                 #clock-cells = <0>;
1598                 clock-frequency = <0>;
1599         };
1600 };