arch/arm64/boot/dts/renesas/r8a774c0.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the RZ/G2E (R8A774C0) SoC
   4  *
   5  * Copyright (C) 2018 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a774c0-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a774c0";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         /*
  18          * The external audio clocks are configured as 0 Hz fixed frequency
  19          * clocks by default.
  20          * Boards that provide audio clocks should override them.
  21          */
  22         audio_clk_a: audio_clk_a {
  23                 compatible = "fixed-clock";
  24                 #clock-cells = <0>;
  25                 clock-frequency = <0>;
  26         };
  27
  28         audio_clk_b: audio_clk_b {
  29                 compatible = "fixed-clock";
  30                 #clock-cells = <0>;
  31                 clock-frequency = <0>;
  32         };
  33
  34         audio_clk_c: audio_clk_c {
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <0>;
  38         };
  39
  40         /* External CAN clock - to be overridden by boards that provide it */
  41         can_clk: can {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         cpus {
  48                 #address-cells = <1>;
  49                 #size-cells = <0>;
  50
  51                 a53_0: cpu@0 {
  52                         compatible = "arm,cortex-a53", "arm,armv8";
  53                         reg = <0>;
  54                         device_type = "cpu";
  55                         power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
  56                         next-level-cache = <&L2_CA53>;
  57                         enable-method = "psci";
  58                 };
  59
  60                 a53_1: cpu@1 {
  61                         compatible = "arm,cortex-a53", "arm,armv8";
  62                         reg = <1>;
  63                         device_type = "cpu";
  64                         power-domains = <&sysc R8A774C0_PD_CA53_CPU1>;
  65                         next-level-cache = <&L2_CA53>;
  66                         enable-method = "psci";
  67                 };
  68
  69                 L2_CA53: cache-controller-0 {
  70                         compatible = "cache";
  71                         power-domains = <&sysc R8A774C0_PD_CA53_SCU>;
  72                         cache-unified;
  73                         cache-level = <2>;
  74                 };
  75         };
  76
  77         extal_clk: extal {
  78                 compatible = "fixed-clock";
  79                 #clock-cells = <0>;
  80                 /* This value must be overridden by the board */
  81                 clock-frequency = <0>;
  82         };
  83
  84         /* External PCIe clock - can be overridden by the board */
  85         pcie_bus_clk: pcie_bus {
  86                 compatible = "fixed-clock";
  87                 #clock-cells = <0>;
  88                 clock-frequency = <0>;
  89         };
  90
  91         pmu_a53 {
  92                 compatible = "arm,cortex-a53-pmu";
  93                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
  94                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
  95                 interrupt-affinity = <&a53_0>, <&a53_1>;
  96         };
  97
  98         psci {
  99                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 100                 method = "smc";
 101         };
 102
 103         /* External SCIF clock - to be overridden by boards that provide it */
 104         scif_clk: scif {
 105                 compatible = "fixed-clock";
 106                 #clock-cells = <0>;
 107                 clock-frequency = <0>;
 108         };
 109
 110         soc: soc {
 111                 compatible = "simple-bus";
 112                 interrupt-parent = <&gic>;
 113                 #address-cells = <2>;
 114                 #size-cells = <2>;
 115                 ranges;
 116
 117                 rwdt: watchdog@e6020000 {
 118                         compatible = "renesas,r8a774c0-wdt",
 119                                      "renesas,rcar-gen3-wdt";
 120                         reg = <0 0xe6020000 0 0x0c>;
 121                         clocks = <&cpg CPG_MOD 402>;
 122                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 123                         resets = <&cpg 402>;
 124                         status = "disabled";
 125                 };
 126
 127                 gpio0: gpio@e6050000 {
 128                         compatible = "renesas,gpio-r8a774c0",
 129                                      "renesas,rcar-gen3-gpio";
 130                         reg = <0 0xe6050000 0 0x50>;
 131                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 132                         #gpio-cells = <2>;
 133                         gpio-controller;
 134                         gpio-ranges = <&pfc 0 0 18>;
 135                         #interrupt-cells = <2>;
 136                         interrupt-controller;
 137                         clocks = <&cpg CPG_MOD 912>;
 138                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 139                         resets = <&cpg 912>;
 140                 };
 141
 142                 gpio1: gpio@e6051000 {
 143                         compatible = "renesas,gpio-r8a774c0",
 144                                      "renesas,rcar-gen3-gpio";
 145                         reg = <0 0xe6051000 0 0x50>;
 146                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 147                         #gpio-cells = <2>;
 148                         gpio-controller;
 149                         gpio-ranges = <&pfc 0 32 23>;
 150                         #interrupt-cells = <2>;
 151                         interrupt-controller;
 152                         clocks = <&cpg CPG_MOD 911>;
 153                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 154                         resets = <&cpg 911>;
 155                 };
 156
 157                 gpio2: gpio@e6052000 {
 158                         compatible = "renesas,gpio-r8a774c0",
 159                                      "renesas,rcar-gen3-gpio";
 160                         reg = <0 0xe6052000 0 0x50>;
 161                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 162                         #gpio-cells = <2>;
 163                         gpio-controller;
 164                         gpio-ranges = <&pfc 0 64 26>;
 165                         #interrupt-cells = <2>;
 166                         interrupt-controller;
 167                         clocks = <&cpg CPG_MOD 910>;
 168                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 169                         resets = <&cpg 910>;
 170                 };
 171
 172                 gpio3: gpio@e6053000 {
 173                         compatible = "renesas,gpio-r8a774c0",
 174                                      "renesas,rcar-gen3-gpio";
 175                         reg = <0 0xe6053000 0 0x50>;
 176                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 177                         #gpio-cells = <2>;
 178                         gpio-controller;
 179                         gpio-ranges = <&pfc 0 96 16>;
 180                         #interrupt-cells = <2>;
 181                         interrupt-controller;
 182                         clocks = <&cpg CPG_MOD 909>;
 183                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 184                         resets = <&cpg 909>;
 185                 };
 186
 187                 gpio4: gpio@e6054000 {
 188                         compatible = "renesas,gpio-r8a774c0",
 189                                      "renesas,rcar-gen3-gpio";
 190                         reg = <0 0xe6054000 0 0x50>;
 191                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 192                         #gpio-cells = <2>;
 193                         gpio-controller;
 194                         gpio-ranges = <&pfc 0 128 11>;
 195                         #interrupt-cells = <2>;
 196                         interrupt-controller;
 197                         clocks = <&cpg CPG_MOD 908>;
 198                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 199                         resets = <&cpg 908>;
 200                 };
 201
 202                 gpio5: gpio@e6055000 {
 203                         compatible = "renesas,gpio-r8a774c0",
 204                                      "renesas,rcar-gen3-gpio";
 205                         reg = <0 0xe6055000 0 0x50>;
 206                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 207                         #gpio-cells = <2>;
 208                         gpio-controller;
 209                         gpio-ranges = <&pfc 0 160 20>;
 210                         #interrupt-cells = <2>;
 211                         interrupt-controller;
 212                         clocks = <&cpg CPG_MOD 907>;
 213                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 214                         resets = <&cpg 907>;
 215                 };
 216
 217                 gpio6: gpio@e6055400 {
 218                         compatible = "renesas,gpio-r8a774c0",
 219                                      "renesas,rcar-gen3-gpio";
 220                         reg = <0 0xe6055400 0 0x50>;
 221                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 222                         #gpio-cells = <2>;
 223                         gpio-controller;
 224                         gpio-ranges = <&pfc 0 192 18>;
 225                         #interrupt-cells = <2>;
 226                         interrupt-controller;
 227                         clocks = <&cpg CPG_MOD 906>;
 228                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 229                         resets = <&cpg 906>;
 230                 };
 231
 232                 pfc: pin-controller@e6060000 {
 233                         compatible = "renesas,pfc-r8a774c0";
 234                         reg = <0 0xe6060000 0 0x508>;
 235                 };
 236
 237                 cpg: clock-controller@e6150000 {
 238                         compatible = "renesas,r8a774c0-cpg-mssr";
 239                         reg = <0 0xe6150000 0 0x1000>;
 240                         clocks = <&extal_clk>;
 241                         clock-names = "extal";
 242                         #clock-cells = <2>;
 243                         #power-domain-cells = <0>;
 244                         #reset-cells = <1>;
 245                 };
 246
 247                 rst: reset-controller@e6160000 {
 248                         compatible = "renesas,r8a774c0-rst";
 249                         reg = <0 0xe6160000 0 0x0200>;
 250                 };
 251
 252                 sysc: system-controller@e6180000 {
 253                         compatible = "renesas,r8a774c0-sysc";
 254                         reg = <0 0xe6180000 0 0x0400>;
 255                         #power-domain-cells = <1>;
 256                 };
 257
 258                 thermal: thermal@e6190000 {
 259                         compatible = "renesas,thermal-r8a774c0";
 260                         reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
 261                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 262                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 264                         clocks = <&cpg CPG_MOD 522>;
 265                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 266                         resets = <&cpg 522>;
 267                         #thermal-sensor-cells = <0>;
 268                 };
 269
 270                 intc_ex: interrupt-controller@e61c0000 {
 271                         compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc";
 272                         #interrupt-cells = <2>;
 273                         interrupt-controller;
 274                         reg = <0 0xe61c0000 0 0x200>;
 275                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 276                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 277                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 278                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 279                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 280                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 281                         clocks = <&cpg CPG_MOD 407>;
 282                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 283                         resets = <&cpg 407>;
 284                 };
 285
 286                 i2c0: i2c@e6500000 {
 287                         #address-cells = <1>;
 288                         #size-cells = <0>;
 289                         compatible = "renesas,i2c-r8a774c0",
 290                                      "renesas,rcar-gen3-i2c";
 291                         reg = <0 0xe6500000 0 0x40>;
 292                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 293                         clocks = <&cpg CPG_MOD 931>;
 294                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 295                         resets = <&cpg 931>;
 296                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 297                                <&dmac2 0x91>, <&dmac2 0x90>;
 298                         dma-names = "tx", "rx", "tx", "rx";
 299                         i2c-scl-internal-delay-ns = <110>;
 300                         status = "disabled";
 301                 };
 302
 303                 i2c1: i2c@e6508000 {
 304                         #address-cells = <1>;
 305                         #size-cells = <0>;
 306                         compatible = "renesas,i2c-r8a774c0",
 307                                      "renesas,rcar-gen3-i2c";
 308                         reg = <0 0xe6508000 0 0x40>;
 309                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 310                         clocks = <&cpg CPG_MOD 930>;
 311                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 312                         resets = <&cpg 930>;
 313                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 314                                <&dmac2 0x93>, <&dmac2 0x92>;
 315                         dma-names = "tx", "rx", "tx", "rx";
 316                         i2c-scl-internal-delay-ns = <6>;
 317                         status = "disabled";
 318                 };
 319
 320                 i2c2: i2c@e6510000 {
 321                         #address-cells = <1>;
 322                         #size-cells = <0>;
 323                         compatible = "renesas,i2c-r8a774c0",
 324                                      "renesas,rcar-gen3-i2c";
 325                         reg = <0 0xe6510000 0 0x40>;
 326                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 327                         clocks = <&cpg CPG_MOD 929>;
 328                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 329                         resets = <&cpg 929>;
 330                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 331                                <&dmac2 0x95>, <&dmac2 0x94>;
 332                         dma-names = "tx", "rx", "tx", "rx";
 333                         i2c-scl-internal-delay-ns = <6>;
 334                         status = "disabled";
 335                 };
 336
 337                 i2c3: i2c@e66d0000 {
 338                         #address-cells = <1>;
 339                         #size-cells = <0>;
 340                         compatible = "renesas,i2c-r8a774c0",
 341                                      "renesas,rcar-gen3-i2c";
 342                         reg = <0 0xe66d0000 0 0x40>;
 343                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 344                         clocks = <&cpg CPG_MOD 928>;
 345                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 346                         resets = <&cpg 928>;
 347                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 348                         dma-names = "tx", "rx";
 349                         i2c-scl-internal-delay-ns = <110>;
 350                         status = "disabled";
 351                 };
 352
 353                 i2c4: i2c@e66d8000 {
 354                         #address-cells = <1>;
 355                         #size-cells = <0>;
 356                         compatible = "renesas,i2c-r8a774c0",
 357                                      "renesas,rcar-gen3-i2c";
 358                         reg = <0 0xe66d8000 0 0x40>;
 359                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 360                         clocks = <&cpg CPG_MOD 927>;
 361                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 362                         resets = <&cpg 927>;
 363                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 364                         dma-names = "tx", "rx";
 365                         i2c-scl-internal-delay-ns = <6>;
 366                         status = "disabled";
 367                 };
 368
 369                 i2c5: i2c@e66e0000 {
 370                         #address-cells = <1>;
 371                         #size-cells = <0>;
 372                         compatible = "renesas,i2c-r8a774c0",
 373                                      "renesas,rcar-gen3-i2c";
 374                         reg = <0 0xe66e0000 0 0x40>;
 375                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 376                         clocks = <&cpg CPG_MOD 919>;
 377                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 378                         resets = <&cpg 919>;
 379                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 380                         dma-names = "tx", "rx";
 381                         i2c-scl-internal-delay-ns = <6>;
 382                         status = "disabled";
 383                 };
 384
 385                 i2c6: i2c@e66e8000 {
 386                         #address-cells = <1>;
 387                         #size-cells = <0>;
 388                         compatible = "renesas,i2c-r8a774c0",
 389                                      "renesas,rcar-gen3-i2c";
 390                         reg = <0 0xe66e8000 0 0x40>;
 391                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 392                         clocks = <&cpg CPG_MOD 918>;
 393                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 394                         resets = <&cpg 918>;
 395                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 396                         dma-names = "tx", "rx";
 397                         i2c-scl-internal-delay-ns = <6>;
 398                         status = "disabled";
 399                 };
 400
 401                 i2c7: i2c@e6690000 {
 402                         #address-cells = <1>;
 403                         #size-cells = <0>;
 404                         compatible = "renesas,i2c-r8a774c0",
 405                                      "renesas,rcar-gen3-i2c";
 406                         reg = <0 0xe6690000 0 0x40>;
 407                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 408                         clocks = <&cpg CPG_MOD 1003>;
 409                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 410                         resets = <&cpg 1003>;
 411                         i2c-scl-internal-delay-ns = <6>;
 412                         status = "disabled";
 413                 };
 414
 415                 i2c_dvfs: i2c@e60b0000 {
 416                         #address-cells = <1>;
 417                         #size-cells = <0>;
 418                         compatible = "renesas,iic-r8a774c0";
 419                         reg = <0 0xe60b0000 0 0x15>;
 420                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 421                         clocks = <&cpg CPG_MOD 926>;
 422                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 423                         resets = <&cpg 926>;
 424                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 425                         dma-names = "tx", "rx";
 426                         status = "disabled";
 427                 };
 428
 429                 hscif0: serial@e6540000 {
 430                         compatible = "renesas,hscif-r8a774c0",
 431                                      "renesas,rcar-gen3-hscif",
 432                                      "renesas,hscif";
 433                         reg = <0 0xe6540000 0 0x60>;
 434                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 435                         clocks = <&cpg CPG_MOD 520>,
 436                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 437                                  <&scif_clk>;
 438                         clock-names = "fck", "brg_int", "scif_clk";
 439                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 440                                <&dmac2 0x31>, <&dmac2 0x30>;
 441                         dma-names = "tx", "rx", "tx", "rx";
 442                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 443                         resets = <&cpg 520>;
 444                         status = "disabled";
 445                 };
 446
 447                 hscif1: serial@e6550000 {
 448                         compatible = "renesas,hscif-r8a774c0",
 449                                      "renesas,rcar-gen3-hscif",
 450                                      "renesas,hscif";
 451                         reg = <0 0xe6550000 0 0x60>;
 452                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 519>,
 454                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 455                                  <&scif_clk>;
 456                         clock-names = "fck", "brg_int", "scif_clk";
 457                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 458                                <&dmac2 0x33>, <&dmac2 0x32>;
 459                         dma-names = "tx", "rx", "tx", "rx";
 460                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 461                         resets = <&cpg 519>;
 462                         status = "disabled";
 463                 };
 464
 465                 hscif2: serial@e6560000 {
 466                         compatible = "renesas,hscif-r8a774c0",
 467                                      "renesas,rcar-gen3-hscif",
 468                                      "renesas,hscif";
 469                         reg = <0 0xe6560000 0 0x60>;
 470                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 471                         clocks = <&cpg CPG_MOD 518>,
 472                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 473                                  <&scif_clk>;
 474                         clock-names = "fck", "brg_int", "scif_clk";
 475                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 476                                <&dmac2 0x35>, <&dmac2 0x34>;
 477                         dma-names = "tx", "rx", "tx", "rx";
 478                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 479                         resets = <&cpg 518>;
 480                         status = "disabled";
 481                 };
 482
 483                 hscif3: serial@e66a0000 {
 484                         compatible = "renesas,hscif-r8a774c0",
 485                                      "renesas,rcar-gen3-hscif",
 486                                      "renesas,hscif";
 487                         reg = <0 0xe66a0000 0 0x60>;
 488                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 489                         clocks = <&cpg CPG_MOD 517>,
 490                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 491                                  <&scif_clk>;
 492                         clock-names = "fck", "brg_int", "scif_clk";
 493                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 494                         dma-names = "tx", "rx";
 495                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 496                         resets = <&cpg 517>;
 497                         status = "disabled";
 498                 };
 499
 500                 hscif4: serial@e66b0000 {
 501                         compatible = "renesas,hscif-r8a774c0",
 502                                      "renesas,rcar-gen3-hscif",
 503                                      "renesas,hscif";
 504                         reg = <0 0xe66b0000 0 0x60>;
 505                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 506                         clocks = <&cpg CPG_MOD 516>,
 507                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 508                                  <&scif_clk>;
 509                         clock-names = "fck", "brg_int", "scif_clk";
 510                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 511                         dma-names = "tx", "rx";
 512                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 513                         resets = <&cpg 516>;
 514                         status = "disabled";
 515                 };
 516
 517                 hsusb: usb@e6590000 {
 518                         compatible = "renesas,usbhs-r8a774c0",
 519                                      "renesas,rcar-gen3-usbhs";
 520                         reg = <0 0xe6590000 0 0x200>;
 521                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 522                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 523                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 524                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 525                         dma-names = "ch0", "ch1", "ch2", "ch3";
 526                         renesas,buswait = <11>;
 527                         phys = <&usb2_phy0>;
 528                         phy-names = "usb";
 529                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 530                         resets = <&cpg 704>, <&cpg 703>;
 531                         status = "disabled";
 532                 };
 533
 534                 usb_dmac0: dma-controller@e65a0000 {
 535                         compatible = "renesas,r8a774c0-usb-dmac",
 536                                      "renesas,usb-dmac";
 537                         reg = <0 0xe65a0000 0 0x100>;
 538                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 539                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 540                         interrupt-names = "ch0", "ch1";
 541                         clocks = <&cpg CPG_MOD 330>;
 542                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 543                         resets = <&cpg 330>;
 544                         #dma-cells = <1>;
 545                         dma-channels = <2>;
 546                 };
 547
 548                 usb_dmac1: dma-controller@e65b0000 {
 549                         compatible = "renesas,r8a774c0-usb-dmac",
 550                                      "renesas,usb-dmac";
 551                         reg = <0 0xe65b0000 0 0x100>;
 552                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 553                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 554                         interrupt-names = "ch0", "ch1";
 555                         clocks = <&cpg CPG_MOD 331>;
 556                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 557                         resets = <&cpg 331>;
 558                         #dma-cells = <1>;
 559                         dma-channels = <2>;
 560                 };
 561
 562                 dmac0: dma-controller@e6700000 {
 563                         compatible = "renesas,dmac-r8a774c0",
 564                                      "renesas,rcar-dmac";
 565                         reg = <0 0xe6700000 0 0x10000>;
 566                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 567                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 568                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 569                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 570                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 571                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 572                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 573                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 574                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 575                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 576                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 577                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 578                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 579                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 580                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 581                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 582                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 583                         interrupt-names = "error",
 584                                         "ch0", "ch1", "ch2", "ch3",
 585                                         "ch4", "ch5", "ch6", "ch7",
 586                                         "ch8", "ch9", "ch10", "ch11",
 587                                         "ch12", "ch13", "ch14", "ch15";
 588                         clocks = <&cpg CPG_MOD 219>;
 589                         clock-names = "fck";
 590                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 591                         resets = <&cpg 219>;
 592                         #dma-cells = <1>;
 593                         dma-channels = <16>;
 594                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 595                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 596                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 597                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 598                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 599                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 600                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 601                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 602                 };
 603
 604                 dmac1: dma-controller@e7300000 {
 605                         compatible = "renesas,dmac-r8a774c0",
 606                                      "renesas,rcar-dmac";
 607                         reg = <0 0xe7300000 0 0x10000>;
 608                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 609                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 610                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 611                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 612                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 613                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 614                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 615                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 616                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 617                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 618                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 619                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 620                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 621                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 622                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 623                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 624                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 625                         interrupt-names = "error",
 626                                         "ch0", "ch1", "ch2", "ch3",
 627                                         "ch4", "ch5", "ch6", "ch7",
 628                                         "ch8", "ch9", "ch10", "ch11",
 629                                         "ch12", "ch13", "ch14", "ch15";
 630                         clocks = <&cpg CPG_MOD 218>;
 631                         clock-names = "fck";
 632                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 633                         resets = <&cpg 218>;
 634                         #dma-cells = <1>;
 635                         dma-channels = <16>;
 636                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 637                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 638                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 639                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 640                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 641                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 642                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 643                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 644                 };
 645
 646                 dmac2: dma-controller@e7310000 {
 647                         compatible = "renesas,dmac-r8a774c0",
 648                                      "renesas,rcar-dmac";
 649                         reg = <0 0xe7310000 0 0x10000>;
 650                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 651                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 652                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 653                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 654                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 655                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 656                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 657                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 658                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 659                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 660                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 661                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 662                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 663                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 664                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 665                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 666                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 667                         interrupt-names = "error",
 668                                         "ch0", "ch1", "ch2", "ch3",
 669                                         "ch4", "ch5", "ch6", "ch7",
 670                                         "ch8", "ch9", "ch10", "ch11",
 671                                         "ch12", "ch13", "ch14", "ch15";
 672                         clocks = <&cpg CPG_MOD 217>;
 673                         clock-names = "fck";
 674                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 675                         resets = <&cpg 217>;
 676                         #dma-cells = <1>;
 677                         dma-channels = <16>;
 678                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 679                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 680                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 681                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 682                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 683                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 684                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 685                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 686                 };
 687
 688                 ipmmu_ds0: mmu@e6740000 {
 689                         compatible = "renesas,ipmmu-r8a774c0";
 690                         reg = <0 0xe6740000 0 0x1000>;
 691                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 692                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 693                         #iommu-cells = <1>;
 694                 };
 695
 696                 ipmmu_ds1: mmu@e7740000 {
 697                         compatible = "renesas,ipmmu-r8a774c0";
 698                         reg = <0 0xe7740000 0 0x1000>;
 699                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 700                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 701                         #iommu-cells = <1>;
 702                 };
 703
 704                 ipmmu_hc: mmu@e6570000 {
 705                         compatible = "renesas,ipmmu-r8a774c0";
 706                         reg = <0 0xe6570000 0 0x1000>;
 707                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 708                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 709                         #iommu-cells = <1>;
 710                 };
 711
 712                 ipmmu_mm: mmu@e67b0000 {
 713                         compatible = "renesas,ipmmu-r8a774c0";
 714                         reg = <0 0xe67b0000 0 0x1000>;
 715                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 716                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 717                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 718                         #iommu-cells = <1>;
 719                 };
 720
 721                 ipmmu_mp: mmu@ec670000 {
 722                         compatible = "renesas,ipmmu-r8a774c0";
 723                         reg = <0 0xec670000 0 0x1000>;
 724                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 725                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 726                         #iommu-cells = <1>;
 727                 };
 728
 729                 ipmmu_pv0: mmu@fd800000 {
 730                         compatible = "renesas,ipmmu-r8a774c0";
 731                         reg = <0 0xfd800000 0 0x1000>;
 732                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 733                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 734                         #iommu-cells = <1>;
 735                 };
 736
 737                 ipmmu_vc0: mmu@fe6b0000 {
 738                         compatible = "renesas,ipmmu-r8a774c0";
 739                         reg = <0 0xfe6b0000 0 0x1000>;
 740                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 741                         power-domains = <&sysc R8A774C0_PD_A3VC>;
 742                         #iommu-cells = <1>;
 743                 };
 744
 745                 ipmmu_vi0: mmu@febd0000 {
 746                         compatible = "renesas,ipmmu-r8a774c0";
 747                         reg = <0 0xfebd0000 0 0x1000>;
 748                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 749                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 750                         #iommu-cells = <1>;
 751                 };
 752
 753                 ipmmu_vp0: mmu@fe990000 {
 754                         compatible = "renesas,ipmmu-r8a774c0";
 755                         reg = <0 0xfe990000 0 0x1000>;
 756                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 757                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 758                         #iommu-cells = <1>;
 759                 };
 760
 761                 avb: ethernet@e6800000 {
 762                         compatible = "renesas,etheravb-r8a774c0",
 763                                      "renesas,etheravb-rcar-gen3";
 764                         reg = <0 0xe6800000 0 0x800>;
 765                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 766                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 767                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 768                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 769                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 770                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 771                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 772                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 773                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 774                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 775                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 776                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 777                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 778                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 779                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 780                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 781                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 782                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 783                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 784                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 785                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 786                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 787                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 788                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 789                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 790                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 791                                           "ch4", "ch5", "ch6", "ch7",
 792                                           "ch8", "ch9", "ch10", "ch11",
 793                                           "ch12", "ch13", "ch14", "ch15",
 794                                           "ch16", "ch17", "ch18", "ch19",
 795                                           "ch20", "ch21", "ch22", "ch23",
 796                                           "ch24";
 797                         clocks = <&cpg CPG_MOD 812>;
 798                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 799                         resets = <&cpg 812>;
 800                         phy-mode = "rgmii";
 801                         iommus = <&ipmmu_ds0 16>;
 802                         #address-cells = <1>;
 803                         #size-cells = <0>;
 804                         status = "disabled";
 805                 };
 806
 807                 can0: can@e6c30000 {
 808                         compatible = "renesas,can-r8a774c0",
 809                                      "renesas,rcar-gen3-can";
 810                         reg = <0 0xe6c30000 0 0x1000>;
 811                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 812                         clocks = <&cpg CPG_MOD 916>, <&can_clk>;
 813                         clock-names = "clkp1", "can_clk";
 814                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 815                         resets = <&cpg 916>;
 816                         status = "disabled";
 817                 };
 818
 819                 can1: can@e6c38000 {
 820                         compatible = "renesas,can-r8a774c0",
 821                                      "renesas,rcar-gen3-can";
 822                         reg = <0 0xe6c38000 0 0x1000>;
 823                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 824                         clocks = <&cpg CPG_MOD 915>, <&can_clk>;
 825                         clock-names = "clkp1", "can_clk";
 826                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 827                         resets = <&cpg 915>;
 828                         status = "disabled";
 829                 };
 830
 831                 pwm0: pwm@e6e30000 {
 832                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 833                         reg = <0 0xe6e30000 0 0x8>;
 834                         clocks = <&cpg CPG_MOD 523>;
 835                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 836                         resets = <&cpg 523>;
 837                         #pwm-cells = <2>;
 838                         status = "disabled";
 839                 };
 840
 841                 pwm1: pwm@e6e31000 {
 842                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 843                         reg = <0 0xe6e31000 0 0x8>;
 844                         clocks = <&cpg CPG_MOD 523>;
 845                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 846                         resets = <&cpg 523>;
 847                         #pwm-cells = <2>;
 848                         status = "disabled";
 849                 };
 850
 851                 pwm2: pwm@e6e32000 {
 852                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 853                         reg = <0 0xe6e32000 0 0x8>;
 854                         clocks = <&cpg CPG_MOD 523>;
 855                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 856                         resets = <&cpg 523>;
 857                         #pwm-cells = <2>;
 858                         status = "disabled";
 859                 };
 860
 861                 pwm3: pwm@e6e33000 {
 862                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 863                         reg = <0 0xe6e33000 0 0x8>;
 864                         clocks = <&cpg CPG_MOD 523>;
 865                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 866                         resets = <&cpg 523>;
 867                         #pwm-cells = <2>;
 868                         status = "disabled";
 869                 };
 870
 871                 pwm4: pwm@e6e34000 {
 872                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 873                         reg = <0 0xe6e34000 0 0x8>;
 874                         clocks = <&cpg CPG_MOD 523>;
 875                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 876                         resets = <&cpg 523>;
 877                         #pwm-cells = <2>;
 878                         status = "disabled";
 879                 };
 880
 881                 pwm5: pwm@e6e35000 {
 882                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 883                         reg = <0 0xe6e35000 0 0x8>;
 884                         clocks = <&cpg CPG_MOD 523>;
 885                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 886                         resets = <&cpg 523>;
 887                         #pwm-cells = <2>;
 888                         status = "disabled";
 889                 };
 890
 891                 pwm6: pwm@e6e36000 {
 892                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
 893                         reg = <0 0xe6e36000 0 0x8>;
 894                         clocks = <&cpg CPG_MOD 523>;
 895                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 896                         resets = <&cpg 523>;
 897                         #pwm-cells = <2>;
 898                         status = "disabled";
 899                 };
 900
 901                 scif0: serial@e6e60000 {
 902                         compatible = "renesas,scif-r8a774c0",
 903                                      "renesas,rcar-gen3-scif", "renesas,scif";
 904                         reg = <0 0xe6e60000 0 64>;
 905                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 906                         clocks = <&cpg CPG_MOD 207>,
 907                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 908                                  <&scif_clk>;
 909                         clock-names = "fck", "brg_int", "scif_clk";
 910                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
 911                                <&dmac2 0x51>, <&dmac2 0x50>;
 912                         dma-names = "tx", "rx", "tx", "rx";
 913                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 914                         resets = <&cpg 207>;
 915                         status = "disabled";
 916                 };
 917
 918                 scif1: serial@e6e68000 {
 919                         compatible = "renesas,scif-r8a774c0",
 920                                      "renesas,rcar-gen3-scif", "renesas,scif";
 921                         reg = <0 0xe6e68000 0 64>;
 922                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 923                         clocks = <&cpg CPG_MOD 206>,
 924                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 925                                  <&scif_clk>;
 926                         clock-names = "fck", "brg_int", "scif_clk";
 927                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
 928                                <&dmac2 0x53>, <&dmac2 0x52>;
 929                         dma-names = "tx", "rx", "tx", "rx";
 930                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 931                         resets = <&cpg 206>;
 932                         status = "disabled";
 933                 };
 934
 935                 scif2: serial@e6e88000 {
 936                         compatible = "renesas,scif-r8a774c0",
 937                                      "renesas,rcar-gen3-scif", "renesas,scif";
 938                         reg = <0 0xe6e88000 0 64>;
 939                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 940                         clocks = <&cpg CPG_MOD 310>,
 941                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 942                                  <&scif_clk>;
 943                         clock-names = "fck", "brg_int", "scif_clk";
 944                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 945                         resets = <&cpg 310>;
 946                         status = "disabled";
 947                 };
 948
 949                 scif3: serial@e6c50000 {
 950                         compatible = "renesas,scif-r8a774c0",
 951                                      "renesas,rcar-gen3-scif", "renesas,scif";
 952                         reg = <0 0xe6c50000 0 64>;
 953                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 954                         clocks = <&cpg CPG_MOD 204>,
 955                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 956                                  <&scif_clk>;
 957                         clock-names = "fck", "brg_int", "scif_clk";
 958                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 959                         dma-names = "tx", "rx";
 960                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 961                         resets = <&cpg 204>;
 962                         status = "disabled";
 963                 };
 964
 965                 scif4: serial@e6c40000 {
 966                         compatible = "renesas,scif-r8a774c0",
 967                                      "renesas,rcar-gen3-scif", "renesas,scif";
 968                         reg = <0 0xe6c40000 0 64>;
 969                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 970                         clocks = <&cpg CPG_MOD 203>,
 971                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 972                                  <&scif_clk>;
 973                         clock-names = "fck", "brg_int", "scif_clk";
 974                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 975                         dma-names = "tx", "rx";
 976                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 977                         resets = <&cpg 203>;
 978                         status = "disabled";
 979                 };
 980
 981                 scif5: serial@e6f30000 {
 982                         compatible = "renesas,scif-r8a774c0",
 983                                      "renesas,rcar-gen3-scif", "renesas,scif";
 984                         reg = <0 0xe6f30000 0 64>;
 985                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 986                         clocks = <&cpg CPG_MOD 202>,
 987                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 988                                  <&scif_clk>;
 989                         clock-names = "fck", "brg_int", "scif_clk";
 990                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
 991                                <&dmac2 0x5b>, <&dmac2 0x5a>;
 992                         dma-names = "tx", "rx", "tx", "rx";
 993                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 994                         resets = <&cpg 202>;
 995                         status = "disabled";
 996                 };
 997
 998                 msiof0: spi@e6e90000 {
 999                         compatible = "renesas,msiof-r8a774c0",
1000                                      "renesas,rcar-gen3-msiof";
1001                         reg = <0 0xe6e90000 0 0x0064>;
1002                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1003                         clocks = <&cpg CPG_MOD 211>;
1004                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1005                                <&dmac2 0x41>, <&dmac2 0x40>;
1006                         dma-names = "tx", "rx", "tx", "rx";
1007                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1008                         resets = <&cpg 211>;
1009                         #address-cells = <1>;
1010                         #size-cells = <0>;
1011                         status = "disabled";
1012                 };
1013
1014                 msiof1: spi@e6ea0000 {
1015                         compatible = "renesas,msiof-r8a774c0",
1016                                      "renesas,rcar-gen3-msiof";
1017                         reg = <0 0xe6ea0000 0 0x0064>;
1018                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1019                         clocks = <&cpg CPG_MOD 210>;
1020                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1021                                <&dmac2 0x43>, <&dmac2 0x42>;
1022                         dma-names = "tx", "rx", "tx", "rx";
1023                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1024                         resets = <&cpg 210>;
1025                         #address-cells = <1>;
1026                         #size-cells = <0>;
1027                         status = "disabled";
1028                 };
1029
1030                 msiof2: spi@e6c00000 {
1031                         compatible = "renesas,msiof-r8a774c0",
1032                                      "renesas,rcar-gen3-msiof";
1033                         reg = <0 0xe6c00000 0 0x0064>;
1034                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1035                         clocks = <&cpg CPG_MOD 209>;
1036                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1037                         dma-names = "tx", "rx";
1038                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1039                         resets = <&cpg 209>;
1040                         #address-cells = <1>;
1041                         #size-cells = <0>;
1042                         status = "disabled";
1043                 };
1044
1045                 msiof3: spi@e6c10000 {
1046                         compatible = "renesas,msiof-r8a774c0",
1047                                      "renesas,rcar-gen3-msiof";
1048                         reg = <0 0xe6c10000 0 0x0064>;
1049                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1050                         clocks = <&cpg CPG_MOD 208>;
1051                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1052                         dma-names = "tx", "rx";
1053                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1054                         resets = <&cpg 208>;
1055                         #address-cells = <1>;
1056                         #size-cells = <0>;
1057                         status = "disabled";
1058                 };
1059
1060                 rcar_sound: sound@ec500000 {
1061                         /*
1062                          * #sound-dai-cells is required
1063                          *
1064                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1065                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1066                          */
1067                         /*
1068                          * #clock-cells is required for audio_clkout0/1/2/3
1069                          *
1070                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1071                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1072                          */
1073                         compatible = "renesas,rcar_sound-r8a774c0",
1074                                      "renesas,rcar_sound-gen3";
1075                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
1076                                 <0 0xec5a0000 0 0x100>,  /* ADG */
1077                                 <0 0xec540000 0 0x1000>, /* SSIU */
1078                                 <0 0xec541000 0 0x280>,  /* SSI */
1079                                 <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1080                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1081
1082                         clocks = <&cpg CPG_MOD 1005>,
1083                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1084                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1085                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1086                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1087                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1088                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1089                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1090                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1091                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1092                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1093                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1094                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1095                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1096                                  <&audio_clk_a>, <&audio_clk_b>,
1097                                  <&audio_clk_c>,
1098                                  <&cpg CPG_CORE R8A774C0_CLK_ZA2>;
1099                         clock-names = "ssi-all",
1100                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1101                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1102                                       "ssi.1", "ssi.0",
1103                                       "src.9", "src.8", "src.7", "src.6",
1104                                       "src.5", "src.4", "src.3", "src.2",
1105                                       "src.1", "src.0",
1106                                       "mix.1", "mix.0",
1107                                       "ctu.1", "ctu.0",
1108                                       "dvc.0", "dvc.1",
1109                                       "clk_a", "clk_b", "clk_c", "clk_i";
1110                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1111                         resets = <&cpg 1005>,
1112                                  <&cpg 1006>, <&cpg 1007>,
1113                                  <&cpg 1008>, <&cpg 1009>,
1114                                  <&cpg 1010>, <&cpg 1011>,
1115                                  <&cpg 1012>, <&cpg 1013>,
1116                                  <&cpg 1014>, <&cpg 1015>;
1117                         reset-names = "ssi-all",
1118                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1119                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1120                                       "ssi.1", "ssi.0";
1121                         status = "disabled";
1122
1123                         rcar_sound,dvc {
1124                                 dvc0: dvc-0 {
1125                                         dmas = <&audma0 0xbc>;
1126                                         dma-names = "tx";
1127                                 };
1128                                 dvc1: dvc-1 {
1129                                         dmas = <&audma0 0xbe>;
1130                                         dma-names = "tx";
1131                                 };
1132                         };
1133
1134                         rcar_sound,mix {
1135                                 mix0: mix-0 { };
1136                                 mix1: mix-1 { };
1137                         };
1138
1139                         rcar_sound,ctu {
1140                                 ctu00: ctu-0 { };
1141                                 ctu01: ctu-1 { };
1142                                 ctu02: ctu-2 { };
1143                                 ctu03: ctu-3 { };
1144                                 ctu10: ctu-4 { };
1145                                 ctu11: ctu-5 { };
1146                                 ctu12: ctu-6 { };
1147                                 ctu13: ctu-7 { };
1148                         };
1149
1150                         rcar_sound,src {
1151                                 src0: src-0 {
1152                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1153                                         dmas = <&audma0 0x85>, <&audma0 0x9a>;
1154                                         dma-names = "rx", "tx";
1155                                 };
1156                                 src1: src-1 {
1157                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1158                                         dmas = <&audma0 0x87>, <&audma0 0x9c>;
1159                                         dma-names = "rx", "tx";
1160                                 };
1161                                 src2: src-2 {
1162                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1163                                         dmas = <&audma0 0x89>, <&audma0 0x9e>;
1164                                         dma-names = "rx", "tx";
1165                                 };
1166                                 src3: src-3 {
1167                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1168                                         dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1169                                         dma-names = "rx", "tx";
1170                                 };
1171                                 src4: src-4 {
1172                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1173                                         dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1174                                         dma-names = "rx", "tx";
1175                                 };
1176                                 src5: src-5 {
1177                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1178                                         dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1179                                         dma-names = "rx", "tx";
1180                                 };
1181                                 src6: src-6 {
1182                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1183                                         dmas = <&audma0 0x91>, <&audma0 0xb4>;
1184                                         dma-names = "rx", "tx";
1185                                 };
1186                                 src7: src-7 {
1187                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1188                                         dmas = <&audma0 0x93>, <&audma0 0xb6>;
1189                                         dma-names = "rx", "tx";
1190                                 };
1191                                 src8: src-8 {
1192                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1193                                         dmas = <&audma0 0x95>, <&audma0 0xb8>;
1194                                         dma-names = "rx", "tx";
1195                                 };
1196                                 src9: src-9 {
1197                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1198                                         dmas = <&audma0 0x97>, <&audma0 0xba>;
1199                                         dma-names = "rx", "tx";
1200                                 };
1201                         };
1202
1203                         rcar_sound,ssi {
1204                                 ssi0: ssi-0 {
1205                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1206                                         dmas = <&audma0 0x01>, <&audma0 0x02>,
1207                                                <&audma0 0x15>, <&audma0 0x16>;
1208                                         dma-names = "rx", "tx", "rxu", "txu";
1209                                 };
1210                                 ssi1: ssi-1 {
1211                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1212                                         dmas = <&audma0 0x03>, <&audma0 0x04>,
1213                                                <&audma0 0x49>, <&audma0 0x4a>;
1214                                         dma-names = "rx", "tx", "rxu", "txu";
1215                                 };
1216                                 ssi2: ssi-2 {
1217                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1218                                         dmas = <&audma0 0x05>, <&audma0 0x06>,
1219                                                <&audma0 0x63>, <&audma0 0x64>;
1220                                         dma-names = "rx", "tx", "rxu", "txu";
1221                                 };
1222                                 ssi3: ssi-3 {
1223                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1224                                         dmas = <&audma0 0x07>, <&audma0 0x08>,
1225                                                <&audma0 0x6f>, <&audma0 0x70>;
1226                                         dma-names = "rx", "tx", "rxu", "txu";
1227                                 };
1228                                 ssi4: ssi-4 {
1229                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1230                                         dmas = <&audma0 0x09>, <&audma0 0x0a>,
1231                                                <&audma0 0x71>, <&audma0 0x72>;
1232                                         dma-names = "rx", "tx", "rxu", "txu";
1233                                 };
1234                                 ssi5: ssi-5 {
1235                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1236                                         dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1237                                                <&audma0 0x73>, <&audma0 0x74>;
1238                                         dma-names = "rx", "tx", "rxu", "txu";
1239                                 };
1240                                 ssi6: ssi-6 {
1241                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1242                                         dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1243                                                <&audma0 0x75>, <&audma0 0x76>;
1244                                         dma-names = "rx", "tx", "rxu", "txu";
1245                                 };
1246                                 ssi7: ssi-7 {
1247                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1248                                         dmas = <&audma0 0x0f>, <&audma0 0x10>,
1249                                                <&audma0 0x79>, <&audma0 0x7a>;
1250                                         dma-names = "rx", "tx", "rxu", "txu";
1251                                 };
1252                                 ssi8: ssi-8 {
1253                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1254                                         dmas = <&audma0 0x11>, <&audma0 0x12>,
1255                                                <&audma0 0x7b>, <&audma0 0x7c>;
1256                                         dma-names = "rx", "tx", "rxu", "txu";
1257                                 };
1258                                 ssi9: ssi-9 {
1259                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1260                                         dmas = <&audma0 0x13>, <&audma0 0x14>,
1261                                                <&audma0 0x7d>, <&audma0 0x7e>;
1262                                         dma-names = "rx", "tx", "rxu", "txu";
1263                                 };
1264                         };
1265                 };
1266
1267                 audma0: dma-controller@ec700000 {
1268                         compatible = "renesas,dmac-r8a774c0",
1269                                      "renesas,rcar-dmac";
1270                         reg = <0 0xec700000 0 0x10000>;
1271                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1272                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1273                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1274                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1275                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1276                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1277                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1278                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1279                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1280                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1281                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1282                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1283                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1284                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1285                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1286                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1287                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1288                         interrupt-names = "error",
1289                                         "ch0", "ch1", "ch2", "ch3",
1290                                         "ch4", "ch5", "ch6", "ch7",
1291                                         "ch8", "ch9", "ch10", "ch11",
1292                                         "ch12", "ch13", "ch14", "ch15";
1293                         clocks = <&cpg CPG_MOD 502>;
1294                         clock-names = "fck";
1295                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1296                         resets = <&cpg 502>;
1297                         #dma-cells = <1>;
1298                         dma-channels = <16>;
1299                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1300                                  <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1301                                  <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1302                                  <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1303                                  <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1304                                  <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1305                                  <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1306                                  <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1307                 };
1308
1309                 xhci0: usb@ee000000 {
1310                         compatible = "renesas,xhci-r8a774c0",
1311                                      "renesas,rcar-gen3-xhci";
1312                         reg = <0 0xee000000 0 0xc00>;
1313                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1314                         clocks = <&cpg CPG_MOD 328>;
1315                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1316                         resets = <&cpg 328>;
1317                         status = "disabled";
1318                 };
1319
1320                 usb3_peri0: usb@ee020000 {
1321                         compatible = "renesas,r8a774c0-usb3-peri",
1322                                      "renesas,rcar-gen3-usb3-peri";
1323                         reg = <0 0xee020000 0 0x400>;
1324                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1325                         clocks = <&cpg CPG_MOD 328>;
1326                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1327                         resets = <&cpg 328>;
1328                         status = "disabled";
1329                 };
1330
1331                 ohci0: usb@ee080000 {
1332                         compatible = "generic-ohci";
1333                         reg = <0 0xee080000 0 0x100>;
1334                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1335                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1336                         phys = <&usb2_phy0>;
1337                         phy-names = "usb";
1338                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1339                         resets = <&cpg 703>, <&cpg 704>;
1340                         status = "disabled";
1341                 };
1342
1343                 ehci0: usb@ee080100 {
1344                         compatible = "generic-ehci";
1345                         reg = <0 0xee080100 0 0x100>;
1346                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1347                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1348                         phys = <&usb2_phy0>;
1349                         phy-names = "usb";
1350                         companion = <&ohci0>;
1351                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1352                         resets = <&cpg 703>, <&cpg 704>;
1353                         status = "disabled";
1354                 };
1355
1356                 usb2_phy0: usb-phy@ee080200 {
1357                         compatible = "renesas,usb2-phy-r8a774c0",
1358                                      "renesas,rcar-gen3-usb2-phy";
1359                         reg = <0 0xee080200 0 0x700>;
1360                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1361                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1362                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1363                         resets = <&cpg 703>, <&cpg 704>;
1364                         #phy-cells = <0>;
1365                         status = "disabled";
1366                 };
1367
1368                 sdhi0: sd@ee100000 {
1369                         compatible = "renesas,sdhi-r8a774c0",
1370                                      "renesas,rcar-gen3-sdhi";
1371                         reg = <0 0xee100000 0 0x2000>;
1372                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1373                         clocks = <&cpg CPG_MOD 314>;
1374                         max-frequency = <200000000>;
1375                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1376                         resets = <&cpg 314>;
1377                         status = "disabled";
1378                 };
1379
1380                 sdhi1: sd@ee120000 {
1381                         compatible = "renesas,sdhi-r8a774c0",
1382                                      "renesas,rcar-gen3-sdhi";
1383                         reg = <0 0xee120000 0 0x2000>;
1384                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1385                         clocks = <&cpg CPG_MOD 313>;
1386                         max-frequency = <200000000>;
1387                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1388                         resets = <&cpg 313>;
1389                         status = "disabled";
1390                 };
1391
1392                 sdhi3: sd@ee160000 {
1393                         compatible = "renesas,sdhi-r8a774c0",
1394                                      "renesas,rcar-gen3-sdhi";
1395                         reg = <0 0xee160000 0 0x2000>;
1396                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1397                         clocks = <&cpg CPG_MOD 311>;
1398                         max-frequency = <200000000>;
1399                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1400                         resets = <&cpg 311>;
1401                         status = "disabled";
1402                 };
1403
1404                 gic: interrupt-controller@f1010000 {
1405                         compatible = "arm,gic-400";
1406                         #interrupt-cells = <3>;
1407                         #address-cells = <0>;
1408                         interrupt-controller;
1409                         reg = <0x0 0xf1010000 0 0x1000>,
1410                               <0x0 0xf1020000 0 0x20000>,
1411                               <0x0 0xf1040000 0 0x20000>,
1412                               <0x0 0xf1060000 0 0x20000>;
1413                         interrupts = <GIC_PPI 9
1414                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1415                         clocks = <&cpg CPG_MOD 408>;
1416                         clock-names = "clk";
1417                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1418                         resets = <&cpg 408>;
1419                 };
1420
1421                 vspb0: vsp@fe960000 {
1422                         compatible = "renesas,vsp2";
1423                         reg = <0 0xfe960000 0 0x8000>;
1424                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1425                         clocks = <&cpg CPG_MOD 626>;
1426                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1427                         resets = <&cpg 626>;
1428                         renesas,fcp = <&fcpvb0>;
1429                 };
1430
1431                 fcpvb0: fcp@fe96f000 {
1432                         compatible = "renesas,fcpv";
1433                         reg = <0 0xfe96f000 0 0x200>;
1434                         clocks = <&cpg CPG_MOD 607>;
1435                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1436                         resets = <&cpg 607>;
1437                         iommus = <&ipmmu_vp0 5>;
1438                 };
1439
1440                 vspi0: vsp@fe9a0000 {
1441                         compatible = "renesas,vsp2";
1442                         reg = <0 0xfe9a0000 0 0x8000>;
1443                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1444                         clocks = <&cpg CPG_MOD 631>;
1445                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1446                         resets = <&cpg 631>;
1447                         renesas,fcp = <&fcpvi0>;
1448                 };
1449
1450                 fcpvi0: fcp@fe9af000 {
1451                         compatible = "renesas,fcpv";
1452                         reg = <0 0xfe9af000 0 0x200>;
1453                         clocks = <&cpg CPG_MOD 611>;
1454                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1455                         resets = <&cpg 611>;
1456                         iommus = <&ipmmu_vp0 8>;
1457                 };
1458
1459                 vspd0: vsp@fea20000 {
1460                         compatible = "renesas,vsp2";
1461                         reg = <0 0xfea20000 0 0x7000>;
1462                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1463                         clocks = <&cpg CPG_MOD 623>;
1464                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1465                         resets = <&cpg 623>;
1466                         renesas,fcp = <&fcpvd0>;
1467                 };
1468
1469                 fcpvd0: fcp@fea27000 {
1470                         compatible = "renesas,fcpv";
1471                         reg = <0 0xfea27000 0 0x200>;
1472                         clocks = <&cpg CPG_MOD 603>;
1473                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1474                         resets = <&cpg 603>;
1475                         iommus = <&ipmmu_vi0 8>;
1476                 };
1477
1478                 vspd1: vsp@fea28000 {
1479                         compatible = "renesas,vsp2";
1480                         reg = <0 0xfea28000 0 0x7000>;
1481                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1482                         clocks = <&cpg CPG_MOD 622>;
1483                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1484                         resets = <&cpg 622>;
1485                         renesas,fcp = <&fcpvd1>;
1486                 };
1487
1488                 fcpvd1: fcp@fea2f000 {
1489                         compatible = "renesas,fcpv";
1490                         reg = <0 0xfea2f000 0 0x200>;
1491                         clocks = <&cpg CPG_MOD 602>;
1492                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1493                         resets = <&cpg 602>;
1494                         iommus = <&ipmmu_vi0 9>;
1495                 };
1496
1497                 du: display@feb00000 {
1498                         compatible = "renesas,du-r8a774c0";
1499                         reg = <0 0xfeb00000 0 0x80000>;
1500                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1501                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1502                         clocks = <&cpg CPG_MOD 724>,
1503                                  <&cpg CPG_MOD 723>;
1504                         clock-names = "du.0", "du.1";
1505                         vsps = <&vspd0 0 &vspd1 0>;
1506                         status = "disabled";
1507
1508                         ports {
1509                                 #address-cells = <1>;
1510                                 #size-cells = <0>;
1511
1512                                 port@0 {
1513                                         reg = <0>;
1514                                         du_out_rgb: endpoint {
1515                                         };
1516                                 };
1517
1518                                 port@1 {
1519                                         reg = <1>;
1520                                         du_out_lvds0: endpoint {
1521                                                 remote-endpoint = <&lvds0_in>;
1522                                         };
1523                                 };
1524
1525                                 port@2 {
1526                                         reg = <2>;
1527                                         du_out_lvds1: endpoint {
1528                                                 remote-endpoint = <&lvds1_in>;
1529                                         };
1530                                 };
1531                         };
1532                 };
1533
1534                 lvds0: lvds-encoder@feb90000 {
1535                         compatible = "renesas,r8a774c0-lvds";
1536                         reg = <0 0xfeb90000 0 0x20>;
1537                         clocks = <&cpg CPG_MOD 727>;
1538                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1539                         resets = <&cpg 727>;
1540                         status = "disabled";
1541
1542                         ports {
1543                                 #address-cells = <1>;
1544                                 #size-cells = <0>;
1545
1546                                 port@0 {
1547                                         reg = <0>;
1548                                         lvds0_in: endpoint {
1549                                                 remote-endpoint = <&du_out_lvds0>;
1550                                         };
1551                                 };
1552
1553                                 port@1 {
1554                                         reg = <1>;
1555                                         lvds0_out: endpoint {
1556                                         };
1557                                 };
1558                         };
1559                 };
1560
1561                 lvds1: lvds-encoder@feb90100 {
1562                         compatible = "renesas,r8a774c0-lvds";
1563                         reg = <0 0xfeb90100 0 0x20>;
1564                         clocks = <&cpg CPG_MOD 727>;
1565                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1566                         resets = <&cpg 726>;
1567                         status = "disabled";
1568
1569                         ports {
1570                                 #address-cells = <1>;
1571                                 #size-cells = <0>;
1572
1573                                 port@0 {
1574                                         reg = <0>;
1575                                         lvds1_in: endpoint {
1576                                                 remote-endpoint = <&du_out_lvds1>;
1577                                         };
1578                                 };
1579
1580                                 port@1 {
1581                                         reg = <1>;
1582                                         lvds1_out: endpoint {
1583                                         };
1584                                 };
1585                         };
1586                 };
1587
1588                 prr: chipid@fff00044 {
1589                         compatible = "renesas,prr";
1590                         reg = <0 0xfff00044 0 4>;
1591                 };
1592         };
1593
1594         thermal-zones {
1595                 cpu-thermal {
1596                         polling-delay-passive = <250>;
1597                         polling-delay = <1000>;
1598                         thermal-sensors = <&thermal>;
1599
1600                         trips {
1601                                 cpu-crit {
1602                                         temperature = <120000>;
1603                                         hysteresis = <2000>;
1604                                         type = "critical";
1605                                 };
1606                         };
1607
1608                         cooling-maps {
1609                         };
1610                 };
1611         };
1612
1613         timer {
1614                 compatible = "arm,armv8-timer";
1615                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1616                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1617                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1618                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1619         };
1620
1621         /* External USB clocks - can be overridden by the board */
1622         usb3s0_clk: usb3s0 {
1623                 compatible = "fixed-clock";
1624                 #clock-cells = <0>;
1625                 clock-frequency = <0>;
1626         };
1627
1628         usb_extal_clk: usb_extal {
1629                 compatible = "fixed-clock";
1630                 #clock-cells = <0>;
1631                 clock-frequency = <0>;
1632         };
1633 };