arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the Silicon Linux RZ/G2E 96board platform (CAT874)
   4  *
   5  * Copyright (C) 2019 Renesas Electronics Corp.
   6  */
   7
   8 /dts-v1/;
   9 #include "r8a774c0.dtsi"
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/display/tda998x.h>
  12
  13 / {
  14         model = "Silicon Linux RZ/G2E 96board platform (CAT874)";
  15         compatible = "si-linux,cat874", "renesas,r8a774c0";
  16
  17         aliases {
  18                 serial0 = &scif2;
  19         };
  20
  21         chosen {
  22                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  23                 stdout-path = "serial0:115200n8";
  24         };
  25
  26         hdmi-out {
  27                 compatible = "hdmi-connector";
  28                 type = "a";
  29
  30                 port {
  31                         hdmi_con_out: endpoint {
  32                                 remote-endpoint = <&tda19988_out>;
  33                         };
  34                 };
  35         };
  36
  37         leds {
  38                 compatible = "gpio-leds";
  39
  40                 led0 {
  41                         gpios = <&gpio5 19 GPIO_ACTIVE_HIGH>;
  42                         label = "LED0";
  43                 };
  44
  45                 led1 {
  46                         gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
  47                         label = "LED1";
  48                 };
  49
  50                 led2 {
  51                         gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>;
  52                         label = "LED2";
  53                 };
  54
  55                 led3 {
  56                         gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>;
  57                         label = "LED3";
  58                 };
  59         };
  60
  61         memory@48000000 {
  62                 device_type = "memory";
  63                 /* first 128MB is reserved for secure area. */
  64                 reg = <0x0 0x48000000 0x0 0x78000000>;
  65         };
  66
  67         sound: sound {
  68                 compatible = "simple-audio-card";
  69
  70                 simple-audio-card,name = "CAT874 HDMI sound";
  71                 simple-audio-card,format = "i2s";
  72                 simple-audio-card,bitclock-master = <&sndcpu>;
  73                 simple-audio-card,frame-master = <&sndcpu>;
  74
  75                 sndcpu: simple-audio-card,cpu {
  76                         sound-dai = <&rcar_sound>;
  77                 };
  78
  79                 sndcodec: simple-audio-card,codec {
  80                         sound-dai = <&tda19988>;
  81                 };
  82         };
  83
  84         vcc_sdhi0: regulator-vcc-sdhi0 {
  85                 compatible = "regulator-fixed";
  86
  87                 regulator-name = "SDHI0 Vcc";
  88                 regulator-min-microvolt = <3300000>;
  89                 regulator-max-microvolt = <3300000>;
  90                 regulator-always-on;
  91                 regulator-boot-on;
  92         };
  93
  94         vccq_sdhi0: regulator-vccq-sdhi0 {
  95                 compatible = "regulator-gpio";
  96
  97                 regulator-name = "SDHI0 VccQ";
  98                 regulator-min-microvolt = <1800000>;
  99                 regulator-max-microvolt = <3300000>;
 100
 101                 gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 102                 gpios-states = <1>;
 103                 states = <3300000 1
 104                           1800000 0>;
 105         };
 106
 107         x13_clk: x13 {
 108                 compatible = "fixed-clock";
 109                 #clock-cells = <0>;
 110                 clock-frequency = <74250000>;
 111         };
 112 };
 113
 114 &audio_clk_a {
 115         clock-frequency = <22579200>;
 116 };
 117
 118 &du {
 119         pinctrl-0 = <&du_pins>;
 120         pinctrl-names = "default";
 121         status = "okay";
 122
 123         clocks = <&cpg CPG_MOD 724>,
 124                  <&cpg CPG_MOD 723>,
 125                  <&x13_clk>;
 126         clock-names = "du.0", "du.1", "dclkin.0";
 127
 128         ports {
 129                 port@0 {
 130                         endpoint {
 131                                 remote-endpoint = <&tda19988_in>;
 132                         };
 133                 };
 134         };
 135 };
 136
 137 &ehci0 {
 138         dr_mode = "host";
 139         status = "okay";
 140 };
 141
 142 &extal_clk {
 143         clock-frequency = <48000000>;
 144 };
 145
 146 &i2c0 {
 147         status = "okay";
 148         clock-frequency = <100000>;
 149
 150         tda19988: tda19988@70 {
 151                 compatible = "nxp,tda998x";
 152                 reg = <0x70>;
 153                 interrupt-parent = <&gpio1>;
 154                 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
 155
 156                 video-ports = <0x234501>;
 157
 158                 #sound-dai-cells = <0>;
 159                 audio-ports = <TDA998x_I2S 0x03>;
 160                 clocks = <&rcar_sound 1>;
 161
 162                 ports {
 163                         #address-cells = <1>;
 164                         #size-cells = <0>;
 165
 166                         port@0 {
 167                                 reg = <0>;
 168                                 tda19988_in: endpoint {
 169                                         remote-endpoint = <&du_out_rgb>;
 170                                 };
 171                         };
 172
 173                         port@1 {
 174                                 reg = <1>;
 175                                 tda19988_out: endpoint {
 176                                         remote-endpoint = <&hdmi_con_out>;
 177                                 };
 178                         };
 179                 };
 180         };
 181 };
 182
 183 &i2c1 {
 184         pinctrl-0 = <&i2c1_pins>;
 185         pinctrl-names = "default";
 186
 187         status = "okay";
 188         clock-frequency = <400000>;
 189
 190         rtc@32 {
 191                 compatible = "epson,rx8571";
 192                 reg = <0x32>;
 193         };
 194 };
 195
 196 &lvds0 {
 197         status = "okay";
 198
 199         clocks = <&cpg CPG_MOD 727>, <&x13_clk>, <&extal_clk>;
 200         clock-names = "fck", "dclkin.0", "extal";
 201 };
 202
 203 &ohci0 {
 204         dr_mode = "host";
 205         status = "okay";
 206 };
 207
 208 &pcie_bus_clk {
 209         clock-frequency = <100000000>;
 210 };
 211
 212 &pciec0 {
 213         /* Map all possible DDR as inbound ranges */
 214         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
 215 };
 216
 217 &pfc {
 218         du_pins: du {
 219                 groups = "du_rgb888", "du_clk_out_0", "du_sync", "du_disp",
 220                          "du_clk_in_0";
 221                 function = "du";
 222         };
 223
 224         i2c1_pins: i2c1 {
 225                 groups = "i2c1_b";
 226                 function = "i2c1";
 227         };
 228
 229         scif2_pins: scif2 {
 230                 groups = "scif2_data_a";
 231                 function = "scif2";
 232         };
 233
 234         sdhi0_pins: sd0 {
 235                 groups = "sdhi0_data4", "sdhi0_ctrl";
 236                 function = "sdhi0";
 237                 power-source = <3300>;
 238         };
 239
 240         sdhi0_pins_uhs: sd0_uhs {
 241                 groups = "sdhi0_data4", "sdhi0_ctrl";
 242                 function = "sdhi0";
 243                 power-source = <1800>;
 244         };
 245
 246         sound_pins: sound {
 247                 groups = "ssi01239_ctrl", "ssi0_data";
 248                 function = "ssi";
 249         };
 250
 251         sound_clk_pins: sound_clk {
 252                 groups = "audio_clkout1_a";
 253                 function = "audio_clk";
 254         };
 255 };
 256
 257 &rcar_sound {
 258         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 259         pinctrl-names = "default";
 260
 261         /* Single DAI */
 262         #sound-dai-cells = <0>;
 263
 264         /* audio_clkout0/1/2/3 */
 265         #clock-cells = <1>;
 266         clock-frequency = <11289600>;
 267
 268         status = "okay";
 269
 270         rcar_sound,dai {
 271                 dai0 {
 272                         playback = <&ssi0 &src0 &dvc0>;
 273                 };
 274         };
 275 };
 276
 277 &rwdt {
 278         timeout-sec = <60>;
 279         status = "okay";
 280 };
 281
 282 &scif2 {
 283         pinctrl-0 = <&scif2_pins>;
 284         pinctrl-names = "default";
 285
 286         status = "okay";
 287 };
 288
 289 &sdhi0 {
 290         pinctrl-0 = <&sdhi0_pins>;
 291         pinctrl-1 = <&sdhi0_pins_uhs>;
 292         pinctrl-names = "default", "state_uhs";
 293
 294         vmmc-supply = <&vcc_sdhi0>;
 295         vqmmc-supply = <&vccq_sdhi0>;
 296         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 297         bus-width = <4>;
 298         sd-uhs-sdr50;
 299         sd-uhs-sdr104;
 300         status = "okay";
 301 };
 302
 303 &usb2_phy0 {
 304         renesas,no-otg-pins;
 305         status = "okay";
 306 };