arch/arm64/boot/dts/renesas/r8a774b1.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the r8a774b1 SoC
   4  *
   5  * Copyright (C) 2019 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/irq.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
  11 #include <dt-bindings/power/r8a774b1-sysc.h>
  12
  13 / {
  14         compatible = "renesas,r8a774b1";
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         /*
  19          * The external audio clocks are configured as 0 Hz fixed frequency
  20          * clocks by default.
  21          * Boards that provide audio clocks should override them.
  22          */
  23         audio_clk_a: audio_clk_a {
  24                 compatible = "fixed-clock";
  25                 #clock-cells = <0>;
  26                 clock-frequency = <0>;
  27         };
  28
  29         audio_clk_b: audio_clk_b {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <0>;
  33         };
  34
  35         audio_clk_c: audio_clk_c {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         /* External CAN clock - to be overridden by boards that provide it */
  42         can_clk: can {
  43                 compatible = "fixed-clock";
  44                 #clock-cells = <0>;
  45                 clock-frequency = <0>;
  46         };
  47
  48         cluster0_opp: opp_table0 {
  49                 compatible = "operating-points-v2";
  50                 opp-shared;
  51
  52                 opp-500000000 {
  53                         opp-hz = /bits/ 64 <500000000>;
  54                         opp-microvolt = <830000>;
  55                         clock-latency-ns = <300000>;
  56                 };
  57                 opp-1000000000 {
  58                         opp-hz = /bits/ 64 <1000000000>;
  59                         opp-microvolt = <830000>;
  60                         clock-latency-ns = <300000>;
  61                 };
  62                 opp-1500000000 {
  63                         opp-hz = /bits/ 64 <1500000000>;
  64                         opp-microvolt = <830000>;
  65                         clock-latency-ns = <300000>;
  66                         opp-suspend;
  67                 };
  68         };
  69
  70         cpus {
  71                 #address-cells = <1>;
  72                 #size-cells = <0>;
  73
  74                 a57_0: cpu@0 {
  75                         compatible = "arm,cortex-a57";
  76                         reg = <0x0>;
  77                         device_type = "cpu";
  78                         power-domains = <&sysc R8A774B1_PD_CA57_CPU0>;
  79                         next-level-cache = <&L2_CA57>;
  80                         enable-method = "psci";
  81                         #cooling-cells = <2>;
  82                         dynamic-power-coefficient = <854>;
  83                         clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
  84                         operating-points-v2 = <&cluster0_opp>;
  85                 };
  86
  87                 a57_1: cpu@1 {
  88                         compatible = "arm,cortex-a57";
  89                         reg = <0x1>;
  90                         device_type = "cpu";
  91                         power-domains = <&sysc R8A774B1_PD_CA57_CPU1>;
  92                         next-level-cache = <&L2_CA57>;
  93                         enable-method = "psci";
  94                         clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
  95                         operating-points-v2 = <&cluster0_opp>;
  96                 };
  97
  98                 L2_CA57: cache-controller-0 {
  99                         compatible = "cache";
 100                         power-domains = <&sysc R8A774B1_PD_CA57_SCU>;
 101                         cache-unified;
 102                         cache-level = <2>;
 103                 };
 104         };
 105
 106         extal_clk: extal {
 107                 compatible = "fixed-clock";
 108                 #clock-cells = <0>;
 109                 /* This value must be overridden by the board */
 110                 clock-frequency = <0>;
 111         };
 112
 113         extalr_clk: extalr {
 114                 compatible = "fixed-clock";
 115                 #clock-cells = <0>;
 116                 /* This value must be overridden by the board */
 117                 clock-frequency = <0>;
 118         };
 119
 120         /* External PCIe clock - can be overridden by the board */
 121         pcie_bus_clk: pcie_bus {
 122                 compatible = "fixed-clock";
 123                 #clock-cells = <0>;
 124                 clock-frequency = <0>;
 125         };
 126
 127         pmu_a57 {
 128                 compatible = "arm,cortex-a57-pmu";
 129                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 130                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 131                 interrupt-affinity = <&a57_0>, <&a57_1>;
 132         };
 133
 134         psci {
 135                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 136                 method = "smc";
 137         };
 138
 139         /* External SCIF clock - to be overridden by boards that provide it */
 140         scif_clk: scif {
 141                 compatible = "fixed-clock";
 142                 #clock-cells = <0>;
 143                 clock-frequency = <0>;
 144         };
 145
 146         soc {
 147                 compatible = "simple-bus";
 148                 interrupt-parent = <&gic>;
 149                 #address-cells = <2>;
 150                 #size-cells = <2>;
 151                 ranges;
 152
 153                 rwdt: watchdog@e6020000 {
 154                         compatible = "renesas,r8a774b1-wdt",
 155                                      "renesas,rcar-gen3-wdt";
 156                         reg = <0 0xe6020000 0 0x0c>;
 157                         clocks = <&cpg CPG_MOD 402>;
 158                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 159                         resets = <&cpg 402>;
 160                         status = "disabled";
 161                 };
 162
 163                 gpio0: gpio@e6050000 {
 164                         compatible = "renesas,gpio-r8a774b1",
 165                                      "renesas,rcar-gen3-gpio";
 166                         reg = <0 0xe6050000 0 0x50>;
 167                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 168                         #gpio-cells = <2>;
 169                         gpio-controller;
 170                         gpio-ranges = <&pfc 0 0 16>;
 171                         #interrupt-cells = <2>;
 172                         interrupt-controller;
 173                         clocks = <&cpg CPG_MOD 912>;
 174                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 175                         resets = <&cpg 912>;
 176                 };
 177
 178                 gpio1: gpio@e6051000 {
 179                         compatible = "renesas,gpio-r8a774b1",
 180                                      "renesas,rcar-gen3-gpio";
 181                         reg = <0 0xe6051000 0 0x50>;
 182                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 183                         #gpio-cells = <2>;
 184                         gpio-controller;
 185                         gpio-ranges = <&pfc 0 32 29>;
 186                         #interrupt-cells = <2>;
 187                         interrupt-controller;
 188                         clocks = <&cpg CPG_MOD 911>;
 189                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 190                         resets = <&cpg 911>;
 191                 };
 192
 193                 gpio2: gpio@e6052000 {
 194                         compatible = "renesas,gpio-r8a774b1",
 195                                      "renesas,rcar-gen3-gpio";
 196                         reg = <0 0xe6052000 0 0x50>;
 197                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 198                         #gpio-cells = <2>;
 199                         gpio-controller;
 200                         gpio-ranges = <&pfc 0 64 15>;
 201                         #interrupt-cells = <2>;
 202                         interrupt-controller;
 203                         clocks = <&cpg CPG_MOD 910>;
 204                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 205                         resets = <&cpg 910>;
 206                 };
 207
 208                 gpio3: gpio@e6053000 {
 209                         compatible = "renesas,gpio-r8a774b1",
 210                                      "renesas,rcar-gen3-gpio";
 211                         reg = <0 0xe6053000 0 0x50>;
 212                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 213                         #gpio-cells = <2>;
 214                         gpio-controller;
 215                         gpio-ranges = <&pfc 0 96 16>;
 216                         #interrupt-cells = <2>;
 217                         interrupt-controller;
 218                         clocks = <&cpg CPG_MOD 909>;
 219                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 220                         resets = <&cpg 909>;
 221                 };
 222
 223                 gpio4: gpio@e6054000 {
 224                         compatible = "renesas,gpio-r8a774b1",
 225                                      "renesas,rcar-gen3-gpio";
 226                         reg = <0 0xe6054000 0 0x50>;
 227                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 228                         #gpio-cells = <2>;
 229                         gpio-controller;
 230                         gpio-ranges = <&pfc 0 128 18>;
 231                         #interrupt-cells = <2>;
 232                         interrupt-controller;
 233                         clocks = <&cpg CPG_MOD 908>;
 234                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 235                         resets = <&cpg 908>;
 236                 };
 237
 238                 gpio5: gpio@e6055000 {
 239                         compatible = "renesas,gpio-r8a774b1",
 240                                      "renesas,rcar-gen3-gpio";
 241                         reg = <0 0xe6055000 0 0x50>;
 242                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 243                         #gpio-cells = <2>;
 244                         gpio-controller;
 245                         gpio-ranges = <&pfc 0 160 26>;
 246                         #interrupt-cells = <2>;
 247                         interrupt-controller;
 248                         clocks = <&cpg CPG_MOD 907>;
 249                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 250                         resets = <&cpg 907>;
 251                 };
 252
 253                 gpio6: gpio@e6055400 {
 254                         compatible = "renesas,gpio-r8a774b1",
 255                                      "renesas,rcar-gen3-gpio";
 256                         reg = <0 0xe6055400 0 0x50>;
 257                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 258                         #gpio-cells = <2>;
 259                         gpio-controller;
 260                         gpio-ranges = <&pfc 0 192 32>;
 261                         #interrupt-cells = <2>;
 262                         interrupt-controller;
 263                         clocks = <&cpg CPG_MOD 906>;
 264                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 265                         resets = <&cpg 906>;
 266                 };
 267
 268                 gpio7: gpio@e6055800 {
 269                         compatible = "renesas,gpio-r8a774b1",
 270                                      "renesas,rcar-gen3-gpio";
 271                         reg = <0 0xe6055800 0 0x50>;
 272                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 273                         #gpio-cells = <2>;
 274                         gpio-controller;
 275                         gpio-ranges = <&pfc 0 224 4>;
 276                         #interrupt-cells = <2>;
 277                         interrupt-controller;
 278                         clocks = <&cpg CPG_MOD 905>;
 279                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 280                         resets = <&cpg 905>;
 281                 };
 282
 283                 pfc: pin-controller@e6060000 {
 284                         compatible = "renesas,pfc-r8a774b1";
 285                         reg = <0 0xe6060000 0 0x50c>;
 286                 };
 287
 288                 cmt0: timer@e60f0000 {
 289                         compatible = "renesas,r8a774b1-cmt0",
 290                                      "renesas,rcar-gen3-cmt0";
 291                         reg = <0 0xe60f0000 0 0x1004>;
 292                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 293                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 294                         clocks = <&cpg CPG_MOD 303>;
 295                         clock-names = "fck";
 296                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 297                         resets = <&cpg 303>;
 298                         status = "disabled";
 299                 };
 300
 301                 cmt1: timer@e6130000 {
 302                         compatible = "renesas,r8a774b1-cmt1",
 303                                      "renesas,rcar-gen3-cmt1";
 304                         reg = <0 0xe6130000 0 0x1004>;
 305                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 306                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 307                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 308                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 309                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 310                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 311                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 312                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 313                         clocks = <&cpg CPG_MOD 302>;
 314                         clock-names = "fck";
 315                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 316                         resets = <&cpg 302>;
 317                         status = "disabled";
 318                 };
 319
 320                 cmt2: timer@e6140000 {
 321                         compatible = "renesas,r8a774b1-cmt1",
 322                                      "renesas,rcar-gen3-cmt1";
 323                         reg = <0 0xe6140000 0 0x1004>;
 324                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 325                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 326                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 327                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 328                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 329                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 330                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 331                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 332                         clocks = <&cpg CPG_MOD 301>;
 333                         clock-names = "fck";
 334                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 335                         resets = <&cpg 301>;
 336                         status = "disabled";
 337                 };
 338
 339                 cmt3: timer@e6148000 {
 340                         compatible = "renesas,r8a774b1-cmt1",
 341                                      "renesas,rcar-gen3-cmt1";
 342                         reg = <0 0xe6148000 0 0x1004>;
 343                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 344                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 345                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 346                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 347                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 348                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 349                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 350                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 351                         clocks = <&cpg CPG_MOD 300>;
 352                         clock-names = "fck";
 353                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 354                         resets = <&cpg 300>;
 355                         status = "disabled";
 356                 };
 357
 358                 cpg: clock-controller@e6150000 {
 359                         compatible = "renesas,r8a774b1-cpg-mssr";
 360                         reg = <0 0xe6150000 0 0x1000>;
 361                         clocks = <&extal_clk>, <&extalr_clk>;
 362                         clock-names = "extal", "extalr";
 363                         #clock-cells = <2>;
 364                         #power-domain-cells = <0>;
 365                         #reset-cells = <1>;
 366                 };
 367
 368                 rst: reset-controller@e6160000 {
 369                         compatible = "renesas,r8a774b1-rst";
 370                         reg = <0 0xe6160000 0 0x0200>;
 371                 };
 372
 373                 sysc: system-controller@e6180000 {
 374                         compatible = "renesas,r8a774b1-sysc";
 375                         reg = <0 0xe6180000 0 0x0400>;
 376                         #power-domain-cells = <1>;
 377                 };
 378
 379                 tsc: thermal@e6198000 {
 380                         compatible = "renesas,r8a774b1-thermal";
 381                         reg = <0 0xe6198000 0 0x100>,
 382                               <0 0xe61a0000 0 0x100>,
 383                               <0 0xe61a8000 0 0x100>;
 384                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 385                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 386                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 387                         clocks = <&cpg CPG_MOD 522>;
 388                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 389                         resets = <&cpg 522>;
 390                         #thermal-sensor-cells = <1>;
 391                 };
 392
 393                 intc_ex: interrupt-controller@e61c0000 {
 394                         compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc";
 395                         #interrupt-cells = <2>;
 396                         interrupt-controller;
 397                         reg = <0 0xe61c0000 0 0x200>;
 398                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 399                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 400                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 401                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 402                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 403                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 404                         clocks = <&cpg CPG_MOD 407>;
 405                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 406                         resets = <&cpg 407>;
 407                 };
 408
 409                 tmu0: timer@e61e0000 {
 410                         compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
 411                         reg = <0 0xe61e0000 0 0x30>;
 412                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 413                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 414                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 415                         clocks = <&cpg CPG_MOD 125>;
 416                         clock-names = "fck";
 417                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 418                         resets = <&cpg 125>;
 419                         status = "disabled";
 420                 };
 421
 422                 tmu1: timer@e6fc0000 {
 423                         compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
 424                         reg = <0 0xe6fc0000 0 0x30>;
 425                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 426                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 427                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 428                         clocks = <&cpg CPG_MOD 124>;
 429                         clock-names = "fck";
 430                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 431                         resets = <&cpg 124>;
 432                         status = "disabled";
 433                 };
 434
 435                 tmu2: timer@e6fd0000 {
 436                         compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
 437                         reg = <0 0xe6fd0000 0 0x30>;
 438                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 439                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 440                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 441                         clocks = <&cpg CPG_MOD 123>;
 442                         clock-names = "fck";
 443                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 444                         resets = <&cpg 123>;
 445                         status = "disabled";
 446                 };
 447
 448                 tmu3: timer@e6fe0000 {
 449                         compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
 450                         reg = <0 0xe6fe0000 0 0x30>;
 451                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 452                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 453                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 454                         clocks = <&cpg CPG_MOD 122>;
 455                         clock-names = "fck";
 456                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 457                         resets = <&cpg 122>;
 458                         status = "disabled";
 459                 };
 460
 461                 tmu4: timer@ffc00000 {
 462                         compatible = "renesas,tmu-r8a774b1", "renesas,tmu";
 463                         reg = <0 0xffc00000 0 0x30>;
 464                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 465                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 466                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 467                         clocks = <&cpg CPG_MOD 121>;
 468                         clock-names = "fck";
 469                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 470                         resets = <&cpg 121>;
 471                         status = "disabled";
 472                 };
 473
 474                 i2c0: i2c@e6500000 {
 475                         #address-cells = <1>;
 476                         #size-cells = <0>;
 477                         compatible = "renesas,i2c-r8a774b1",
 478                                      "renesas,rcar-gen3-i2c";
 479                         reg = <0 0xe6500000 0 0x40>;
 480                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 481                         clocks = <&cpg CPG_MOD 931>;
 482                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 483                         resets = <&cpg 931>;
 484                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 485                                <&dmac2 0x91>, <&dmac2 0x90>;
 486                         dma-names = "tx", "rx", "tx", "rx";
 487                         i2c-scl-internal-delay-ns = <110>;
 488                         status = "disabled";
 489                 };
 490
 491                 i2c1: i2c@e6508000 {
 492                         #address-cells = <1>;
 493                         #size-cells = <0>;
 494                         compatible = "renesas,i2c-r8a774b1",
 495                                      "renesas,rcar-gen3-i2c";
 496                         reg = <0 0xe6508000 0 0x40>;
 497                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 498                         clocks = <&cpg CPG_MOD 930>;
 499                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 500                         resets = <&cpg 930>;
 501                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 502                                <&dmac2 0x93>, <&dmac2 0x92>;
 503                         dma-names = "tx", "rx", "tx", "rx";
 504                         i2c-scl-internal-delay-ns = <6>;
 505                         status = "disabled";
 506                 };
 507
 508                 i2c2: i2c@e6510000 {
 509                         #address-cells = <1>;
 510                         #size-cells = <0>;
 511                         compatible = "renesas,i2c-r8a774b1",
 512                                      "renesas,rcar-gen3-i2c";
 513                         reg = <0 0xe6510000 0 0x40>;
 514                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 515                         clocks = <&cpg CPG_MOD 929>;
 516                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 517                         resets = <&cpg 929>;
 518                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 519                                <&dmac2 0x95>, <&dmac2 0x94>;
 520                         dma-names = "tx", "rx", "tx", "rx";
 521                         i2c-scl-internal-delay-ns = <6>;
 522                         status = "disabled";
 523                 };
 524
 525                 i2c3: i2c@e66d0000 {
 526                         #address-cells = <1>;
 527                         #size-cells = <0>;
 528                         compatible = "renesas,i2c-r8a774b1",
 529                                      "renesas,rcar-gen3-i2c";
 530                         reg = <0 0xe66d0000 0 0x40>;
 531                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 532                         clocks = <&cpg CPG_MOD 928>;
 533                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 534                         resets = <&cpg 928>;
 535                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 536                         dma-names = "tx", "rx";
 537                         i2c-scl-internal-delay-ns = <110>;
 538                         status = "disabled";
 539                 };
 540
 541                 i2c4: i2c@e66d8000 {
 542                         #address-cells = <1>;
 543                         #size-cells = <0>;
 544                         compatible = "renesas,i2c-r8a774b1",
 545                                      "renesas,rcar-gen3-i2c";
 546                         reg = <0 0xe66d8000 0 0x40>;
 547                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 548                         clocks = <&cpg CPG_MOD 927>;
 549                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 550                         resets = <&cpg 927>;
 551                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 552                         dma-names = "tx", "rx";
 553                         i2c-scl-internal-delay-ns = <110>;
 554                         status = "disabled";
 555                 };
 556
 557                 i2c5: i2c@e66e0000 {
 558                         #address-cells = <1>;
 559                         #size-cells = <0>;
 560                         compatible = "renesas,i2c-r8a774b1",
 561                                      "renesas,rcar-gen3-i2c";
 562                         reg = <0 0xe66e0000 0 0x40>;
 563                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 564                         clocks = <&cpg CPG_MOD 919>;
 565                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 566                         resets = <&cpg 919>;
 567                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 568                         dma-names = "tx", "rx";
 569                         i2c-scl-internal-delay-ns = <110>;
 570                         status = "disabled";
 571                 };
 572
 573                 i2c6: i2c@e66e8000 {
 574                         #address-cells = <1>;
 575                         #size-cells = <0>;
 576                         compatible = "renesas,i2c-r8a774b1",
 577                                      "renesas,rcar-gen3-i2c";
 578                         reg = <0 0xe66e8000 0 0x40>;
 579                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 580                         clocks = <&cpg CPG_MOD 918>;
 581                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 582                         resets = <&cpg 918>;
 583                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 584                         dma-names = "tx", "rx";
 585                         i2c-scl-internal-delay-ns = <6>;
 586                         status = "disabled";
 587                 };
 588
 589                 i2c_dvfs: i2c@e60b0000 {
 590                         #address-cells = <1>;
 591                         #size-cells = <0>;
 592                         compatible = "renesas,iic-r8a774b1",
 593                                      "renesas,rcar-gen3-iic",
 594                                      "renesas,rmobile-iic";
 595                         reg = <0 0xe60b0000 0 0x425>;
 596                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 597                         clocks = <&cpg CPG_MOD 926>;
 598                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 599                         resets = <&cpg 926>;
 600                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 601                         dma-names = "tx", "rx";
 602                         status = "disabled";
 603                 };
 604
 605                 hscif0: serial@e6540000 {
 606                         compatible = "renesas,hscif-r8a774b1",
 607                                      "renesas,rcar-gen3-hscif",
 608                                      "renesas,hscif";
 609                         reg = <0 0xe6540000 0 0x60>;
 610                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 611                         clocks = <&cpg CPG_MOD 520>,
 612                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
 613                                  <&scif_clk>;
 614                         clock-names = "fck", "brg_int", "scif_clk";
 615                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 616                                <&dmac2 0x31>, <&dmac2 0x30>;
 617                         dma-names = "tx", "rx", "tx", "rx";
 618                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 619                         resets = <&cpg 520>;
 620                         status = "disabled";
 621                 };
 622
 623                 hscif1: serial@e6550000 {
 624                         compatible = "renesas,hscif-r8a774b1",
 625                                      "renesas,rcar-gen3-hscif",
 626                                      "renesas,hscif";
 627                         reg = <0 0xe6550000 0 0x60>;
 628                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 629                         clocks = <&cpg CPG_MOD 519>,
 630                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
 631                                  <&scif_clk>;
 632                         clock-names = "fck", "brg_int", "scif_clk";
 633                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 634                                <&dmac2 0x33>, <&dmac2 0x32>;
 635                         dma-names = "tx", "rx", "tx", "rx";
 636                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 637                         resets = <&cpg 519>;
 638                         status = "disabled";
 639                 };
 640
 641                 hscif2: serial@e6560000 {
 642                         compatible = "renesas,hscif-r8a774b1",
 643                                      "renesas,rcar-gen3-hscif",
 644                                      "renesas,hscif";
 645                         reg = <0 0xe6560000 0 0x60>;
 646                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 647                         clocks = <&cpg CPG_MOD 518>,
 648                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
 649                                  <&scif_clk>;
 650                         clock-names = "fck", "brg_int", "scif_clk";
 651                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 652                                <&dmac2 0x35>, <&dmac2 0x34>;
 653                         dma-names = "tx", "rx", "tx", "rx";
 654                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 655                         resets = <&cpg 518>;
 656                         status = "disabled";
 657                 };
 658
 659                 hscif3: serial@e66a0000 {
 660                         compatible = "renesas,hscif-r8a774b1",
 661                                      "renesas,rcar-gen3-hscif",
 662                                      "renesas,hscif";
 663                         reg = <0 0xe66a0000 0 0x60>;
 664                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 665                         clocks = <&cpg CPG_MOD 517>,
 666                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
 667                                  <&scif_clk>;
 668                         clock-names = "fck", "brg_int", "scif_clk";
 669                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 670                         dma-names = "tx", "rx";
 671                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 672                         resets = <&cpg 517>;
 673                         status = "disabled";
 674                 };
 675
 676                 hscif4: serial@e66b0000 {
 677                         compatible = "renesas,hscif-r8a774b1",
 678                                      "renesas,rcar-gen3-hscif",
 679                                      "renesas,hscif";
 680                         reg = <0 0xe66b0000 0 0x60>;
 681                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 682                         clocks = <&cpg CPG_MOD 516>,
 683                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
 684                                  <&scif_clk>;
 685                         clock-names = "fck", "brg_int", "scif_clk";
 686                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 687                         dma-names = "tx", "rx";
 688                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 689                         resets = <&cpg 516>;
 690                         status = "disabled";
 691                 };
 692
 693                 hsusb: usb@e6590000 {
 694                         compatible = "renesas,usbhs-r8a774b1",
 695                                      "renesas,rcar-gen3-usbhs";
 696                         reg = <0 0xe6590000 0 0x200>;
 697                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 698                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 699                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 700                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 701                         dma-names = "ch0", "ch1", "ch2", "ch3";
 702                         renesas,buswait = <11>;
 703                         phys = <&usb2_phy0 3>;
 704                         phy-names = "usb";
 705                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 706                         resets = <&cpg 704>, <&cpg 703>;
 707                         status = "disabled";
 708                 };
 709
 710                 usb_dmac0: dma-controller@e65a0000 {
 711                         compatible = "renesas,r8a774b1-usb-dmac",
 712                                      "renesas,usb-dmac";
 713                         reg = <0 0xe65a0000 0 0x100>;
 714                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 715                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 716                         interrupt-names = "ch0", "ch1";
 717                         clocks = <&cpg CPG_MOD 330>;
 718                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 719                         resets = <&cpg 330>;
 720                         #dma-cells = <1>;
 721                         dma-channels = <2>;
 722                 };
 723
 724                 usb_dmac1: dma-controller@e65b0000 {
 725                         compatible = "renesas,r8a774b1-usb-dmac",
 726                                      "renesas,usb-dmac";
 727                         reg = <0 0xe65b0000 0 0x100>;
 728                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 729                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 730                         interrupt-names = "ch0", "ch1";
 731                         clocks = <&cpg CPG_MOD 331>;
 732                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 733                         resets = <&cpg 331>;
 734                         #dma-cells = <1>;
 735                         dma-channels = <2>;
 736                 };
 737
 738                 usb3_phy0: usb-phy@e65ee000 {
 739                         compatible = "renesas,r8a774b1-usb3-phy",
 740                                      "renesas,rcar-gen3-usb3-phy";
 741                         reg = <0 0xe65ee000 0 0x90>;
 742                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 743                                  <&usb_extal_clk>;
 744                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 745                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 746                         resets = <&cpg 328>;
 747                         #phy-cells = <0>;
 748                         status = "disabled";
 749                 };
 750
 751                 dmac0: dma-controller@e6700000 {
 752                         compatible = "renesas,dmac-r8a774b1",
 753                                      "renesas,rcar-dmac";
 754                         reg = <0 0xe6700000 0 0x10000>;
 755                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 756                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 757                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 758                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 759                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 760                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 761                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 762                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 763                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 764                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 765                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 766                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 767                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 768                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 769                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 770                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 771                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 772                         interrupt-names = "error",
 773                                         "ch0", "ch1", "ch2", "ch3",
 774                                         "ch4", "ch5", "ch6", "ch7",
 775                                         "ch8", "ch9", "ch10", "ch11",
 776                                         "ch12", "ch13", "ch14", "ch15";
 777                         clocks = <&cpg CPG_MOD 219>;
 778                         clock-names = "fck";
 779                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 780                         resets = <&cpg 219>;
 781                         #dma-cells = <1>;
 782                         dma-channels = <16>;
 783                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 784                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 785                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 786                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 787                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 788                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 789                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 790                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 791                 };
 792
 793                 dmac1: dma-controller@e7300000 {
 794                         compatible = "renesas,dmac-r8a774b1",
 795                                      "renesas,rcar-dmac";
 796                         reg = <0 0xe7300000 0 0x10000>;
 797                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 798                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 799                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 800                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 801                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 802                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 803                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 804                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 805                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 806                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 807                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 808                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 809                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 810                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 811                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 812                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 813                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 814                         interrupt-names = "error",
 815                                         "ch0", "ch1", "ch2", "ch3",
 816                                         "ch4", "ch5", "ch6", "ch7",
 817                                         "ch8", "ch9", "ch10", "ch11",
 818                                         "ch12", "ch13", "ch14", "ch15";
 819                         clocks = <&cpg CPG_MOD 218>;
 820                         clock-names = "fck";
 821                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 822                         resets = <&cpg 218>;
 823                         #dma-cells = <1>;
 824                         dma-channels = <16>;
 825                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 826                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 827                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 828                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 829                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 830                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 831                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 832                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 833                 };
 834
 835                 dmac2: dma-controller@e7310000 {
 836                         compatible = "renesas,dmac-r8a774b1",
 837                                      "renesas,rcar-dmac";
 838                         reg = <0 0xe7310000 0 0x10000>;
 839                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 840                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 841                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 842                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 843                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 844                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 845                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 846                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 847                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 848                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 849                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 850                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 851                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 852                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 853                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 854                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 855                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 856                         interrupt-names = "error",
 857                                         "ch0", "ch1", "ch2", "ch3",
 858                                         "ch4", "ch5", "ch6", "ch7",
 859                                         "ch8", "ch9", "ch10", "ch11",
 860                                         "ch12", "ch13", "ch14", "ch15";
 861                         clocks = <&cpg CPG_MOD 217>;
 862                         clock-names = "fck";
 863                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 864                         resets = <&cpg 217>;
 865                         #dma-cells = <1>;
 866                         dma-channels = <16>;
 867                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 868                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 869                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 870                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 871                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 872                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 873                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 874                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 875                 };
 876
 877                 ipmmu_ds0: mmu@e6740000 {
 878                         compatible = "renesas,ipmmu-r8a774b1";
 879                         reg = <0 0xe6740000 0 0x1000>;
 880                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 881                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 882                         #iommu-cells = <1>;
 883                 };
 884
 885                 ipmmu_ds1: mmu@e7740000 {
 886                         compatible = "renesas,ipmmu-r8a774b1";
 887                         reg = <0 0xe7740000 0 0x1000>;
 888                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 889                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 890                         #iommu-cells = <1>;
 891                 };
 892
 893                 ipmmu_hc: mmu@e6570000 {
 894                         compatible = "renesas,ipmmu-r8a774b1";
 895                         reg = <0 0xe6570000 0 0x1000>;
 896                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 897                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 898                         #iommu-cells = <1>;
 899                 };
 900
 901                 ipmmu_mm: mmu@e67b0000 {
 902                         compatible = "renesas,ipmmu-r8a774b1";
 903                         reg = <0 0xe67b0000 0 0x1000>;
 904                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 905                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 906                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 907                         #iommu-cells = <1>;
 908                 };
 909
 910                 ipmmu_mp: mmu@ec670000 {
 911                         compatible = "renesas,ipmmu-r8a774b1";
 912                         reg = <0 0xec670000 0 0x1000>;
 913                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 914                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 915                         #iommu-cells = <1>;
 916                 };
 917
 918                 ipmmu_pv0: mmu@fd800000 {
 919                         compatible = "renesas,ipmmu-r8a774b1";
 920                         reg = <0 0xfd800000 0 0x1000>;
 921                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 922                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 923                         #iommu-cells = <1>;
 924                 };
 925
 926                 ipmmu_vc0: mmu@fe6b0000 {
 927                         compatible = "renesas,ipmmu-r8a774b1";
 928                         reg = <0 0xfe6b0000 0 0x1000>;
 929                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 930                         power-domains = <&sysc R8A774B1_PD_A3VC>;
 931                         #iommu-cells = <1>;
 932                 };
 933
 934                 ipmmu_vi0: mmu@febd0000 {
 935                         compatible = "renesas,ipmmu-r8a774b1";
 936                         reg = <0 0xfebd0000 0 0x1000>;
 937                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 938                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 939                         #iommu-cells = <1>;
 940                 };
 941
 942                 ipmmu_vp0: mmu@fe990000 {
 943                         compatible = "renesas,ipmmu-r8a774b1";
 944                         reg = <0 0xfe990000 0 0x1000>;
 945                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 946                         power-domains = <&sysc R8A774B1_PD_A3VP>;
 947                         #iommu-cells = <1>;
 948                 };
 949
 950                 avb: ethernet@e6800000 {
 951                         compatible = "renesas,etheravb-r8a774b1",
 952                                      "renesas,etheravb-rcar-gen3";
 953                         reg = <0 0xe6800000 0 0x800>;
 954                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 955                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 956                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 957                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 958                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 959                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 960                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 961                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 962                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 963                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 964                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 965                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 966                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 967                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 968                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 969                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 970                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 971                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 972                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 979                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 980                                           "ch4", "ch5", "ch6", "ch7",
 981                                           "ch8", "ch9", "ch10", "ch11",
 982                                           "ch12", "ch13", "ch14", "ch15",
 983                                           "ch16", "ch17", "ch18", "ch19",
 984                                           "ch20", "ch21", "ch22", "ch23",
 985                                           "ch24";
 986                         clocks = <&cpg CPG_MOD 812>;
 987                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
 988                         resets = <&cpg 812>;
 989                         phy-mode = "rgmii";
 990                         iommus = <&ipmmu_ds0 16>;
 991                         #address-cells = <1>;
 992                         #size-cells = <0>;
 993                         status = "disabled";
 994                 };
 995
 996                 can0: can@e6c30000 {
 997                         reg = <0 0xe6c30000 0 0x1000>;
 998                         /* placeholder */
 999                 };
1000
1001                 can1: can@e6c38000 {
1002                         reg = <0 0xe6c38000 0 0x1000>;
1003                         /* placeholder */
1004                 };
1005
1006                 canfd: can@e66c0000 {
1007                         reg = <0 0xe66c0000 0 0x8000>;
1008                         /* placeholder */
1009                 };
1010
1011                 pwm0: pwm@e6e30000 {
1012                         compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1013                         reg = <0 0xe6e30000 0 0x8>;
1014                         #pwm-cells = <2>;
1015                         clocks = <&cpg CPG_MOD 523>;
1016                         resets = <&cpg 523>;
1017                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1018                         status = "disabled";
1019                 };
1020
1021                 pwm1: pwm@e6e31000 {
1022                         compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1023                         reg = <0 0xe6e31000 0 0x8>;
1024                         #pwm-cells = <2>;
1025                         clocks = <&cpg CPG_MOD 523>;
1026                         resets = <&cpg 523>;
1027                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1028                         status = "disabled";
1029                 };
1030
1031                 pwm2: pwm@e6e32000 {
1032                         compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1033                         reg = <0 0xe6e32000 0 0x8>;
1034                         #pwm-cells = <2>;
1035                         clocks = <&cpg CPG_MOD 523>;
1036                         resets = <&cpg 523>;
1037                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1038                         status = "disabled";
1039                 };
1040
1041                 pwm3: pwm@e6e33000 {
1042                         compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1043                         reg = <0 0xe6e33000 0 0x8>;
1044                         #pwm-cells = <2>;
1045                         clocks = <&cpg CPG_MOD 523>;
1046                         resets = <&cpg 523>;
1047                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1048                         status = "disabled";
1049                 };
1050
1051                 pwm4: pwm@e6e34000 {
1052                         compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1053                         reg = <0 0xe6e34000 0 0x8>;
1054                         #pwm-cells = <2>;
1055                         clocks = <&cpg CPG_MOD 523>;
1056                         resets = <&cpg 523>;
1057                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1058                         status = "disabled";
1059                 };
1060
1061                 pwm5: pwm@e6e35000 {
1062                         compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1063                         reg = <0 0xe6e35000 0 0x8>;
1064                         #pwm-cells = <2>;
1065                         clocks = <&cpg CPG_MOD 523>;
1066                         resets = <&cpg 523>;
1067                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1068                         status = "disabled";
1069                 };
1070
1071                 pwm6: pwm@e6e36000 {
1072                         compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar";
1073                         reg = <0 0xe6e36000 0 0x8>;
1074                         #pwm-cells = <2>;
1075                         clocks = <&cpg CPG_MOD 523>;
1076                         resets = <&cpg 523>;
1077                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1078                         status = "disabled";
1079                 };
1080
1081                 scif0: serial@e6e60000 {
1082                         compatible = "renesas,scif-r8a774b1",
1083                                      "renesas,rcar-gen3-scif", "renesas,scif";
1084                         reg = <0 0xe6e60000 0 0x40>;
1085                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1086                         clocks = <&cpg CPG_MOD 207>,
1087                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1088                                  <&scif_clk>;
1089                         clock-names = "fck", "brg_int", "scif_clk";
1090                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1091                                <&dmac2 0x51>, <&dmac2 0x50>;
1092                         dma-names = "tx", "rx", "tx", "rx";
1093                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1094                         resets = <&cpg 207>;
1095                         status = "disabled";
1096                 };
1097
1098                 scif1: serial@e6e68000 {
1099                         compatible = "renesas,scif-r8a774b1",
1100                                      "renesas,rcar-gen3-scif", "renesas,scif";
1101                         reg = <0 0xe6e68000 0 0x40>;
1102                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1103                         clocks = <&cpg CPG_MOD 206>,
1104                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1105                                  <&scif_clk>;
1106                         clock-names = "fck", "brg_int", "scif_clk";
1107                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1108                                <&dmac2 0x53>, <&dmac2 0x52>;
1109                         dma-names = "tx", "rx", "tx", "rx";
1110                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1111                         resets = <&cpg 206>;
1112                         status = "disabled";
1113                 };
1114
1115                 scif2: serial@e6e88000 {
1116                         compatible = "renesas,scif-r8a774b1",
1117                                      "renesas,rcar-gen3-scif", "renesas,scif";
1118                         reg = <0 0xe6e88000 0 0x40>;
1119                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1120                         clocks = <&cpg CPG_MOD 310>,
1121                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1122                                  <&scif_clk>;
1123                         clock-names = "fck", "brg_int", "scif_clk";
1124                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1125                                <&dmac2 0x13>, <&dmac2 0x12>;
1126                         dma-names = "tx", "rx", "tx", "rx";
1127                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1128                         resets = <&cpg 310>;
1129                         status = "disabled";
1130                 };
1131
1132                 scif3: serial@e6c50000 {
1133                         compatible = "renesas,scif-r8a774b1",
1134                                      "renesas,rcar-gen3-scif", "renesas,scif";
1135                         reg = <0 0xe6c50000 0 0x40>;
1136                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1137                         clocks = <&cpg CPG_MOD 204>,
1138                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1139                                  <&scif_clk>;
1140                         clock-names = "fck", "brg_int", "scif_clk";
1141                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1142                         dma-names = "tx", "rx";
1143                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1144                         resets = <&cpg 204>;
1145                         status = "disabled";
1146                 };
1147
1148                 scif4: serial@e6c40000 {
1149                         compatible = "renesas,scif-r8a774b1",
1150                                      "renesas,rcar-gen3-scif", "renesas,scif";
1151                         reg = <0 0xe6c40000 0 0x40>;
1152                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1153                         clocks = <&cpg CPG_MOD 203>,
1154                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1155                                  <&scif_clk>;
1156                         clock-names = "fck", "brg_int", "scif_clk";
1157                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1158                         dma-names = "tx", "rx";
1159                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1160                         resets = <&cpg 203>;
1161                         status = "disabled";
1162                 };
1163
1164                 scif5: serial@e6f30000 {
1165                         compatible = "renesas,scif-r8a774b1",
1166                                      "renesas,rcar-gen3-scif", "renesas,scif";
1167                         reg = <0 0xe6f30000 0 0x40>;
1168                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1169                         clocks = <&cpg CPG_MOD 202>,
1170                                  <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1171                                  <&scif_clk>;
1172                         clock-names = "fck", "brg_int", "scif_clk";
1173                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1174                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1175                         dma-names = "tx", "rx", "tx", "rx";
1176                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1177                         resets = <&cpg 202>;
1178                         status = "disabled";
1179                 };
1180
1181                 msiof0: spi@e6e90000 {
1182                         compatible = "renesas,msiof-r8a774b1",
1183                                      "renesas,rcar-gen3-msiof";
1184                         reg = <0 0xe6e90000 0 0x0064>;
1185                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1186                         clocks = <&cpg CPG_MOD 211>;
1187                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1188                                <&dmac2 0x41>, <&dmac2 0x40>;
1189                         dma-names = "tx", "rx", "tx", "rx";
1190                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1191                         resets = <&cpg 211>;
1192                         #address-cells = <1>;
1193                         #size-cells = <0>;
1194                         status = "disabled";
1195                 };
1196
1197                 msiof1: spi@e6ea0000 {
1198                         compatible = "renesas,msiof-r8a774b1",
1199                                      "renesas,rcar-gen3-msiof";
1200                         reg = <0 0xe6ea0000 0 0x0064>;
1201                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1202                         clocks = <&cpg CPG_MOD 210>;
1203                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1204                                <&dmac2 0x43>, <&dmac2 0x42>;
1205                         dma-names = "tx", "rx", "tx", "rx";
1206                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1207                         resets = <&cpg 210>;
1208                         #address-cells = <1>;
1209                         #size-cells = <0>;
1210                         status = "disabled";
1211                 };
1212
1213                 msiof2: spi@e6c00000 {
1214                         compatible = "renesas,msiof-r8a774b1",
1215                                      "renesas,rcar-gen3-msiof";
1216                         reg = <0 0xe6c00000 0 0x0064>;
1217                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1218                         clocks = <&cpg CPG_MOD 209>;
1219                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1220                         dma-names = "tx", "rx";
1221                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1222                         resets = <&cpg 209>;
1223                         #address-cells = <1>;
1224                         #size-cells = <0>;
1225                         status = "disabled";
1226                 };
1227
1228                 msiof3: spi@e6c10000 {
1229                         compatible = "renesas,msiof-r8a774b1",
1230                                      "renesas,rcar-gen3-msiof";
1231                         reg = <0 0xe6c10000 0 0x0064>;
1232                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1233                         clocks = <&cpg CPG_MOD 208>;
1234                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1235                         dma-names = "tx", "rx";
1236                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1237                         resets = <&cpg 208>;
1238                         #address-cells = <1>;
1239                         #size-cells = <0>;
1240                         status = "disabled";
1241                 };
1242
1243                 rcar_sound: sound@ec500000 {
1244                         /*
1245                          * #sound-dai-cells is required
1246                          *
1247                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1248                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1249                          */
1250                         /*
1251                          * #clock-cells is required for audio_clkout0/1/2/3
1252                          *
1253                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1254                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1255                          */
1256                         compatible =  "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3";
1257                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1258                               <0 0xec5a0000 0 0x100>,  /* ADG */
1259                               <0 0xec540000 0 0x1000>, /* SSIU */
1260                               <0 0xec541000 0 0x280>,  /* SSI */
1261                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1262                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1263
1264                         clocks = <&cpg CPG_MOD 1005>,
1265                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1266                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1267                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1268                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1269                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1270                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1271                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1272                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1273                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1274                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1275                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1276                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1277                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1278                                  <&audio_clk_a>, <&audio_clk_b>,
1279                                  <&audio_clk_c>,
1280                                  <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
1281                         clock-names = "ssi-all",
1282                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1283                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1284                                       "ssi.1", "ssi.0",
1285                                       "src.9", "src.8", "src.7", "src.6",
1286                                       "src.5", "src.4", "src.3", "src.2",
1287                                       "src.1", "src.0",
1288                                       "mix.1", "mix.0",
1289                                       "ctu.1", "ctu.0",
1290                                       "dvc.0", "dvc.1",
1291                                       "clk_a", "clk_b", "clk_c", "clk_i";
1292                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1293                         resets = <&cpg 1005>,
1294                                  <&cpg 1006>, <&cpg 1007>,
1295                                  <&cpg 1008>, <&cpg 1009>,
1296                                  <&cpg 1010>, <&cpg 1011>,
1297                                  <&cpg 1012>, <&cpg 1013>,
1298                                  <&cpg 1014>, <&cpg 1015>;
1299                         reset-names = "ssi-all",
1300                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1301                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1302                                       "ssi.1", "ssi.0";
1303                         status = "disabled";
1304
1305                         rcar_sound,ctu {
1306                                 ctu00: ctu-0 { };
1307                                 ctu01: ctu-1 { };
1308                                 ctu02: ctu-2 { };
1309                                 ctu03: ctu-3 { };
1310                                 ctu10: ctu-4 { };
1311                                 ctu11: ctu-5 { };
1312                                 ctu12: ctu-6 { };
1313                                 ctu13: ctu-7 { };
1314                         };
1315
1316                         rcar_sound,dvc {
1317                                 dvc0: dvc-0 {
1318                                         dmas = <&audma1 0xbc>;
1319                                         dma-names = "tx";
1320                                 };
1321                                 dvc1: dvc-1 {
1322                                         dmas = <&audma1 0xbe>;
1323                                         dma-names = "tx";
1324                                 };
1325                         };
1326
1327                         rcar_sound,mix {
1328                                 mix0: mix-0 { };
1329                                 mix1: mix-1 { };
1330                         };
1331
1332                         rcar_sound,src {
1333                                 src0: src-0 {
1334                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1335                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1336                                         dma-names = "rx", "tx";
1337                                 };
1338                                 src1: src-1 {
1339                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1340                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1341                                         dma-names = "rx", "tx";
1342                                 };
1343                                 src2: src-2 {
1344                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1345                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1346                                         dma-names = "rx", "tx";
1347                                 };
1348                                 src3: src-3 {
1349                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1350                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1351                                         dma-names = "rx", "tx";
1352                                 };
1353                                 src4: src-4 {
1354                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1355                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1356                                         dma-names = "rx", "tx";
1357                                 };
1358                                 src5: src-5 {
1359                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1360                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1361                                         dma-names = "rx", "tx";
1362                                 };
1363                                 src6: src-6 {
1364                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1365                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1366                                         dma-names = "rx", "tx";
1367                                 };
1368                                 src7: src-7 {
1369                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1370                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1371                                         dma-names = "rx", "tx";
1372                                 };
1373                                 src8: src-8 {
1374                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1375                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1376                                         dma-names = "rx", "tx";
1377                                 };
1378                                 src9: src-9 {
1379                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1380                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1381                                         dma-names = "rx", "tx";
1382                                 };
1383                         };
1384
1385                         rcar_sound,ssi {
1386                                 ssi0: ssi-0 {
1387                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1388                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
1389                                         dma-names = "rx", "tx";
1390                                 };
1391                                 ssi1: ssi-1 {
1392                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1393                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
1394                                         dma-names = "rx", "tx";
1395                                 };
1396                                 ssi2: ssi-2 {
1397                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1398                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
1399                                         dma-names = "rx", "tx";
1400                                 };
1401                                 ssi3: ssi-3 {
1402                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1403                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
1404                                         dma-names = "rx", "tx";
1405                                 };
1406                                 ssi4: ssi-4 {
1407                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1408                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
1409                                         dma-names = "rx", "tx";
1410                                 };
1411                                 ssi5: ssi-5 {
1412                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1413                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1414                                         dma-names = "rx", "tx";
1415                                 };
1416                                 ssi6: ssi-6 {
1417                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1418                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1419                                         dma-names = "rx", "tx";
1420                                 };
1421                                 ssi7: ssi-7 {
1422                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1423                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
1424                                         dma-names = "rx", "tx";
1425                                 };
1426                                 ssi8: ssi-8 {
1427                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1428                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
1429                                         dma-names = "rx", "tx";
1430                                 };
1431                                 ssi9: ssi-9 {
1432                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1433                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
1434                                         dma-names = "rx", "tx";
1435                                 };
1436                         };
1437
1438                         rcar_sound,ssiu {
1439                                 ssiu00: ssiu-0 {
1440                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
1441                                         dma-names = "rx", "tx";
1442                                 };
1443                                 ssiu01: ssiu-1 {
1444                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
1445                                         dma-names = "rx", "tx";
1446                                 };
1447                                 ssiu02: ssiu-2 {
1448                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
1449                                         dma-names = "rx", "tx";
1450                                 };
1451                                 ssiu03: ssiu-3 {
1452                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
1453                                         dma-names = "rx", "tx";
1454                                 };
1455                                 ssiu04: ssiu-4 {
1456                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
1457                                         dma-names = "rx", "tx";
1458                                 };
1459                                 ssiu05: ssiu-5 {
1460                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
1461                                         dma-names = "rx", "tx";
1462                                 };
1463                                 ssiu06: ssiu-6 {
1464                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
1465                                         dma-names = "rx", "tx";
1466                                 };
1467                                 ssiu07: ssiu-7 {
1468                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
1469                                         dma-names = "rx", "tx";
1470                                 };
1471                                 ssiu10: ssiu-8 {
1472                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
1473                                         dma-names = "rx", "tx";
1474                                 };
1475                                 ssiu11: ssiu-9 {
1476                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1477                                         dma-names = "rx", "tx";
1478                                 };
1479                                 ssiu12: ssiu-10 {
1480                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
1481                                         dma-names = "rx", "tx";
1482                                 };
1483                                 ssiu13: ssiu-11 {
1484                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
1485                                         dma-names = "rx", "tx";
1486                                 };
1487                                 ssiu14: ssiu-12 {
1488                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
1489                                         dma-names = "rx", "tx";
1490                                 };
1491                                 ssiu15: ssiu-13 {
1492                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1493                                         dma-names = "rx", "tx";
1494                                 };
1495                                 ssiu16: ssiu-14 {
1496                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
1497                                         dma-names = "rx", "tx";
1498                                 };
1499                                 ssiu17: ssiu-15 {
1500                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
1501                                         dma-names = "rx", "tx";
1502                                 };
1503                                 ssiu20: ssiu-16 {
1504                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
1505                                         dma-names = "rx", "tx";
1506                                 };
1507                                 ssiu21: ssiu-17 {
1508                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
1509                                         dma-names = "rx", "tx";
1510                                 };
1511                                 ssiu22: ssiu-18 {
1512                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
1513                                         dma-names = "rx", "tx";
1514                                 };
1515                                 ssiu23: ssiu-19 {
1516                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
1517                                         dma-names = "rx", "tx";
1518                                 };
1519                                 ssiu24: ssiu-20 {
1520                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
1521                                         dma-names = "rx", "tx";
1522                                 };
1523                                 ssiu25: ssiu-21 {
1524                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
1525                                         dma-names = "rx", "tx";
1526                                 };
1527                                 ssiu26: ssiu-22 {
1528                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
1529                                         dma-names = "rx", "tx";
1530                                 };
1531                                 ssiu27: ssiu-23 {
1532                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
1533                                         dma-names = "rx", "tx";
1534                                 };
1535                                 ssiu30: ssiu-24 {
1536                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
1537                                         dma-names = "rx", "tx";
1538                                 };
1539                                 ssiu31: ssiu-25 {
1540                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
1541                                         dma-names = "rx", "tx";
1542                                 };
1543                                 ssiu32: ssiu-26 {
1544                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
1545                                         dma-names = "rx", "tx";
1546                                 };
1547                                 ssiu33: ssiu-27 {
1548                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
1549                                         dma-names = "rx", "tx";
1550                                 };
1551                                 ssiu34: ssiu-28 {
1552                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
1553                                         dma-names = "rx", "tx";
1554                                 };
1555                                 ssiu35: ssiu-29 {
1556                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
1557                                         dma-names = "rx", "tx";
1558                                 };
1559                                 ssiu36: ssiu-30 {
1560                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
1561                                         dma-names = "rx", "tx";
1562                                 };
1563                                 ssiu37: ssiu-31 {
1564                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
1565                                         dma-names = "rx", "tx";
1566                                 };
1567                                 ssiu40: ssiu-32 {
1568                                         dmas =  <&audma0 0x71>, <&audma1 0x72>;
1569                                         dma-names = "rx", "tx";
1570                                 };
1571                                 ssiu41: ssiu-33 {
1572                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
1573                                         dma-names = "rx", "tx";
1574                                 };
1575                                 ssiu42: ssiu-34 {
1576                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
1577                                         dma-names = "rx", "tx";
1578                                 };
1579                                 ssiu43: ssiu-35 {
1580                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
1581                                         dma-names = "rx", "tx";
1582                                 };
1583                                 ssiu44: ssiu-36 {
1584                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
1585                                         dma-names = "rx", "tx";
1586                                 };
1587                                 ssiu45: ssiu-37 {
1588                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
1589                                         dma-names = "rx", "tx";
1590                                 };
1591                                 ssiu46: ssiu-38 {
1592                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
1593                                         dma-names = "rx", "tx";
1594                                 };
1595                                 ssiu47: ssiu-39 {
1596                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
1597                                         dma-names = "rx", "tx";
1598                                 };
1599                                 ssiu50: ssiu-40 {
1600                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
1601                                         dma-names = "rx", "tx";
1602                                 };
1603                                 ssiu60: ssiu-41 {
1604                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
1605                                         dma-names = "rx", "tx";
1606                                 };
1607                                 ssiu70: ssiu-42 {
1608                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
1609                                         dma-names = "rx", "tx";
1610                                 };
1611                                 ssiu80: ssiu-43 {
1612                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
1613                                         dma-names = "rx", "tx";
1614                                 };
1615                                 ssiu90: ssiu-44 {
1616                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
1617                                         dma-names = "rx", "tx";
1618                                 };
1619                                 ssiu91: ssiu-45 {
1620                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
1621                                         dma-names = "rx", "tx";
1622                                 };
1623                                 ssiu92: ssiu-46 {
1624                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
1625                                         dma-names = "rx", "tx";
1626                                 };
1627                                 ssiu93: ssiu-47 {
1628                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
1629                                         dma-names = "rx", "tx";
1630                                 };
1631                                 ssiu94: ssiu-48 {
1632                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
1633                                         dma-names = "rx", "tx";
1634                                 };
1635                                 ssiu95: ssiu-49 {
1636                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
1637                                         dma-names = "rx", "tx";
1638                                 };
1639                                 ssiu96: ssiu-50 {
1640                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
1641                                         dma-names = "rx", "tx";
1642                                 };
1643                                 ssiu97: ssiu-51 {
1644                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
1645                                         dma-names = "rx", "tx";
1646                                 };
1647                         };
1648                 };
1649
1650                 audma0: dma-controller@ec700000 {
1651                         compatible = "renesas,dmac-r8a774b1",
1652                                      "renesas,rcar-dmac";
1653                         reg = <0 0xec700000 0 0x10000>;
1654                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
1655                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
1656                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
1657                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
1658                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
1659                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
1660                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
1661                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
1662                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
1663                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
1664                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
1665                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
1666                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
1667                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
1668                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
1669                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
1670                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1671                         interrupt-names = "error",
1672                                         "ch0", "ch1", "ch2", "ch3",
1673                                         "ch4", "ch5", "ch6", "ch7",
1674                                         "ch8", "ch9", "ch10", "ch11",
1675                                         "ch12", "ch13", "ch14", "ch15";
1676                         clocks = <&cpg CPG_MOD 502>;
1677                         clock-names = "fck";
1678                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1679                         resets = <&cpg 502>;
1680                         #dma-cells = <1>;
1681                         dma-channels = <16>;
1682                 };
1683
1684                 audma1: dma-controller@ec720000 {
1685                         compatible = "renesas,dmac-r8a774b1",
1686                                      "renesas,rcar-dmac";
1687                         reg = <0 0xec720000 0 0x10000>;
1688                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
1689                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
1690                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
1691                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
1692                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
1693                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
1694                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
1695                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
1696                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
1697                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
1698                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
1699                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
1700                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
1701                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
1702                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
1703                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
1704                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
1705                         interrupt-names = "error",
1706                                         "ch0", "ch1", "ch2", "ch3",
1707                                         "ch4", "ch5", "ch6", "ch7",
1708                                         "ch8", "ch9", "ch10", "ch11",
1709                                         "ch12", "ch13", "ch14", "ch15";
1710                         clocks = <&cpg CPG_MOD 501>;
1711                         clock-names = "fck";
1712                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1713                         resets = <&cpg 501>;
1714                         #dma-cells = <1>;
1715                         dma-channels = <16>;
1716                 };
1717
1718                 xhci0: usb@ee000000 {
1719                         compatible = "renesas,xhci-r8a774b1",
1720                                      "renesas,rcar-gen3-xhci";
1721                         reg = <0 0xee000000 0 0xc00>;
1722                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1723                         clocks = <&cpg CPG_MOD 328>;
1724                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1725                         resets = <&cpg 328>;
1726                         status = "disabled";
1727                 };
1728
1729                 usb3_peri0: usb@ee020000 {
1730                         compatible = "renesas,r8a774b1-usb3-peri",
1731                                      "renesas,rcar-gen3-usb3-peri";
1732                         reg = <0 0xee020000 0 0x400>;
1733                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1734                         clocks = <&cpg CPG_MOD 328>;
1735                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1736                         resets = <&cpg 328>;
1737                         status = "disabled";
1738                 };
1739
1740                 ohci0: usb@ee080000 {
1741                         compatible = "generic-ohci";
1742                         reg = <0 0xee080000 0 0x100>;
1743                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1744                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1745                         phys = <&usb2_phy0 1>;
1746                         phy-names = "usb";
1747                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1748                         resets = <&cpg 703>, <&cpg 704>;
1749                         status = "disabled";
1750                 };
1751
1752                 ohci1: usb@ee0a0000 {
1753                         compatible = "generic-ohci";
1754                         reg = <0 0xee0a0000 0 0x100>;
1755                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1756                         clocks = <&cpg CPG_MOD 702>;
1757                         phys = <&usb2_phy1 1>;
1758                         phy-names = "usb";
1759                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1760                         resets = <&cpg 702>;
1761                         status = "disabled";
1762                 };
1763
1764                 ehci0: usb@ee080100 {
1765                         compatible = "generic-ehci";
1766                         reg = <0 0xee080100 0 0x100>;
1767                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1768                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1769                         phys = <&usb2_phy0 2>;
1770                         phy-names = "usb";
1771                         companion = <&ohci0>;
1772                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1773                         resets = <&cpg 703>, <&cpg 704>;
1774                         status = "disabled";
1775                 };
1776
1777                 ehci1: usb@ee0a0100 {
1778                         compatible = "generic-ehci";
1779                         reg = <0 0xee0a0100 0 0x100>;
1780                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1781                         clocks = <&cpg CPG_MOD 702>;
1782                         phys = <&usb2_phy1 2>;
1783                         phy-names = "usb";
1784                         companion = <&ohci1>;
1785                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1786                         resets = <&cpg 702>;
1787                         status = "disabled";
1788                 };
1789
1790                 usb2_phy0: usb-phy@ee080200 {
1791                         compatible = "renesas,usb2-phy-r8a774b1",
1792                                      "renesas,rcar-gen3-usb2-phy";
1793                         reg = <0 0xee080200 0 0x700>;
1794                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1795                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1796                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1797                         resets = <&cpg 703>, <&cpg 704>;
1798                         #phy-cells = <1>;
1799                         status = "disabled";
1800                 };
1801
1802                 usb2_phy1: usb-phy@ee0a0200 {
1803                         compatible = "renesas,usb2-phy-r8a774b1",
1804                                      "renesas,rcar-gen3-usb2-phy";
1805                         reg = <0 0xee0a0200 0 0x700>;
1806                         clocks = <&cpg CPG_MOD 702>;
1807                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1808                         resets = <&cpg 702>;
1809                         #phy-cells = <1>;
1810                         status = "disabled";
1811                 };
1812
1813                 sdhi0: sd@ee100000 {
1814                         compatible = "renesas,sdhi-r8a774b1",
1815                                      "renesas,rcar-gen3-sdhi";
1816                         reg = <0 0xee100000 0 0x2000>;
1817                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1818                         clocks = <&cpg CPG_MOD 314>;
1819                         max-frequency = <200000000>;
1820                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1821                         resets = <&cpg 314>;
1822                         status = "disabled";
1823                 };
1824
1825                 sdhi1: sd@ee120000 {
1826                         compatible = "renesas,sdhi-r8a774b1",
1827                                      "renesas,rcar-gen3-sdhi";
1828                         reg = <0 0xee120000 0 0x2000>;
1829                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1830                         clocks = <&cpg CPG_MOD 313>;
1831                         max-frequency = <200000000>;
1832                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1833                         resets = <&cpg 313>;
1834                         status = "disabled";
1835                 };
1836
1837                 sdhi2: sd@ee140000 {
1838                         compatible = "renesas,sdhi-r8a774b1",
1839                                      "renesas,rcar-gen3-sdhi";
1840                         reg = <0 0xee140000 0 0x2000>;
1841                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1842                         clocks = <&cpg CPG_MOD 312>;
1843                         max-frequency = <200000000>;
1844                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1845                         resets = <&cpg 312>;
1846                         status = "disabled";
1847                 };
1848
1849                 sdhi3: sd@ee160000 {
1850                         compatible = "renesas,sdhi-r8a774b1",
1851                                      "renesas,rcar-gen3-sdhi";
1852                         reg = <0 0xee160000 0 0x2000>;
1853                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1854                         clocks = <&cpg CPG_MOD 311>;
1855                         max-frequency = <200000000>;
1856                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1857                         resets = <&cpg 311>;
1858                         status = "disabled";
1859                 };
1860
1861                 gic: interrupt-controller@f1010000 {
1862                         compatible = "arm,gic-400";
1863                         #interrupt-cells = <3>;
1864                         #address-cells = <0>;
1865                         interrupt-controller;
1866                         reg = <0x0 0xf1010000 0 0x1000>,
1867                               <0x0 0xf1020000 0 0x20000>,
1868                               <0x0 0xf1040000 0 0x20000>,
1869                               <0x0 0xf1060000 0 0x20000>;
1870                         interrupts = <GIC_PPI 9
1871                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1872                         clocks = <&cpg CPG_MOD 408>;
1873                         clock-names = "clk";
1874                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1875                         resets = <&cpg 408>;
1876                 };
1877
1878                 pciec0: pcie@fe000000 {
1879                         compatible = "renesas,pcie-r8a774b1",
1880                                      "renesas,pcie-rcar-gen3";
1881                         reg = <0 0xfe000000 0 0x80000>;
1882                         #address-cells = <3>;
1883                         #size-cells = <2>;
1884                         bus-range = <0x00 0xff>;
1885                         device_type = "pci";
1886                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1887                                   0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1888                                   0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1889                                   0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1890                         /* Map all possible DDR as inbound ranges */
1891                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1892                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1893                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1894                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1895                         #interrupt-cells = <1>;
1896                         interrupt-map-mask = <0 0 0 0>;
1897                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1898                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1899                         clock-names = "pcie", "pcie_bus";
1900                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1901                         resets = <&cpg 319>;
1902                         status = "disabled";
1903                 };
1904
1905                 pciec1: pcie@ee800000 {
1906                         compatible = "renesas,pcie-r8a774b1",
1907                                      "renesas,pcie-rcar-gen3";
1908                         reg = <0 0xee800000 0 0x80000>;
1909                         #address-cells = <3>;
1910                         #size-cells = <2>;
1911                         bus-range = <0x00 0xff>;
1912                         device_type = "pci";
1913                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1914                                   0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1915                                   0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1916                                   0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1917                         /* Map all possible DDR as inbound ranges */
1918                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
1919                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1920                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1921                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1922                         #interrupt-cells = <1>;
1923                         interrupt-map-mask = <0 0 0 0>;
1924                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1925                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1926                         clock-names = "pcie", "pcie_bus";
1927                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1928                         resets = <&cpg 318>;
1929                         status = "disabled";
1930                 };
1931
1932                 fdp1@fe940000 {
1933                         compatible = "renesas,fdp1";
1934                         reg = <0 0xfe940000 0 0x2400>;
1935                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1936                         clocks = <&cpg CPG_MOD 119>;
1937                         power-domains = <&sysc R8A774B1_PD_A3VP>;
1938                         resets = <&cpg 119>;
1939                         renesas,fcp = <&fcpf0>;
1940                 };
1941
1942                 fcpf0: fcp@fe950000 {
1943                         compatible = "renesas,fcpf";
1944                         reg = <0 0xfe950000 0 0x200>;
1945                         clocks = <&cpg CPG_MOD 615>;
1946                         power-domains = <&sysc R8A774B1_PD_A3VP>;
1947                         resets = <&cpg 615>;
1948                 };
1949
1950                 vspb: vsp@fe960000 {
1951                         compatible = "renesas,vsp2";
1952                         reg = <0 0xfe960000 0 0x8000>;
1953                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1954                         clocks = <&cpg CPG_MOD 626>;
1955                         power-domains = <&sysc R8A774B1_PD_A3VP>;
1956                         resets = <&cpg 626>;
1957
1958                         renesas,fcp = <&fcpvb0>;
1959                 };
1960
1961                 vspi0: vsp@fe9a0000 {
1962                         compatible = "renesas,vsp2";
1963                         reg = <0 0xfe9a0000 0 0x8000>;
1964                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1965                         clocks = <&cpg CPG_MOD 631>;
1966                         power-domains = <&sysc R8A774B1_PD_A3VP>;
1967                         resets = <&cpg 631>;
1968
1969                         renesas,fcp = <&fcpvi0>;
1970                 };
1971
1972                 vspd0: vsp@fea20000 {
1973                         compatible = "renesas,vsp2";
1974                         reg = <0 0xfea20000 0 0x5000>;
1975                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1976                         clocks = <&cpg CPG_MOD 623>;
1977                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1978                         resets = <&cpg 623>;
1979
1980                         renesas,fcp = <&fcpvd0>;
1981                 };
1982
1983                 vspd1: vsp@fea28000 {
1984                         compatible = "renesas,vsp2";
1985                         reg = <0 0xfea28000 0 0x5000>;
1986                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1987                         clocks = <&cpg CPG_MOD 622>;
1988                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
1989                         resets = <&cpg 622>;
1990
1991                         renesas,fcp = <&fcpvd1>;
1992                 };
1993
1994                 fcpvb0: fcp@fe96f000 {
1995                         compatible = "renesas,fcpv";
1996                         reg = <0 0xfe96f000 0 0x200>;
1997                         clocks = <&cpg CPG_MOD 607>;
1998                         power-domains = <&sysc R8A774B1_PD_A3VP>;
1999                         resets = <&cpg 607>;
2000                 };
2001
2002                 fcpvd0: fcp@fea27000 {
2003                         compatible = "renesas,fcpv";
2004                         reg = <0 0xfea27000 0 0x200>;
2005                         clocks = <&cpg CPG_MOD 603>;
2006                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2007                         resets = <&cpg 603>;
2008                 };
2009
2010                 fcpvd1: fcp@fea2f000 {
2011                         compatible = "renesas,fcpv";
2012                         reg = <0 0xfea2f000 0 0x200>;
2013                         clocks = <&cpg CPG_MOD 602>;
2014                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2015                         resets = <&cpg 602>;
2016                 };
2017
2018                 fcpvi0: fcp@fe9af000 {
2019                         compatible = "renesas,fcpv";
2020                         reg = <0 0xfe9af000 0 0x200>;
2021                         clocks = <&cpg CPG_MOD 611>;
2022                         power-domains = <&sysc R8A774B1_PD_A3VP>;
2023                         resets = <&cpg 611>;
2024                 };
2025
2026                 hdmi0: hdmi@fead0000 {
2027                         compatible = "renesas,r8a774b1-hdmi",
2028                                      "renesas,rcar-gen3-hdmi";
2029                         reg = <0 0xfead0000 0 0x10000>;
2030                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2031                         clocks = <&cpg CPG_MOD 729>,
2032                                  <&cpg CPG_CORE R8A774B1_CLK_HDMI>;
2033                         clock-names = "iahb", "isfr";
2034                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2035                         resets = <&cpg 729>;
2036                         status = "disabled";
2037
2038                         ports {
2039                                 #address-cells = <1>;
2040                                 #size-cells = <0>;
2041
2042                                 port@0 {
2043                                         reg = <0>;
2044                                         dw_hdmi0_in: endpoint {
2045                                                 remote-endpoint = <&du_out_hdmi0>;
2046                                         };
2047                                 };
2048                                 port@1 {
2049                                         reg = <1>;
2050                                 };
2051                                 port@2 {
2052                                         /* HDMI sound */
2053                                         reg = <2>;
2054                                 };
2055                         };
2056                 };
2057
2058                 du: display@feb00000 {
2059                         compatible = "renesas,du-r8a774b1";
2060                         reg = <0 0xfeb00000 0 0x80000>;
2061                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2062                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2063                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
2064                         clocks = <&cpg CPG_MOD 724>,
2065                                  <&cpg CPG_MOD 723>,
2066                                  <&cpg CPG_MOD 721>;
2067                         clock-names = "du.0", "du.1", "du.3";
2068                         status = "disabled";
2069
2070                         vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
2071
2072                         ports {
2073                                 #address-cells = <1>;
2074                                 #size-cells = <0>;
2075
2076                                 port@0 {
2077                                         reg = <0>;
2078                                         du_out_rgb: endpoint {
2079                                         };
2080                                 };
2081                                 port@1 {
2082                                         reg = <1>;
2083                                         du_out_hdmi0: endpoint {
2084                                                 remote-endpoint = <&dw_hdmi0_in>;
2085                                         };
2086                                 };
2087                                 port@2 {
2088                                         reg = <2>;
2089                                         du_out_lvds0: endpoint {
2090                                                 remote-endpoint = <&lvds0_in>;
2091                                         };
2092                                 };
2093                         };
2094                 };
2095
2096                 lvds0: lvds@feb90000 {
2097                         compatible = "renesas,r8a774b1-lvds";
2098                         reg = <0 0xfeb90000 0 0x14>;
2099                         clocks = <&cpg CPG_MOD 727>;
2100                         power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>;
2101                         resets = <&cpg 727>;
2102                         status = "disabled";
2103
2104                         ports {
2105                                 #address-cells = <1>;
2106                                 #size-cells = <0>;
2107
2108                                 port@0 {
2109                                         reg = <0>;
2110                                         lvds0_in: endpoint {
2111                                                 remote-endpoint = <&du_out_lvds0>;
2112                                         };
2113                                 };
2114                                 port@1 {
2115                                         reg = <1>;
2116                                         lvds0_out: endpoint {
2117                                         };
2118                                 };
2119                         };
2120                 };
2121
2122                 prr: chipid@fff00044 {
2123                         compatible = "renesas,prr";
2124                         reg = <0 0xfff00044 0 4>;
2125                 };
2126         };
2127
2128         thermal-zones {
2129                 sensor_thermal1: sensor-thermal1 {
2130                         polling-delay-passive = <250>;
2131                         polling-delay = <1000>;
2132                         thermal-sensors = <&tsc 0>;
2133                         sustainable-power = <2439>;
2134
2135                         trips {
2136                                 sensor1_crit: sensor1-crit {
2137                                         temperature = <120000>;
2138                                         hysteresis = <1000>;
2139                                         type = "critical";
2140                                 };
2141                         };
2142                 };
2143
2144                 sensor_thermal2: sensor-thermal2 {
2145                         polling-delay-passive = <250>;
2146                         polling-delay = <1000>;
2147                         thermal-sensors = <&tsc 1>;
2148                         sustainable-power = <2439>;
2149
2150                         trips {
2151                                 sensor2_crit: sensor2-crit {
2152                                         temperature = <120000>;
2153                                         hysteresis = <1000>;
2154                                         type = "critical";
2155                                 };
2156                         };
2157                 };
2158
2159                 sensor_thermal3: sensor-thermal3 {
2160                         polling-delay-passive = <250>;
2161                         polling-delay = <1000>;
2162                         thermal-sensors = <&tsc 2>;
2163                         sustainable-power = <2439>;
2164
2165                         cooling-maps {
2166                                 map0 {
2167                                         trip = <&target>;
2168                                         cooling-device = <&a57_0 0 2>;
2169                                         contribution = <1024>;
2170                                 };
2171                         };
2172                         trips {
2173                                 target: trip-point1 {
2174                                         temperature = <100000>;
2175                                         hysteresis = <1000>;
2176                                         type = "passive";
2177                                 };
2178
2179                                 sensor3_crit: sensor3-crit {
2180                                         temperature = <120000>;
2181                                         hysteresis = <1000>;
2182                                         type = "critical";
2183                                 };
2184                         };
2185                 };
2186         };
2187
2188         timer {
2189                 compatible = "arm,armv8-timer";
2190                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2191                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2192                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
2193                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
2194         };
2195
2196         /* External USB clocks - can be overridden by the board */
2197         usb3s0_clk: usb3s0 {
2198                 compatible = "fixed-clock";
2199                 #clock-cells = <0>;
2200                 clock-frequency = <0>;
2201         };
2202
2203         usb_extal_clk: usb_extal {
2204                 compatible = "fixed-clock";
2205                 #clock-cells = <0>;
2206                 clock-frequency = <0>;
2207         };
2208 };