Merge tag 'io_uring-5.15-2021-10-17' of git://git.kernel.dk/linux-block
[platform/kernel/linux-rpi.git] / arch / arm64 / boot / dts / qcom / sdm850-lenovo-yoga-c630.dts
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3  * Lenovo Yoga C630
4  *
5  * Copyright (c) 2019, Linaro Ltd.
6  */
7
8 /dts-v1/;
9
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include <dt-bindings/sound/qcom,q6afe.h>
15 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm850.dtsi"
17 #include "pm8998.dtsi"
18
19 /*
20  * Update following upstream (sdm845.dtsi) reserved
21  * memory mappings for firmware loading to succeed
22  * and enable the IPA device.
23  */
24 /delete-node/ &ipa_fw_mem;
25 /delete-node/ &ipa_gsi_mem;
26 /delete-node/ &gpu_mem;
27 /delete-node/ &adsp_mem;
28 /delete-node/ &wlan_msa_mem;
29
30 / {
31         model = "Lenovo Yoga C630";
32         compatible = "lenovo,yoga-c630", "qcom,sdm845";
33
34         aliases {
35                 hsuart0 = &uart6;
36         };
37
38         gpio-keys {
39                 compatible = "gpio-keys";
40
41                 pinctrl-names = "default";
42                 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
43
44                 lid {
45                         gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
46                         linux,input-type = <EV_SW>;
47                         linux,code = <SW_LID>;
48                         wakeup-source;
49                         wakeup-event-action = <EV_ACT_DEASSERTED>;
50                 };
51
52                 mode {
53                         gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
54                         linux,input-type = <EV_SW>;
55                         linux,code = <SW_TABLET_MODE>;
56                 };
57         };
58
59         panel {
60                 compatible = "boe,nv133fhm-n61";
61                 no-hpd;
62
63                 ports {
64                         port {
65                                 panel_in_edp: endpoint {
66                                         remote-endpoint = <&sn65dsi86_out>;
67                                 };
68                         };
69                 };
70         };
71
72         /* Reserved memory changes for IPA */
73         reserved-memory {
74                 wlan_msa_mem: memory@8c400000 {
75                         reg = <0 0x8c400000 0 0x100000>;
76                         no-map;
77                 };
78
79                 gpu_mem: memory@8c515000 {
80                         reg = <0 0x8c515000 0 0x2000>;
81                         no-map;
82                 };
83
84                 ipa_fw_mem: memory@8c517000 {
85                         reg = <0 0x8c517000 0 0x5a000>;
86                         no-map;
87                 };
88
89                 adsp_mem: memory@8c600000 {
90                         reg = <0 0x8c600000 0 0x1a00000>;
91                         no-map;
92                 };
93         };
94
95         sn65dsi86_refclk: sn65dsi86-refclk {
96                 compatible = "fixed-clock";
97                 #clock-cells = <0>;
98
99                 clock-frequency = <19200000>;
100         };
101 };
102
103 &adsp_pas {
104         firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
105         status = "okay";
106 };
107
108 &apps_rsc {
109         pm8998-rpmh-regulators {
110                 compatible = "qcom,pm8998-rpmh-regulators";
111                 qcom,pmic-id = "a";
112
113                 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
114                 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
115
116                 vreg_s2a_1p125: smps2 {
117                 };
118
119                 vreg_s3a_1p35: smps3 {
120                         regulator-min-microvolt = <1352000>;
121                         regulator-max-microvolt = <1352000>;
122                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
123                 };
124
125                 vreg_s4a_1p8: smps4 {
126                         regulator-min-microvolt = <1800000>;
127                         regulator-max-microvolt = <1800000>;
128                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
129                 };
130
131                 vreg_s5a_2p04: smps5 {
132                         regulator-min-microvolt = <2040000>;
133                         regulator-max-microvolt = <2040000>;
134                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
135                 };
136
137                 vreg_s7a_1p025: smps7 {
138                 };
139
140                 vdd_qusb_hs0:
141                 vdda_hp_pcie_core:
142                 vdda_mipi_csi0_0p9:
143                 vdda_mipi_csi1_0p9:
144                 vdda_mipi_csi2_0p9:
145                 vdda_mipi_dsi0_pll:
146                 vdda_mipi_dsi1_pll:
147                 vdda_qlink_lv:
148                 vdda_qlink_lv_ck:
149                 vdda_qrefs_0p875:
150                 vdda_pcie_core:
151                 vdda_pll_cc_ebi01:
152                 vdda_pll_cc_ebi23:
153                 vdda_sp_sensor:
154                 vdda_ufs1_core:
155                 vdda_ufs2_core:
156                 vdda_usb1_ss_core:
157                 vdda_usb2_ss_core:
158                 vreg_l1a_0p875: ldo1 {
159                         regulator-min-microvolt = <880000>;
160                         regulator-max-microvolt = <880000>;
161                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
162                 };
163
164                 vddpx_10:
165                 vreg_l2a_1p2: ldo2 {
166                         regulator-min-microvolt = <1200000>;
167                         regulator-max-microvolt = <1200000>;
168                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
169                         regulator-always-on;
170                 };
171
172                 vreg_l3a_1p0: ldo3 {
173                 };
174
175                 vdd_wcss_cx:
176                 vdd_wcss_mx:
177                 vdda_wcss_pll:
178                 vreg_l5a_0p8: ldo5 {
179                         regulator-min-microvolt = <800000>;
180                         regulator-max-microvolt = <800000>;
181                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
182                 };
183
184                 vddpx_13:
185                 vreg_l6a_1p8: ldo6 {
186                         regulator-min-microvolt = <1800000>;
187                         regulator-max-microvolt = <1800000>;
188                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
189                 };
190
191                 vreg_l7a_1p8: ldo7 {
192                         regulator-min-microvolt = <1800000>;
193                         regulator-max-microvolt = <1800000>;
194                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
195                 };
196
197                 vreg_l8a_1p2: ldo8 {
198                 };
199
200                 vreg_l9a_1p8: ldo9 {
201                 };
202
203                 vreg_l10a_1p8: ldo10 {
204                 };
205
206                 vreg_l11a_1p0: ldo11 {
207                 };
208
209                 vdd_qfprom:
210                 vdd_qfprom_sp:
211                 vdda_apc1_cs_1p8:
212                 vdda_gfx_cs_1p8:
213                 vdda_qrefs_1p8:
214                 vdda_qusb_hs0_1p8:
215                 vddpx_11:
216                 vreg_l12a_1p8: ldo12 {
217                         regulator-min-microvolt = <1800000>;
218                         regulator-max-microvolt = <1800000>;
219                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
220                 };
221
222                 vddpx_2:
223                 vreg_l13a_2p95: ldo13 {
224                 };
225
226                 vreg_l14a_1p88: ldo14 {
227                         regulator-min-microvolt = <1880000>;
228                         regulator-max-microvolt = <1880000>;
229                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
230                         regulator-always-on;
231                 };
232
233                 vreg_l15a_1p8: ldo15 {
234                 };
235
236                 vreg_l16a_2p7: ldo16 {
237                 };
238
239                 vreg_l17a_1p3: ldo17 {
240                         regulator-min-microvolt = <1304000>;
241                         regulator-max-microvolt = <1304000>;
242                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243                 };
244
245                 vreg_l18a_2p7: ldo18 {
246                 };
247
248                 vreg_l19a_3p0: ldo19 {
249                         regulator-min-microvolt = <3100000>;
250                         regulator-max-microvolt = <3108000>;
251                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
252                 };
253
254                 vreg_l20a_2p95: ldo20 {
255                         regulator-min-microvolt = <2960000>;
256                         regulator-max-microvolt = <2960000>;
257                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
258                 };
259
260                 vreg_l21a_2p95: ldo21 {
261                 };
262
263                 vreg_l22a_2p85: ldo22 {
264                 };
265
266                 vreg_l23a_3p3: ldo23 {
267                 };
268
269                 vdda_qusb_hs0_3p1:
270                 vreg_l24a_3p075: ldo24 {
271                         regulator-min-microvolt = <3075000>;
272                         regulator-max-microvolt = <3083000>;
273                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
274                 };
275
276                 vreg_l25a_3p3: ldo25 {
277                         regulator-min-microvolt = <3104000>;
278                         regulator-max-microvolt = <3112000>;
279                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280                 };
281
282                 vdda_hp_pcie_1p2:
283                 vdda_hv_ebi0:
284                 vdda_hv_ebi1:
285                 vdda_hv_ebi2:
286                 vdda_hv_ebi3:
287                 vdda_mipi_csi_1p25:
288                 vdda_mipi_dsi0_1p2:
289                 vdda_mipi_dsi1_1p2:
290                 vdda_pcie_1p2:
291                 vdda_ufs1_1p2:
292                 vdda_ufs2_1p2:
293                 vdda_usb1_ss_1p2:
294                 vdda_usb2_ss_1p2:
295                 vreg_l26a_1p2: ldo26 {
296                         regulator-min-microvolt = <1200000>;
297                         regulator-max-microvolt = <1208000>;
298                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
299                 };
300
301                 vreg_l28a_3p0: ldo28 {
302                 };
303
304                 vreg_lvs1a_1p8: lvs1 {
305                 };
306
307                 vreg_lvs2a_1p8: lvs2 {
308                 };
309         };
310 };
311
312 &cdsp_pas {
313         firmware-name = "qcom/LENOVO/81JL/qccdsp850.mbn";
314         status = "okay";
315 };
316
317 &dsi0 {
318         status = "okay";
319         vdda-supply = <&vreg_l26a_1p2>;
320
321         ports {
322                 port@1 {
323                         endpoint {
324                                 remote-endpoint = <&sn65dsi86_in_a>;
325                                 data-lanes = <0 1 2 3>;
326                         };
327                 };
328         };
329 };
330
331 &dsi0_phy {
332         status = "okay";
333         vdds-supply = <&vreg_l1a_0p875>;
334 };
335
336 &gcc {
337         protected-clocks = <GCC_QSPI_CORE_CLK>,
338                            <GCC_QSPI_CORE_CLK_SRC>,
339                            <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
340                            <GCC_LPASS_Q6_AXI_CLK>,
341                            <GCC_LPASS_SWAY_CLK>;
342 };
343
344 &gpu {
345         zap-shader {
346                 memory-region = <&gpu_mem>;
347                 firmware-name = "qcom/LENOVO/81JL/qcdxkmsuc850.mbn";
348         };
349 };
350
351 &i2c1 {
352         status = "okay";
353         clock-frequency = <400000>;
354 };
355
356 &i2c3 {
357         status = "okay";
358         clock-frequency = <400000>;
359         /* Overwrite pinctrl-0 from sdm845.dtsi */
360         pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
361
362         tsel: hid@15 {
363                 compatible = "hid-over-i2c";
364                 reg = <0x15>;
365                 hid-descr-addr = <0x1>;
366
367                 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
368         };
369
370         tsc2: hid@2c {
371                 compatible = "hid-over-i2c";
372                 reg = <0x2c>;
373                 hid-descr-addr = <0x20>;
374
375                 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
376         };
377 };
378
379 &i2c5 {
380         status = "okay";
381         clock-frequency = <400000>;
382
383         tsc1: hid@10 {
384                 compatible = "hid-over-i2c";
385                 reg = <0x10>;
386                 hid-descr-addr = <0x1>;
387
388                 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
389
390                 pinctrl-names = "default";
391                 pinctrl-0 = <&i2c5_hid_active>;
392         };
393 };
394
395 &i2c10 {
396         status = "okay";
397         clock-frequency = <400000>;
398
399         sn65dsi86: bridge@2c {
400                 compatible = "ti,sn65dsi86";
401                 reg = <0x2c>;
402                 pinctrl-names = "default";
403                 pinctrl-0 = <&sn65dsi86_pin_active>;
404
405                 enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
406
407                 vpll-supply = <&vreg_l14a_1p88>;
408                 vccio-supply = <&vreg_l14a_1p88>;
409
410                 clocks = <&sn65dsi86_refclk>;
411                 clock-names = "refclk";
412
413                 no-hpd;
414
415                 ports {
416                         #address-cells = <1>;
417                         #size-cells = <0>;
418
419                         port@0 {
420                                 reg = <0>;
421                                 sn65dsi86_in_a: endpoint {
422                                         remote-endpoint = <&dsi0_out>;
423                                 };
424                         };
425
426                         port@1 {
427                                 reg = <1>;
428                                 sn65dsi86_out: endpoint {
429                                         remote-endpoint = <&panel_in_edp>;
430                                 };
431                         };
432                 };
433         };
434 };
435
436 &i2c11 {
437         status = "okay";
438         clock-frequency = <400000>;
439
440         ecsh: hid@5c {
441                 compatible = "hid-over-i2c";
442                 reg = <0x5c>;
443                 hid-descr-addr = <0x1>;
444
445                 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
446
447                 pinctrl-names = "default";
448                 pinctrl-0 = <&i2c11_hid_active>;
449         };
450 };
451
452 &ipa {
453         status = "okay";
454         memory-region = <&ipa_fw_mem>;
455 };
456
457 &mdss {
458         status = "okay";
459 };
460
461 &mdss_mdp {
462         status = "okay";
463 };
464
465 &mss_pil {
466         firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
467 };
468
469 &qup_i2c10_default {
470         pinconf {
471                 pins = "gpio55", "gpio56";
472                 drive-strength = <2>;
473                 bias-disable;
474         };
475 };
476
477 &qup_i2c12_default {
478         drive-strength = <2>;
479         bias-disable;
480 };
481
482 &qup_uart6_default {
483         pinmux {
484                  pins = "gpio45", "gpio46", "gpio47", "gpio48";
485                  function = "qup6";
486         };
487
488         cts {
489                 pins = "gpio45";
490                 bias-pull-down;
491         };
492
493         rts-tx {
494                 pins = "gpio46", "gpio47";
495                 drive-strength = <2>;
496                 bias-disable;
497         };
498
499         rx {
500                 pins = "gpio48";
501                 bias-pull-up;
502         };
503 };
504
505 &qupv3_id_0 {
506         status = "okay";
507 };
508
509 &qupv3_id_1 {
510         status = "okay";
511 };
512
513 &q6asmdai {
514         dai@0 {
515                 reg = <0>;
516         };
517
518         dai@1 {
519                 reg = <1>;
520         };
521 };
522
523 &sound {
524         compatible = "qcom,db845c-sndcard";
525         model = "Lenovo-YOGA-C630-13Q50";
526
527         audio-routing =
528                 "RX_BIAS", "MCLK",
529                 "AMIC2", "MIC BIAS2",
530                 "SpkrLeft IN", "SPK1 OUT",
531                 "SpkrRight IN", "SPK2 OUT",
532                 "MM_DL1",  "MultiMedia1 Playback",
533                 "MultiMedia2 Capture", "MM_UL2";
534
535         mm1-dai-link {
536                 link-name = "MultiMedia1";
537                 cpu {
538                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
539                 };
540         };
541
542         mm2-dai-link {
543                 link-name = "MultiMedia2";
544                 cpu {
545                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
546                 };
547         };
548
549         slim-dai-link {
550                 link-name = "SLIM Playback";
551                 cpu {
552                         sound-dai = <&q6afedai SLIMBUS_0_RX>;
553                 };
554
555                 platform {
556                         sound-dai = <&q6routing>;
557                 };
558
559                 codec {
560                         sound-dai =  <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
561                 };
562         };
563
564         slimcap-dai-link {
565                 link-name = "SLIM Capture";
566                 cpu {
567                         sound-dai = <&q6afedai SLIMBUS_0_TX>;
568                 };
569
570                 platform {
571                         sound-dai = <&q6routing>;
572                 };
573
574                 codec {
575                         sound-dai = <&wcd9340 1>;
576                 };
577         };
578 };
579
580 &tlmm {
581         gpio-reserved-ranges = <0 4>, <81 4>;
582
583         sn65dsi86_pin_active: sn65dsi86-enable {
584                 pins = "gpio96";
585                 drive-strength = <2>;
586                 bias-disable;
587         };
588
589         i2c3_hid_active: i2c2-hid-active {
590                 pins = "gpio37";
591                 function = "gpio";
592
593                 input-enable;
594                 bias-pull-up;
595                 drive-strength = <2>;
596         };
597
598         i2c5_hid_active: i2c5-hid-active {
599                 pins = "gpio125";
600                 function = "gpio";
601
602                 input-enable;
603                 bias-pull-up;
604                 drive-strength = <2>;
605         };
606
607         i2c11_hid_active: i2c11-hid-active {
608                 pins = "gpio92";
609                 function = "gpio";
610
611                 input-enable;
612                 bias-pull-up;
613                 drive-strength = <2>;
614         };
615
616         wcd_intr_default: wcd_intr_default {
617                 pins = "gpio54";
618                 function = "gpio";
619
620                 input-enable;
621                 bias-pull-down;
622                 drive-strength = <2>;
623         };
624
625         lid_pin_active: lid-pin {
626                 pins = "gpio124";
627                 function = "gpio";
628
629                 input-enable;
630                 bias-disable;
631         };
632
633         mode_pin_active: mode-pin {
634                 pins = "gpio95";
635                 function = "gpio";
636
637                 input-enable;
638                 bias-disable;
639         };
640 };
641
642 &uart6 {
643         status = "okay";
644
645         bluetooth {
646                 compatible = "qcom,wcn3990-bt";
647
648                 vddio-supply = <&vreg_s4a_1p8>;
649                 vddxo-supply = <&vreg_l7a_1p8>;
650                 vddrf-supply = <&vreg_l17a_1p3>;
651                 vddch0-supply = <&vreg_l25a_3p3>;
652                 max-speed = <3200000>;
653         };
654 };
655
656 &ufs_mem_hc {
657         status = "okay";
658
659         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
660
661         vcc-supply = <&vreg_l20a_2p95>;
662         vcc-max-microamp = <600000>;
663 };
664
665 &ufs_mem_phy {
666         status = "okay";
667
668         vdda-phy-supply = <&vdda_ufs1_core>;
669         vdda-pll-supply = <&vdda_ufs1_1p2>;
670 };
671
672 &usb_1 {
673         status = "okay";
674 };
675
676 &usb_1_dwc3 {
677         dr_mode = "host";
678 };
679
680 &usb_1_hsphy {
681         status = "okay";
682
683         vdd-supply = <&vdda_usb1_ss_core>;
684         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
685         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
686
687         qcom,imp-res-offset-value = <8>;
688         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
689         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
690         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
691 };
692
693 &usb_1_qmpphy {
694         status = "okay";
695
696         vdda-phy-supply = <&vdda_usb1_ss_1p2>;
697         vdda-pll-supply = <&vdda_usb1_ss_core>;
698 };
699
700 &usb_2 {
701         status = "okay";
702 };
703
704 &usb_2_dwc3 {
705         dr_mode = "host";
706 };
707
708 &usb_2_hsphy {
709         status = "okay";
710
711         vdd-supply = <&vdda_usb2_ss_core>;
712         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
713         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
714
715         qcom,imp-res-offset-value = <8>;
716         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
717 };
718
719 &usb_2_qmpphy {
720         status = "okay";
721
722         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
723         vdda-pll-supply = <&vdda_usb2_ss_core>;
724 };
725
726 &wcd9340{
727         pinctrl-0 = <&wcd_intr_default>;
728         pinctrl-names = "default";
729         clock-names = "extclk";
730         clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
731         reset-gpios = <&tlmm 64 0>;
732         vdd-buck-supply = <&vreg_s4a_1p8>;
733         vdd-buck-sido-supply = <&vreg_s4a_1p8>;
734         vdd-tx-supply = <&vreg_s4a_1p8>;
735         vdd-rx-supply = <&vreg_s4a_1p8>;
736         vdd-io-supply = <&vreg_s4a_1p8>;
737
738         swm: swm@c85 {
739                 left_spkr: wsa8810-left{
740                         compatible = "sdw10217211000";
741                         reg = <0 3>;
742                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
743                         #thermal-sensor-cells = <0>;
744                         sound-name-prefix = "SpkrLeft";
745                         #sound-dai-cells = <0>;
746                 };
747
748                 right_spkr: wsa8810-right{
749                         compatible = "sdw10217211000";
750                         powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
751                         reg = <0 4>;
752                         #thermal-sensor-cells = <0>;
753                         sound-name-prefix = "SpkrRight";
754                         #sound-dai-cells = <0>;
755                 };
756         };
757 };
758
759 &wifi {
760         status = "okay";
761
762         vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
763         vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
764         vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
765         vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
766
767         qcom,snoc-host-cap-8bit-quirk;
768 };