1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2019, Linaro Ltd.
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/gpio-keys.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include <dt-bindings/sound/qcom,q6afe.h>
15 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm850.dtsi"
17 #include "pm8998.dtsi"
20 * Update following upstream (sdm845.dtsi) reserved
21 * memory mappings for firmware loading to succeed
22 * and enable the IPA device.
24 /delete-node/ &ipa_fw_mem;
25 /delete-node/ &ipa_gsi_mem;
26 /delete-node/ &gpu_mem;
27 /delete-node/ &adsp_mem;
28 /delete-node/ &wlan_msa_mem;
31 model = "Lenovo Yoga C630";
32 compatible = "lenovo,yoga-c630", "qcom,sdm845";
39 compatible = "gpio-keys";
41 pinctrl-names = "default";
42 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
45 gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
46 linux,input-type = <EV_SW>;
47 linux,code = <SW_LID>;
49 wakeup-event-action = <EV_ACT_DEASSERTED>;
53 gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
54 linux,input-type = <EV_SW>;
55 linux,code = <SW_TABLET_MODE>;
60 compatible = "boe,nv133fhm-n61";
65 panel_in_edp: endpoint {
66 remote-endpoint = <&sn65dsi86_out>;
72 /* Reserved memory changes for IPA */
74 wlan_msa_mem: memory@8c400000 {
75 reg = <0 0x8c400000 0 0x100000>;
79 gpu_mem: memory@8c515000 {
80 reg = <0 0x8c515000 0 0x2000>;
84 ipa_fw_mem: memory@8c517000 {
85 reg = <0 0x8c517000 0 0x5a000>;
89 adsp_mem: memory@8c600000 {
90 reg = <0 0x8c600000 0 0x1a00000>;
95 sn65dsi86_refclk: sn65dsi86-refclk {
96 compatible = "fixed-clock";
99 clock-frequency = <19200000>;
104 firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
109 pm8998-rpmh-regulators {
110 compatible = "qcom,pm8998-rpmh-regulators";
113 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
114 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
116 vreg_s2a_1p125: smps2 {
119 vreg_s3a_1p35: smps3 {
120 regulator-min-microvolt = <1352000>;
121 regulator-max-microvolt = <1352000>;
122 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
125 vreg_s4a_1p8: smps4 {
126 regulator-min-microvolt = <1800000>;
127 regulator-max-microvolt = <1800000>;
128 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
131 vreg_s5a_2p04: smps5 {
132 regulator-min-microvolt = <2040000>;
133 regulator-max-microvolt = <2040000>;
134 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
137 vreg_s7a_1p025: smps7 {
158 vreg_l1a_0p875: ldo1 {
159 regulator-min-microvolt = <880000>;
160 regulator-max-microvolt = <880000>;
161 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
166 regulator-min-microvolt = <1200000>;
167 regulator-max-microvolt = <1200000>;
168 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
179 regulator-min-microvolt = <800000>;
180 regulator-max-microvolt = <800000>;
181 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
186 regulator-min-microvolt = <1800000>;
187 regulator-max-microvolt = <1800000>;
188 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192 regulator-min-microvolt = <1800000>;
193 regulator-max-microvolt = <1800000>;
194 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
203 vreg_l10a_1p8: ldo10 {
206 vreg_l11a_1p0: ldo11 {
216 vreg_l12a_1p8: ldo12 {
217 regulator-min-microvolt = <1800000>;
218 regulator-max-microvolt = <1800000>;
219 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
223 vreg_l13a_2p95: ldo13 {
226 vreg_l14a_1p88: ldo14 {
227 regulator-min-microvolt = <1880000>;
228 regulator-max-microvolt = <1880000>;
229 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
233 vreg_l15a_1p8: ldo15 {
236 vreg_l16a_2p7: ldo16 {
239 vreg_l17a_1p3: ldo17 {
240 regulator-min-microvolt = <1304000>;
241 regulator-max-microvolt = <1304000>;
242 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
245 vreg_l18a_2p7: ldo18 {
248 vreg_l19a_3p0: ldo19 {
249 regulator-min-microvolt = <3100000>;
250 regulator-max-microvolt = <3108000>;
251 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
254 vreg_l20a_2p95: ldo20 {
255 regulator-min-microvolt = <2960000>;
256 regulator-max-microvolt = <2960000>;
257 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
260 vreg_l21a_2p95: ldo21 {
263 vreg_l22a_2p85: ldo22 {
266 vreg_l23a_3p3: ldo23 {
270 vreg_l24a_3p075: ldo24 {
271 regulator-min-microvolt = <3075000>;
272 regulator-max-microvolt = <3083000>;
273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
276 vreg_l25a_3p3: ldo25 {
277 regulator-min-microvolt = <3104000>;
278 regulator-max-microvolt = <3112000>;
279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
295 vreg_l26a_1p2: ldo26 {
296 regulator-min-microvolt = <1200000>;
297 regulator-max-microvolt = <1208000>;
298 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
301 vreg_l28a_3p0: ldo28 {
304 vreg_lvs1a_1p8: lvs1 {
307 vreg_lvs2a_1p8: lvs2 {
313 firmware-name = "qcom/LENOVO/81JL/qccdsp850.mbn";
319 vdda-supply = <&vreg_l26a_1p2>;
324 remote-endpoint = <&sn65dsi86_in_a>;
325 data-lanes = <0 1 2 3>;
333 vdds-supply = <&vreg_l1a_0p875>;
337 protected-clocks = <GCC_QSPI_CORE_CLK>,
338 <GCC_QSPI_CORE_CLK_SRC>,
339 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
340 <GCC_LPASS_Q6_AXI_CLK>,
341 <GCC_LPASS_SWAY_CLK>;
346 memory-region = <&gpu_mem>;
347 firmware-name = "qcom/LENOVO/81JL/qcdxkmsuc850.mbn";
353 clock-frequency = <400000>;
358 clock-frequency = <400000>;
359 /* Overwrite pinctrl-0 from sdm845.dtsi */
360 pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
363 compatible = "hid-over-i2c";
365 hid-descr-addr = <0x1>;
367 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
371 compatible = "hid-over-i2c";
373 hid-descr-addr = <0x20>;
375 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
381 clock-frequency = <400000>;
384 compatible = "hid-over-i2c";
386 hid-descr-addr = <0x1>;
388 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
390 pinctrl-names = "default";
391 pinctrl-0 = <&i2c5_hid_active>;
397 clock-frequency = <400000>;
399 sn65dsi86: bridge@2c {
400 compatible = "ti,sn65dsi86";
402 pinctrl-names = "default";
403 pinctrl-0 = <&sn65dsi86_pin_active>;
405 enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
407 vpll-supply = <&vreg_l14a_1p88>;
408 vccio-supply = <&vreg_l14a_1p88>;
410 clocks = <&sn65dsi86_refclk>;
411 clock-names = "refclk";
416 #address-cells = <1>;
421 sn65dsi86_in_a: endpoint {
422 remote-endpoint = <&dsi0_out>;
428 sn65dsi86_out: endpoint {
429 remote-endpoint = <&panel_in_edp>;
438 clock-frequency = <400000>;
441 compatible = "hid-over-i2c";
443 hid-descr-addr = <0x1>;
445 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
447 pinctrl-names = "default";
448 pinctrl-0 = <&i2c11_hid_active>;
454 memory-region = <&ipa_fw_mem>;
466 firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
471 pins = "gpio55", "gpio56";
472 drive-strength = <2>;
478 drive-strength = <2>;
484 pins = "gpio45", "gpio46", "gpio47", "gpio48";
494 pins = "gpio46", "gpio47";
495 drive-strength = <2>;
524 compatible = "qcom,db845c-sndcard";
525 model = "Lenovo-YOGA-C630-13Q50";
529 "AMIC2", "MIC BIAS2",
530 "SpkrLeft IN", "SPK1 OUT",
531 "SpkrRight IN", "SPK2 OUT",
532 "MM_DL1", "MultiMedia1 Playback",
533 "MultiMedia2 Capture", "MM_UL2";
536 link-name = "MultiMedia1";
538 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
543 link-name = "MultiMedia2";
545 sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
550 link-name = "SLIM Playback";
552 sound-dai = <&q6afedai SLIMBUS_0_RX>;
556 sound-dai = <&q6routing>;
560 sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
565 link-name = "SLIM Capture";
567 sound-dai = <&q6afedai SLIMBUS_0_TX>;
571 sound-dai = <&q6routing>;
575 sound-dai = <&wcd9340 1>;
581 gpio-reserved-ranges = <0 4>, <81 4>;
583 sn65dsi86_pin_active: sn65dsi86-enable {
585 drive-strength = <2>;
589 i2c3_hid_active: i2c2-hid-active {
595 drive-strength = <2>;
598 i2c5_hid_active: i2c5-hid-active {
604 drive-strength = <2>;
607 i2c11_hid_active: i2c11-hid-active {
613 drive-strength = <2>;
616 wcd_intr_default: wcd_intr_default {
622 drive-strength = <2>;
625 lid_pin_active: lid-pin {
633 mode_pin_active: mode-pin {
646 compatible = "qcom,wcn3990-bt";
648 vddio-supply = <&vreg_s4a_1p8>;
649 vddxo-supply = <&vreg_l7a_1p8>;
650 vddrf-supply = <&vreg_l17a_1p3>;
651 vddch0-supply = <&vreg_l25a_3p3>;
652 max-speed = <3200000>;
659 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
661 vcc-supply = <&vreg_l20a_2p95>;
662 vcc-max-microamp = <600000>;
668 vdda-phy-supply = <&vdda_ufs1_core>;
669 vdda-pll-supply = <&vdda_ufs1_1p2>;
683 vdd-supply = <&vdda_usb1_ss_core>;
684 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
685 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
687 qcom,imp-res-offset-value = <8>;
688 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
689 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
690 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
696 vdda-phy-supply = <&vdda_usb1_ss_1p2>;
697 vdda-pll-supply = <&vdda_usb1_ss_core>;
711 vdd-supply = <&vdda_usb2_ss_core>;
712 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
713 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
715 qcom,imp-res-offset-value = <8>;
716 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
722 vdda-phy-supply = <&vdda_usb2_ss_1p2>;
723 vdda-pll-supply = <&vdda_usb2_ss_core>;
727 pinctrl-0 = <&wcd_intr_default>;
728 pinctrl-names = "default";
729 clock-names = "extclk";
730 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
731 reset-gpios = <&tlmm 64 0>;
732 vdd-buck-supply = <&vreg_s4a_1p8>;
733 vdd-buck-sido-supply = <&vreg_s4a_1p8>;
734 vdd-tx-supply = <&vreg_s4a_1p8>;
735 vdd-rx-supply = <&vreg_s4a_1p8>;
736 vdd-io-supply = <&vreg_s4a_1p8>;
739 left_spkr: wsa8810-left{
740 compatible = "sdw10217211000";
742 powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
743 #thermal-sensor-cells = <0>;
744 sound-name-prefix = "SpkrLeft";
745 #sound-dai-cells = <0>;
748 right_spkr: wsa8810-right{
749 compatible = "sdw10217211000";
750 powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
752 #thermal-sensor-cells = <0>;
753 sound-name-prefix = "SpkrRight";
754 #sound-dai-cells = <0>;
762 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
763 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
764 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
765 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
767 qcom,snoc-host-cap-8bit-quirk;