1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2021 MediaTek Inc.
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
31 pwms = <&disp_pwm0 0 500000>;
32 power-supply = <&ppvar_sys>;
36 stdout-path = "serial0:115200n8";
40 compatible = "dmic-codec";
42 wakeup-delay-ms = <50>;
46 device_type = "memory";
47 reg = <0 0x40000000 0 0x80000000>;
50 /* system wide LDO 3.3V power rail */
51 pp3300_z5: regulator-pp3300-ldo-z5 {
52 compatible = "regulator-fixed";
53 regulator-name = "pp3300_ldo_z5";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
58 vin-supply = <&ppvar_sys>;
61 /* separately switched 3.3V power rail */
62 pp3300_s3: regulator-pp3300-s3 {
63 compatible = "regulator-fixed";
64 regulator-name = "pp3300_s3";
65 /* automatically sequenced by PMIC EXT_PMIC_EN2 */
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 vin-supply = <&pp3300_z2>;
73 /* system wide 3.3V power rail */
74 pp3300_z2: regulator-pp3300-z2 {
75 compatible = "regulator-fixed";
76 regulator-name = "pp3300_z2";
77 /* EN pin tied to pp4200_z2, which is controlled by EC */
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 vin-supply = <&ppvar_sys>;
85 /* system wide 4.2V power rail */
86 pp4200_z2: regulator-pp4200-z2 {
87 compatible = "regulator-fixed";
88 regulator-name = "pp4200_z2";
89 /* controlled by EC */
92 regulator-min-microvolt = <4200000>;
93 regulator-max-microvolt = <4200000>;
94 vin-supply = <&ppvar_sys>;
97 /* system wide switching 5.0V power rail */
98 pp5000_s5: regulator-pp5000-s5 {
99 compatible = "regulator-fixed";
100 regulator-name = "pp5000_s5";
101 /* controlled by EC */
104 regulator-min-microvolt = <5000000>;
105 regulator-max-microvolt = <5000000>;
106 vin-supply = <&ppvar_sys>;
109 /* system wide semi-regulated power rail from battery or USB */
110 ppvar_sys: regulator-ppvar-sys {
111 compatible = "regulator-fixed";
112 regulator-name = "ppvar_sys";
117 usb_vbus: regulator-5v0-usb-vbus {
118 compatible = "regulator-fixed";
119 regulator-name = "usb-vbus";
120 regulator-min-microvolt = <5000000>;
121 regulator-max-microvolt = <5000000>;
126 reserved_memory: reserved-memory {
127 #address-cells = <2>;
131 scp_mem: memory@50000000 {
132 compatible = "shared-dma-pool";
133 reg = <0 0x50000000 0 0x2900000>;
137 adsp_mem: memory@60000000 {
138 compatible = "shared-dma-pool";
139 reg = <0 0x60000000 0 0xd80000>;
143 afe_mem: memory@60d80000 {
144 compatible = "shared-dma-pool";
145 reg = <0 0x60d80000 0 0x100000>;
149 adsp_device_mem: memory@60e80000 {
150 compatible = "shared-dma-pool";
151 reg = <0 0x60e80000 0 0x280000>;
156 spk_amplifier: rt1019p {
157 compatible = "realtek,rt1019p";
159 pinctrl-names = "default";
160 pinctrl-0 = <&rt1019p_pins_default>;
161 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>;
168 memory-region = <&adsp_device_mem>, <&adsp_mem>;
174 mediatek,etdm-in2-cowork-source = <2>;
175 mediatek,etdm-out2-cowork-source = <0>;
176 memory-region = <&afe_mem>;
183 dp_intf0_out: endpoint {
184 remote-endpoint = <&edp_in>;
193 dp_intf1_out: endpoint {
194 remote-endpoint = <&dptx_in>;
202 pinctrl-names = "default";
203 pinctrl-0 = <&edptx_pins_default>;
206 #address-cells = <1>;
212 remote-endpoint = <&dp_intf0_out>;
219 data-lanes = <0 1 2 3>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&disp_pwm0_pin_default>;
235 pinctrl-names = "default";
236 pinctrl-0 = <&dptx_pin>;
239 #address-cells = <1>;
245 remote-endpoint = <&dp_intf1_out>;
252 data-lanes = <0 1 2 3>;
260 mali-supply = <&mt6315_7_vbuck1>;
266 clock-frequency = <400000>;
267 pinctrl-names = "default";
268 pinctrl-0 = <&i2c0_pins>;
274 clock-frequency = <400000>;
275 i2c-scl-internal-delay-ns = <12500>;
276 pinctrl-names = "default";
277 pinctrl-0 = <&i2c1_pins>;
280 compatible = "elan,ekth3000";
282 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>;
283 pinctrl-names = "default";
284 pinctrl-0 = <&trackpad_pins>;
285 vcc-supply = <&pp3300_s3>;
293 clock-frequency = <400000>;
294 pinctrl-names = "default";
295 pinctrl-0 = <&i2c2_pins>;
297 audio_codec: codec@1a {
298 /* Realtek RT5682i or RT5682s, sharing the same configuration */
300 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>;
301 realtek,jd-src = <1>;
303 AVDD-supply = <&mt6359_vio18_ldo_reg>;
304 MICVDD-supply = <&pp3300_z2>;
305 VBAT-supply = <&pp3300_z5>;
312 clock-frequency = <400000>;
313 pinctrl-names = "default";
314 pinctrl-0 = <&i2c3_pins>;
317 compatible = "google,cr50";
319 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
320 pinctrl-names = "default";
321 pinctrl-0 = <&cr50_int>;
328 clock-frequency = <400000>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&i2c4_pins>;
332 ts_10: touchscreen@10 {
333 compatible = "hid-over-i2c";
335 hid-descr-addr = <0x0001>;
336 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&touchscreen_pins>;
339 post-power-on-delay-ms = <10>;
340 vdd-supply = <&pp3300_s3>;
348 clock-frequency = <400000>;
349 pinctrl-names = "default";
350 pinctrl-0 = <&i2c5_pins>;
356 clock-frequency = <400000>;
357 pinctrl-names = "default";
358 pinctrl-0 = <&i2c7_pins>;
361 #interrupt-cells = <1>;
362 compatible = "mediatek,mt6360";
364 interrupt-controller;
365 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
366 interrupt-names = "IRQB";
367 pinctrl-names = "default";
368 pinctrl-0 = <&subpmic_default>;
379 hs400-ds-delay = <0x14c11>;
380 max-frequency = <200000000>;
386 pinctrl-names = "default", "state_uhs";
387 pinctrl-0 = <&mmc0_pins_default>;
388 pinctrl-1 = <&mmc0_pins_uhs>;
389 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
390 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
398 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>;
399 max-frequency = <200000000>;
402 pinctrl-names = "default", "state_uhs";
403 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>;
404 pinctrl-1 = <&mmc1_pins_default>;
407 vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
408 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
412 mediatek,dmic-mode = <1>; /* one-wire */
413 mediatek,mic-type-0 = <2>; /* DMIC */
417 &mt6359_vcore_buck_reg {
422 &mt6359_vgpu11_buck_reg {
426 &mt6359_vgpu11_sshub_buck_reg {
428 regulator-min-microvolt = <550000>;
429 regulator-max-microvolt = <550000>;
433 &mt6359_vpu_buck_reg {
437 &mt6359_vrf12_ldo_reg {
442 &mt6359_vsram_others_ldo_reg {
444 regulator-min-microvolt = <750000>;
445 regulator-max-microvolt = <750000>;
448 &mt6359_vufs_ldo_reg {
455 pinctrl-names = "default";
456 pinctrl-0 = <&nor_pins_default>;
459 compatible = "jedec,spi-nor";
461 spi-max-frequency = <52000000>;
462 spi-rx-bus-width = <2>;
463 spi-tx-bus-width = <2>;
468 mediatek,rsel-resistance-in-si-unit;
469 pinctrl-names = "default";
470 pinctrl-0 = <&pio_default>;
480 * AP_FLASH_WP_L is crossystem ABI. Schematics
481 * call it AP_FLASH_WP_ODL.
488 "AP_I2C_TCHPAD_SDA_1V8",
489 "AP_I2C_TCHPAD_SCL_1V8",
492 "AP_I2C_TPM_SDA_1V8",
493 "AP_I2C_TPM_SCL_1V8",
494 "AP_I2C_TCHSCR_SDA_1V8",
495 "AP_I2C_TCHSCR_SCL_1V8",
499 "PCIE_NVME_CLKREQ_ODL",
501 "PCIE_CLKREQ_1V8_ODL",
505 "AP_I2C_PWR_SCL_1V8",
506 "AP_I2C_PWR_SDA_1V8",
535 "TCHSCR_REPORT_DISABLE",
541 "SCP_I2C_SENSOR_SCL_1V8",
542 "SCP_I2C_SENSOR_SDA_1V8",
555 "AP_SPI_GSC_TPM_CLK",
556 "AP_SPI_GSC_TPM_MOSI",
557 "AP_SPI_GSC_TPM_CS_L",
558 "AP_SPI_GSC_TPM_MISO",
579 "AP_EC_WARM_RST_REQ",
580 "UART_SCP_TX_DBGCON_RX",
581 "UART_DBGCON_TX_SCP_RX",
587 "MT6315_PROC_BC_INT",
623 aud_pins_default: audio-default-pins {
625 pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>,
626 <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>,
627 <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>,
628 <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>,
629 <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>,
630 <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>,
631 <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>,
632 <PINMUX_GPIO0__FUNC_TDMIN_MCK>,
633 <PINMUX_GPIO1__FUNC_TDMIN_DI>,
634 <PINMUX_GPIO2__FUNC_TDMIN_LRCK>,
635 <PINMUX_GPIO3__FUNC_TDMIN_BCK>,
636 <PINMUX_GPIO60__FUNC_I2SO2_D0>,
637 <PINMUX_GPIO49__FUNC_I2SIN_D0>,
638 <PINMUX_GPIO50__FUNC_I2SO1_MCK>,
639 <PINMUX_GPIO51__FUNC_I2SO1_BCK>,
640 <PINMUX_GPIO52__FUNC_I2SO1_WS>,
641 <PINMUX_GPIO53__FUNC_I2SO1_D0>;
644 pins-hp-jack-int-odl {
645 pinmux = <PINMUX_GPIO89__FUNC_GPIO89>;
647 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
651 cr50_int: cr50-irq-default-pins {
652 pins-gsc-ap-int-odl {
653 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
658 cros_ec_int: cros-ec-irq-default-pins {
660 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
661 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
666 edptx_pins_default: edptx-default-pins {
668 pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>;
673 disp_pwm0_pin_default: disp-pwm0-default-pins {
675 pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
676 <PINMUX_GPIO97__FUNC_DISP_PWM0>;
680 dptx_pin: dptx-default-pins {
682 pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;
687 i2c0_pins: i2c0-default-pins {
689 pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
690 <PINMUX_GPIO9__FUNC_SCL0>;
692 drive-strength-microamp = <1000>;
696 i2c1_pins: i2c1-default-pins {
698 pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
699 <PINMUX_GPIO11__FUNC_SCL1>;
700 bias-pull-up = <1000>;
701 drive-strength-microamp = <1000>;
705 i2c2_pins: i2c2-default-pins {
707 pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
708 <PINMUX_GPIO13__FUNC_SCL2>;
710 drive-strength-microamp = <1000>;
714 i2c3_pins: i2c3-default-pins {
716 pinmux = <PINMUX_GPIO14__FUNC_SDA3>,
717 <PINMUX_GPIO15__FUNC_SCL3>;
718 bias-pull-up = <1000>;
719 drive-strength-microamp = <1000>;
723 i2c4_pins: i2c4-default-pins {
725 pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
726 <PINMUX_GPIO17__FUNC_SCL4>;
727 bias-pull-up = <1000>;
728 drive-strength = <4>;
732 i2c5_pins: i2c5-default-pins {
734 pinmux = <PINMUX_GPIO29__FUNC_SCL5>,
735 <PINMUX_GPIO30__FUNC_SDA5>;
737 drive-strength-microamp = <1000>;
741 i2c7_pins: i2c7-default-pins {
743 pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
744 <PINMUX_GPIO28__FUNC_SDA7>;
749 mmc0_pins_default: mmc0-default-pins {
751 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
752 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
753 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
754 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
755 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
756 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
757 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
758 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
759 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
761 drive-strength = <6>;
762 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
766 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
767 drive-strength = <6>;
768 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
772 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
773 drive-strength = <6>;
774 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
778 mmc0_pins_uhs: mmc0-uhs-pins {
780 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
781 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
782 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
783 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
784 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
785 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
786 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
787 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
788 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
790 drive-strength = <8>;
791 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
795 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
796 drive-strength = <8>;
797 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
801 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
802 drive-strength = <8>;
803 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
807 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
808 drive-strength = <8>;
809 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
813 mmc1_pins_detect: mmc1-detect-pins {
815 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
820 mmc1_pins_default: mmc1-default-pins {
822 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
823 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
824 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
825 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
826 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
828 drive-strength = <8>;
829 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
833 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
834 drive-strength = <8>;
835 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
839 nor_pins_default: nor-default-pins {
841 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
842 <PINMUX_GPIO141__FUNC_SPINOR_CK>,
843 <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
844 drive-strength = <6>;
849 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>;
850 drive-strength = <6>;
855 pio_default: pio-default-pins {
857 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
859 drive-strength = <14>;
863 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>,
864 <PINMUX_GPIO26__FUNC_GPIO26>,
865 <PINMUX_GPIO46__FUNC_GPIO46>,
866 <PINMUX_GPIO47__FUNC_GPIO47>,
867 <PINMUX_GPIO48__FUNC_GPIO48>,
868 <PINMUX_GPIO65__FUNC_GPIO65>,
869 <PINMUX_GPIO66__FUNC_GPIO66>,
870 <PINMUX_GPIO67__FUNC_GPIO67>,
871 <PINMUX_GPIO68__FUNC_GPIO68>,
872 <PINMUX_GPIO128__FUNC_GPIO128>,
873 <PINMUX_GPIO129__FUNC_GPIO129>;
878 pins-low-power-pupd {
879 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
880 <PINMUX_GPIO78__FUNC_GPIO78>,
881 <PINMUX_GPIO79__FUNC_GPIO79>,
882 <PINMUX_GPIO80__FUNC_GPIO80>,
883 <PINMUX_GPIO83__FUNC_GPIO83>,
884 <PINMUX_GPIO85__FUNC_GPIO85>,
885 <PINMUX_GPIO90__FUNC_GPIO90>,
886 <PINMUX_GPIO91__FUNC_GPIO91>,
887 <PINMUX_GPIO93__FUNC_GPIO93>,
888 <PINMUX_GPIO94__FUNC_GPIO94>,
889 <PINMUX_GPIO95__FUNC_GPIO95>,
890 <PINMUX_GPIO96__FUNC_GPIO96>,
891 <PINMUX_GPIO104__FUNC_GPIO104>,
892 <PINMUX_GPIO105__FUNC_GPIO105>,
893 <PINMUX_GPIO107__FUNC_GPIO107>;
895 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
899 rt1019p_pins_default: rt1019p-default-pins {
901 pinmux = <PINMUX_GPIO100__FUNC_GPIO100>;
906 scp_pins: scp-default-pins {
908 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>;
914 spi0_pins: spi0-default-pins {
916 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
917 <PINMUX_GPIO134__FUNC_SPIM0_MO>,
918 <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
923 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
928 subpmic_default: subpmic-default-pins {
929 subpmic_pin_irq: pins-subpmic-int-n {
930 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
936 trackpad_pins: trackpad-default-pins {
938 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
944 touchscreen_pins: touchscreen-default-pins {
946 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>;
948 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
951 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
955 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>;
962 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
968 firmware-name = "mediatek/mt8195/scp.img";
969 memory-region = <&scp_mem>;
970 pinctrl-names = "default";
971 pinctrl-0 = <&scp_pins>;
974 compatible = "google,cros-ec-rpmsg";
975 mediatek,rpmsg-name = "cros-ec-rpmsg";
982 mediatek,adsp = <&adsp>;
984 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE",
985 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE",
986 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5";
987 pinctrl-names = "default";
988 pinctrl-0 = <&aud_pins_default>;
994 pinctrl-names = "default";
995 pinctrl-0 = <&spi0_pins>;
996 mediatek,pad-select = <0>;
999 #address-cells = <1>;
1002 compatible = "google,cros-ec-spi";
1004 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>;
1005 pinctrl-names = "default";
1006 pinctrl-0 = <&cros_ec_int>;
1007 spi-max-frequency = <3000000>;
1009 keyboard-backlight {
1010 compatible = "google,cros-kbd-led-backlight";
1013 i2c_tunnel: i2c-tunnel {
1014 compatible = "google,cros-ec-i2c-tunnel";
1015 google,remote-bus = <0>;
1016 #address-cells = <1>;
1020 mt_pmic_vmc_ldo_reg: regulator@0 {
1021 compatible = "google,cros-ec-regulator";
1023 regulator-name = "mt_pmic_vmc_ldo";
1024 regulator-min-microvolt = <1200000>;
1025 regulator-max-microvolt = <3600000>;
1028 mt_pmic_vmch_ldo_reg: regulator@1 {
1029 compatible = "google,cros-ec-regulator";
1031 regulator-name = "mt_pmic_vmch_ldo";
1032 regulator-min-microvolt = <2700000>;
1033 regulator-max-microvolt = <3600000>;
1037 compatible = "google,cros-ec-typec";
1038 #address-cells = <1>;
1041 usb_c0: connector@0 {
1042 compatible = "usb-c-connector";
1044 power-role = "dual";
1046 try-power-role = "source";
1049 usb_c1: connector@1 {
1050 compatible = "usb-c-connector";
1052 power-role = "dual";
1054 try-power-role = "source";
1061 #address-cells = <2>;
1065 compatible = "mediatek,mt6315-regulator";
1066 reg = <0x6 SPMI_USID>;
1069 mt6315_6_vbuck1: vbuck1 {
1070 regulator-compatible = "vbuck1";
1071 regulator-name = "Vbcpu";
1072 regulator-min-microvolt = <300000>;
1073 regulator-max-microvolt = <1193750>;
1074 regulator-enable-ramp-delay = <256>;
1075 regulator-ramp-delay = <6250>;
1076 regulator-allowed-modes = <0 1 2>;
1077 regulator-always-on;
1083 compatible = "mediatek,mt6315-regulator";
1084 reg = <0x7 SPMI_USID>;
1087 mt6315_7_vbuck1: vbuck1 {
1088 regulator-compatible = "vbuck1";
1089 regulator-name = "Vgpu";
1090 regulator-min-microvolt = <625000>;
1091 regulator-max-microvolt = <1193750>;
1092 regulator-enable-ramp-delay = <256>;
1093 regulator-ramp-delay = <6250>;
1094 regulator-allowed-modes = <0 1 2>;
1095 regulator-always-on;
1124 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1125 vbus-supply = <&usb_vbus>;
1131 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1132 vbus-supply = <&usb_vbus>;
1138 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1139 vbus-supply = <&usb_vbus>;
1145 /* MT7921's USB Bluetooth has issues with USB2 LPM */
1147 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1148 vbus-supply = <&usb_vbus>;
1151 #include <arm/cros-ec-keyboard.dtsi>
1152 #include <arm/cros-ec-sbs.dtsi>
1154 &keyboard_controller {
1155 function-row-physmap = <
1156 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
1157 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
1158 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
1159 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
1160 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
1161 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
1162 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
1163 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
1164 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
1165 MATRIX_KEY(0x00, 0x04, 0) /* T10 */
1169 MATRIX_KEY(0x00, 0x02, KEY_BACK)
1170 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
1171 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
1172 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
1173 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
1174 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
1175 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
1176 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
1177 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
1178 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
1180 CROS_STD_MAIN_KEYMAP