1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2021 MediaTek Inc.
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
31 pwms = <&disp_pwm0 0 500000>;
32 power-supply = <&ppvar_sys>;
36 stdout-path = "serial0:115200n8";
40 compatible = "dmic-codec";
42 wakeup-delay-ms = <50>;
46 device_type = "memory";
47 reg = <0 0x40000000 0 0x80000000>;
50 /* system wide LDO 3.3V power rail */
51 pp3300_z5: regulator-pp3300-ldo-z5 {
52 compatible = "regulator-fixed";
53 regulator-name = "pp3300_ldo_z5";
56 regulator-min-microvolt = <3300000>;
57 regulator-max-microvolt = <3300000>;
58 vin-supply = <&ppvar_sys>;
61 /* separately switched 3.3V power rail */
62 pp3300_s3: regulator-pp3300-s3 {
63 compatible = "regulator-fixed";
64 regulator-name = "pp3300_s3";
65 /* automatically sequenced by PMIC EXT_PMIC_EN2 */
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 vin-supply = <&pp3300_z2>;
73 /* system wide 3.3V power rail */
74 pp3300_z2: regulator-pp3300-z2 {
75 compatible = "regulator-fixed";
76 regulator-name = "pp3300_z2";
77 /* EN pin tied to pp4200_z2, which is controlled by EC */
80 regulator-min-microvolt = <3300000>;
81 regulator-max-microvolt = <3300000>;
82 vin-supply = <&ppvar_sys>;
85 /* system wide 4.2V power rail */
86 pp4200_z2: regulator-pp4200-z2 {
87 compatible = "regulator-fixed";
88 regulator-name = "pp4200_z2";
89 /* controlled by EC */
92 regulator-min-microvolt = <4200000>;
93 regulator-max-microvolt = <4200000>;
94 vin-supply = <&ppvar_sys>;
97 /* system wide switching 5.0V power rail */
98 pp5000_s5: regulator-pp5000-s5 {
99 compatible = "regulator-fixed";
100 regulator-name = "pp5000_s5";
101 /* controlled by EC */
104 regulator-min-microvolt = <5000000>;
105 regulator-max-microvolt = <5000000>;
106 vin-supply = <&ppvar_sys>;
109 /* system wide semi-regulated power rail from battery or USB */
110 ppvar_sys: regulator-ppvar-sys {
111 compatible = "regulator-fixed";
112 regulator-name = "ppvar_sys";
117 usb_vbus: regulator-5v0-usb-vbus {
118 compatible = "regulator-fixed";
119 regulator-name = "usb-vbus";
120 regulator-min-microvolt = <5000000>;
121 regulator-max-microvolt = <5000000>;
126 reserved_memory: reserved-memory {
127 #address-cells = <2>;
131 scp_mem: memory@50000000 {
132 compatible = "shared-dma-pool";
133 reg = <0 0x50000000 0 0x2900000>;
137 adsp_mem: memory@60000000 {
138 compatible = "shared-dma-pool";
139 reg = <0 0x60000000 0 0xd80000>;
143 afe_mem: memory@60d80000 {
144 compatible = "shared-dma-pool";
145 reg = <0 0x60d80000 0 0x100000>;
149 adsp_device_mem: memory@60e80000 {
150 compatible = "shared-dma-pool";
151 reg = <0 0x60e80000 0 0x280000>;
156 spk_amplifier: rt1019p {
157 compatible = "realtek,rt1019p";
159 pinctrl-names = "default";
160 pinctrl-0 = <&rt1019p_pins_default>;
161 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>;
168 memory-region = <&adsp_device_mem>, <&adsp_mem>;
174 mediatek,etdm-in2-cowork-source = <2>;
175 mediatek,etdm-out2-cowork-source = <0>;
176 memory-region = <&afe_mem>;
183 dp_intf0_out: endpoint {
184 remote-endpoint = <&edp_in>;
193 dp_intf1_out: endpoint {
194 remote-endpoint = <&dptx_in>;
202 pinctrl-names = "default";
203 pinctrl-0 = <&edptx_pins_default>;
206 #address-cells = <1>;
212 remote-endpoint = <&dp_intf0_out>;
219 data-lanes = <0 1 2 3>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&disp_pwm0_pin_default>;
235 pinctrl-names = "default";
236 pinctrl-0 = <&dptx_pin>;
239 #address-cells = <1>;
245 remote-endpoint = <&dp_intf1_out>;
252 data-lanes = <0 1 2 3>;
259 mediatek,broken-save-restore-fw;
264 mali-supply = <&mt6315_7_vbuck1>;
270 clock-frequency = <400000>;
271 pinctrl-names = "default";
272 pinctrl-0 = <&i2c0_pins>;
278 clock-frequency = <400000>;
279 i2c-scl-internal-delay-ns = <12500>;
280 pinctrl-names = "default";
281 pinctrl-0 = <&i2c1_pins>;
284 compatible = "elan,ekth3000";
286 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&trackpad_pins>;
289 vcc-supply = <&pp3300_s3>;
297 clock-frequency = <400000>;
298 pinctrl-names = "default";
299 pinctrl-0 = <&i2c2_pins>;
301 audio_codec: codec@1a {
302 /* Realtek RT5682i or RT5682s, sharing the same configuration */
304 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>;
305 realtek,jd-src = <1>;
307 AVDD-supply = <&mt6359_vio18_ldo_reg>;
308 MICVDD-supply = <&pp3300_z2>;
309 VBAT-supply = <&pp3300_z5>;
316 clock-frequency = <400000>;
317 pinctrl-names = "default";
318 pinctrl-0 = <&i2c3_pins>;
321 compatible = "google,cr50";
323 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
324 pinctrl-names = "default";
325 pinctrl-0 = <&cr50_int>;
332 clock-frequency = <400000>;
333 pinctrl-names = "default";
334 pinctrl-0 = <&i2c4_pins>;
336 ts_10: touchscreen@10 {
337 compatible = "hid-over-i2c";
339 hid-descr-addr = <0x0001>;
340 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>;
341 pinctrl-names = "default";
342 pinctrl-0 = <&touchscreen_pins>;
343 post-power-on-delay-ms = <10>;
344 vdd-supply = <&pp3300_s3>;
352 clock-frequency = <400000>;
353 pinctrl-names = "default";
354 pinctrl-0 = <&i2c5_pins>;
360 clock-frequency = <400000>;
361 pinctrl-names = "default";
362 pinctrl-0 = <&i2c7_pins>;
365 #interrupt-cells = <1>;
366 compatible = "mediatek,mt6360";
368 interrupt-controller;
369 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
370 interrupt-names = "IRQB";
371 pinctrl-names = "default";
372 pinctrl-0 = <&subpmic_default>;
383 hs400-ds-delay = <0x14c11>;
384 max-frequency = <200000000>;
390 pinctrl-names = "default", "state_uhs";
391 pinctrl-0 = <&mmc0_pins_default>;
392 pinctrl-1 = <&mmc0_pins_uhs>;
393 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
394 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
402 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>;
403 max-frequency = <200000000>;
406 pinctrl-names = "default", "state_uhs";
407 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>;
408 pinctrl-1 = <&mmc1_pins_default>;
411 vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
412 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
416 mediatek,dmic-mode = <1>; /* one-wire */
417 mediatek,mic-type-0 = <2>; /* DMIC */
421 &mt6359_vcore_buck_reg {
426 &mt6359_vgpu11_buck_reg {
430 &mt6359_vgpu11_sshub_buck_reg {
432 regulator-min-microvolt = <550000>;
433 regulator-max-microvolt = <550000>;
437 &mt6359_vpu_buck_reg {
441 &mt6359_vrf12_ldo_reg {
446 &mt6359_vsram_others_ldo_reg {
448 regulator-min-microvolt = <750000>;
449 regulator-max-microvolt = <750000>;
452 &mt6359_vufs_ldo_reg {
459 pinctrl-names = "default";
460 pinctrl-0 = <&nor_pins_default>;
463 compatible = "jedec,spi-nor";
465 spi-max-frequency = <52000000>;
466 spi-rx-bus-width = <2>;
467 spi-tx-bus-width = <2>;
474 pinctrl-names = "default";
475 pinctrl-0 = <&pcie1_pins_default>;
479 mediatek,rsel-resistance-in-si-unit;
480 pinctrl-names = "default";
481 pinctrl-0 = <&pio_default>;
491 * AP_FLASH_WP_L is crossystem ABI. Schematics
492 * call it AP_FLASH_WP_ODL.
499 "AP_I2C_TCHPAD_SDA_1V8",
500 "AP_I2C_TCHPAD_SCL_1V8",
503 "AP_I2C_TPM_SDA_1V8",
504 "AP_I2C_TPM_SCL_1V8",
505 "AP_I2C_TCHSCR_SDA_1V8",
506 "AP_I2C_TCHSCR_SCL_1V8",
510 "PCIE_NVME_CLKREQ_ODL",
512 "PCIE_CLKREQ_1V8_ODL",
516 "AP_I2C_PWR_SCL_1V8",
517 "AP_I2C_PWR_SDA_1V8",
546 "TCHSCR_REPORT_DISABLE",
552 "SCP_I2C_SENSOR_SCL_1V8",
553 "SCP_I2C_SENSOR_SDA_1V8",
566 "AP_SPI_GSC_TPM_CLK",
567 "AP_SPI_GSC_TPM_MOSI",
568 "AP_SPI_GSC_TPM_CS_L",
569 "AP_SPI_GSC_TPM_MISO",
590 "AP_EC_WARM_RST_REQ",
591 "UART_SCP_TX_DBGCON_RX",
592 "UART_DBGCON_TX_SCP_RX",
598 "MT6315_PROC_BC_INT",
634 aud_pins_default: audio-default-pins {
636 pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>,
637 <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>,
638 <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>,
639 <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>,
640 <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>,
641 <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>,
642 <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>,
643 <PINMUX_GPIO0__FUNC_TDMIN_MCK>,
644 <PINMUX_GPIO1__FUNC_TDMIN_DI>,
645 <PINMUX_GPIO2__FUNC_TDMIN_LRCK>,
646 <PINMUX_GPIO3__FUNC_TDMIN_BCK>,
647 <PINMUX_GPIO60__FUNC_I2SO2_D0>,
648 <PINMUX_GPIO49__FUNC_I2SIN_D0>,
649 <PINMUX_GPIO50__FUNC_I2SO1_MCK>,
650 <PINMUX_GPIO51__FUNC_I2SO1_BCK>,
651 <PINMUX_GPIO52__FUNC_I2SO1_WS>,
652 <PINMUX_GPIO53__FUNC_I2SO1_D0>;
655 pins-hp-jack-int-odl {
656 pinmux = <PINMUX_GPIO89__FUNC_GPIO89>;
658 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
662 cr50_int: cr50-irq-default-pins {
663 pins-gsc-ap-int-odl {
664 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
669 cros_ec_int: cros-ec-irq-default-pins {
671 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
672 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
677 edptx_pins_default: edptx-default-pins {
679 pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>;
684 disp_pwm0_pin_default: disp-pwm0-default-pins {
686 pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
687 <PINMUX_GPIO97__FUNC_DISP_PWM0>;
691 dptx_pin: dptx-default-pins {
693 pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;
698 i2c0_pins: i2c0-default-pins {
700 pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
701 <PINMUX_GPIO9__FUNC_SCL0>;
703 drive-strength-microamp = <1000>;
707 i2c1_pins: i2c1-default-pins {
709 pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
710 <PINMUX_GPIO11__FUNC_SCL1>;
711 bias-pull-up = <1000>;
712 drive-strength-microamp = <1000>;
716 i2c2_pins: i2c2-default-pins {
718 pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
719 <PINMUX_GPIO13__FUNC_SCL2>;
721 drive-strength-microamp = <1000>;
725 i2c3_pins: i2c3-default-pins {
727 pinmux = <PINMUX_GPIO14__FUNC_SDA3>,
728 <PINMUX_GPIO15__FUNC_SCL3>;
729 bias-pull-up = <1000>;
730 drive-strength-microamp = <1000>;
734 i2c4_pins: i2c4-default-pins {
736 pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
737 <PINMUX_GPIO17__FUNC_SCL4>;
738 bias-pull-up = <1000>;
739 drive-strength = <4>;
743 i2c5_pins: i2c5-default-pins {
745 pinmux = <PINMUX_GPIO29__FUNC_SCL5>,
746 <PINMUX_GPIO30__FUNC_SDA5>;
748 drive-strength-microamp = <1000>;
752 i2c7_pins: i2c7-default-pins {
754 pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
755 <PINMUX_GPIO28__FUNC_SDA7>;
760 mmc0_pins_default: mmc0-default-pins {
762 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
763 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
764 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
765 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
766 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
767 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
768 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
769 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
770 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
772 drive-strength = <6>;
773 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
777 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
778 drive-strength = <6>;
779 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
783 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
784 drive-strength = <6>;
785 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
789 mmc0_pins_uhs: mmc0-uhs-pins {
791 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
792 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
793 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
794 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
795 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
796 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
797 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
798 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
799 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
801 drive-strength = <8>;
802 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
806 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
807 drive-strength = <8>;
808 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
812 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
813 drive-strength = <8>;
814 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
818 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
819 drive-strength = <8>;
820 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
824 mmc1_pins_detect: mmc1-detect-pins {
826 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
831 mmc1_pins_default: mmc1-default-pins {
833 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
834 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
835 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
836 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
837 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
839 drive-strength = <8>;
840 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
844 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
845 drive-strength = <8>;
846 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
850 nor_pins_default: nor-default-pins {
852 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
853 <PINMUX_GPIO141__FUNC_SPINOR_CK>,
854 <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
855 drive-strength = <6>;
860 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>;
861 drive-strength = <6>;
866 pcie0_pins_default: pcie0-default-pins {
868 pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
869 <PINMUX_GPIO20__FUNC_PERSTN>,
870 <PINMUX_GPIO21__FUNC_CLKREQN>;
875 pcie1_pins_default: pcie1-default-pins {
877 pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
878 <PINMUX_GPIO23__FUNC_CLKREQN_1>,
879 <PINMUX_GPIO24__FUNC_WAKEN_1>;
884 pio_default: pio-default-pins {
886 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
888 drive-strength = <14>;
892 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>,
893 <PINMUX_GPIO26__FUNC_GPIO26>,
894 <PINMUX_GPIO46__FUNC_GPIO46>,
895 <PINMUX_GPIO47__FUNC_GPIO47>,
896 <PINMUX_GPIO48__FUNC_GPIO48>,
897 <PINMUX_GPIO65__FUNC_GPIO65>,
898 <PINMUX_GPIO66__FUNC_GPIO66>,
899 <PINMUX_GPIO67__FUNC_GPIO67>,
900 <PINMUX_GPIO68__FUNC_GPIO68>,
901 <PINMUX_GPIO128__FUNC_GPIO128>,
902 <PINMUX_GPIO129__FUNC_GPIO129>;
907 pins-low-power-pupd {
908 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
909 <PINMUX_GPIO78__FUNC_GPIO78>,
910 <PINMUX_GPIO79__FUNC_GPIO79>,
911 <PINMUX_GPIO80__FUNC_GPIO80>,
912 <PINMUX_GPIO83__FUNC_GPIO83>,
913 <PINMUX_GPIO85__FUNC_GPIO85>,
914 <PINMUX_GPIO90__FUNC_GPIO90>,
915 <PINMUX_GPIO91__FUNC_GPIO91>,
916 <PINMUX_GPIO93__FUNC_GPIO93>,
917 <PINMUX_GPIO94__FUNC_GPIO94>,
918 <PINMUX_GPIO95__FUNC_GPIO95>,
919 <PINMUX_GPIO96__FUNC_GPIO96>,
920 <PINMUX_GPIO104__FUNC_GPIO104>,
921 <PINMUX_GPIO105__FUNC_GPIO105>,
922 <PINMUX_GPIO107__FUNC_GPIO107>;
924 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
928 rt1019p_pins_default: rt1019p-default-pins {
930 pinmux = <PINMUX_GPIO100__FUNC_GPIO100>;
935 scp_pins: scp-default-pins {
937 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>;
943 spi0_pins: spi0-default-pins {
945 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
946 <PINMUX_GPIO134__FUNC_SPIM0_MO>,
947 <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
952 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
957 subpmic_default: subpmic-default-pins {
958 subpmic_pin_irq: pins-subpmic-int-n {
959 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
965 trackpad_pins: trackpad-default-pins {
967 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
973 touchscreen_pins: touchscreen-default-pins {
975 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>;
977 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
980 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
984 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>;
991 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
997 firmware-name = "mediatek/mt8195/scp.img";
998 memory-region = <&scp_mem>;
999 pinctrl-names = "default";
1000 pinctrl-0 = <&scp_pins>;
1003 compatible = "google,cros-ec-rpmsg";
1004 mediatek,rpmsg-name = "cros-ec-rpmsg";
1011 mediatek,adsp = <&adsp>;
1013 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE",
1014 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE",
1015 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5";
1016 pinctrl-names = "default";
1017 pinctrl-0 = <&aud_pins_default>;
1023 pinctrl-names = "default";
1024 pinctrl-0 = <&spi0_pins>;
1025 mediatek,pad-select = <0>;
1028 #address-cells = <1>;
1031 compatible = "google,cros-ec-spi";
1033 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>;
1034 pinctrl-names = "default";
1035 pinctrl-0 = <&cros_ec_int>;
1036 spi-max-frequency = <3000000>;
1038 keyboard-backlight {
1039 compatible = "google,cros-kbd-led-backlight";
1042 i2c_tunnel: i2c-tunnel {
1043 compatible = "google,cros-ec-i2c-tunnel";
1044 google,remote-bus = <0>;
1045 #address-cells = <1>;
1049 mt_pmic_vmc_ldo_reg: regulator@0 {
1050 compatible = "google,cros-ec-regulator";
1052 regulator-name = "mt_pmic_vmc_ldo";
1053 regulator-min-microvolt = <1200000>;
1054 regulator-max-microvolt = <3600000>;
1057 mt_pmic_vmch_ldo_reg: regulator@1 {
1058 compatible = "google,cros-ec-regulator";
1060 regulator-name = "mt_pmic_vmch_ldo";
1061 regulator-min-microvolt = <2700000>;
1062 regulator-max-microvolt = <3600000>;
1066 compatible = "google,cros-ec-typec";
1067 #address-cells = <1>;
1070 usb_c0: connector@0 {
1071 compatible = "usb-c-connector";
1073 power-role = "dual";
1075 try-power-role = "source";
1078 usb_c1: connector@1 {
1079 compatible = "usb-c-connector";
1081 power-role = "dual";
1083 try-power-role = "source";
1090 #address-cells = <2>;
1094 compatible = "mediatek,mt6315-regulator";
1095 reg = <0x6 SPMI_USID>;
1098 mt6315_6_vbuck1: vbuck1 {
1099 regulator-compatible = "vbuck1";
1100 regulator-name = "Vbcpu";
1101 regulator-min-microvolt = <300000>;
1102 regulator-max-microvolt = <1193750>;
1103 regulator-enable-ramp-delay = <256>;
1104 regulator-ramp-delay = <6250>;
1105 regulator-allowed-modes = <0 1 2>;
1106 regulator-always-on;
1112 compatible = "mediatek,mt6315-regulator";
1113 reg = <0x7 SPMI_USID>;
1116 mt6315_7_vbuck1: vbuck1 {
1117 regulator-compatible = "vbuck1";
1118 regulator-name = "Vgpu";
1119 regulator-min-microvolt = <625000>;
1120 regulator-max-microvolt = <1193750>;
1121 regulator-enable-ramp-delay = <256>;
1122 regulator-ramp-delay = <6250>;
1123 regulator-allowed-modes = <0 1 2>;
1124 regulator-always-on;
1153 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1154 vbus-supply = <&usb_vbus>;
1160 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1161 vbus-supply = <&usb_vbus>;
1167 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1168 vbus-supply = <&usb_vbus>;
1174 /* MT7921's USB Bluetooth has issues with USB2 LPM */
1176 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1177 vbus-supply = <&usb_vbus>;
1180 #include <arm/cros-ec-keyboard.dtsi>
1181 #include <arm/cros-ec-sbs.dtsi>
1183 &keyboard_controller {
1184 function-row-physmap = <
1185 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
1186 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
1187 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
1188 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
1189 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
1190 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
1191 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
1192 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
1193 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
1194 MATRIX_KEY(0x00, 0x04, 0) /* T10 */
1198 MATRIX_KEY(0x00, 0x02, KEY_BACK)
1199 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
1200 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
1201 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
1202 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
1203 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
1204 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
1205 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
1206 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
1207 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
1209 CROS_STD_MAIN_KEYMAP