arch/arm64/boot/dts/mediatek/mt8195-cherry.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
   2 /*
   3  * Copyright (C) 2021 MediaTek Inc.
   4  */
   5
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/spmi/spmi.h>
   8 #include "mt8195.dtsi"
   9 #include "mt6359.dtsi"
  10
  11 / {
  12         aliases {
  13                 i2c0 = &i2c0;
  14                 i2c1 = &i2c1;
  15                 i2c2 = &i2c2;
  16                 i2c3 = &i2c3;
  17                 i2c4 = &i2c4;
  18                 i2c5 = &i2c5;
  19                 i2c7 = &i2c7;
  20                 mmc0 = &mmc0;
  21                 mmc1 = &mmc1;
  22                 serial0 = &uart0;
  23         };
  24
  25         backlight_lcd0: backlight-lcd0 {
  26                 compatible = "pwm-backlight";
  27                 brightness-levels = <0 1023>;
  28                 default-brightness-level = <576>;
  29                 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
  30                 num-interpolated-steps = <1023>;
  31                 pwms = <&disp_pwm0 0 500000>;
  32                 power-supply = <&ppvar_sys>;
  33         };
  34
  35         chosen {
  36                 stdout-path = "serial0:115200n8";
  37         };
  38
  39         dmic-codec {
  40                 compatible = "dmic-codec";
  41                 num-channels = <2>;
  42                 wakeup-delay-ms = <50>;
  43         };
  44
  45         memory@40000000 {
  46                 device_type = "memory";
  47                 reg = <0 0x40000000 0 0x80000000>;
  48         };
  49
  50         /* system wide LDO 3.3V power rail */
  51         pp3300_z5: regulator-pp3300-ldo-z5 {
  52                 compatible = "regulator-fixed";
  53                 regulator-name = "pp3300_ldo_z5";
  54                 regulator-always-on;
  55                 regulator-boot-on;
  56                 regulator-min-microvolt = <3300000>;
  57                 regulator-max-microvolt = <3300000>;
  58                 vin-supply = <&ppvar_sys>;
  59         };
  60
  61         /* separately switched 3.3V power rail */
  62         pp3300_s3: regulator-pp3300-s3 {
  63                 compatible = "regulator-fixed";
  64                 regulator-name = "pp3300_s3";
  65                 /* automatically sequenced by PMIC EXT_PMIC_EN2 */
  66                 regulator-always-on;
  67                 regulator-boot-on;
  68                 regulator-min-microvolt = <3300000>;
  69                 regulator-max-microvolt = <3300000>;
  70                 vin-supply = <&pp3300_z2>;
  71         };
  72
  73         /* system wide 3.3V power rail */
  74         pp3300_z2: regulator-pp3300-z2 {
  75                 compatible = "regulator-fixed";
  76                 regulator-name = "pp3300_z2";
  77                 /* EN pin tied to pp4200_z2, which is controlled by EC */
  78                 regulator-always-on;
  79                 regulator-boot-on;
  80                 regulator-min-microvolt = <3300000>;
  81                 regulator-max-microvolt = <3300000>;
  82                 vin-supply = <&ppvar_sys>;
  83         };
  84
  85         /* system wide 4.2V power rail */
  86         pp4200_z2: regulator-pp4200-z2 {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "pp4200_z2";
  89                 /* controlled by EC */
  90                 regulator-always-on;
  91                 regulator-boot-on;
  92                 regulator-min-microvolt = <4200000>;
  93                 regulator-max-microvolt = <4200000>;
  94                 vin-supply = <&ppvar_sys>;
  95         };
  96
  97         /* system wide switching 5.0V power rail */
  98         pp5000_s5: regulator-pp5000-s5 {
  99                 compatible = "regulator-fixed";
 100                 regulator-name = "pp5000_s5";
 101                 /* controlled by EC */
 102                 regulator-always-on;
 103                 regulator-boot-on;
 104                 regulator-min-microvolt = <5000000>;
 105                 regulator-max-microvolt = <5000000>;
 106                 vin-supply = <&ppvar_sys>;
 107         };
 108
 109         /* system wide semi-regulated power rail from battery or USB */
 110         ppvar_sys: regulator-ppvar-sys {
 111                 compatible = "regulator-fixed";
 112                 regulator-name = "ppvar_sys";
 113                 regulator-always-on;
 114                 regulator-boot-on;
 115         };
 116
 117         usb_vbus: regulator-5v0-usb-vbus {
 118                 compatible = "regulator-fixed";
 119                 regulator-name = "usb-vbus";
 120                 regulator-min-microvolt = <5000000>;
 121                 regulator-max-microvolt = <5000000>;
 122                 enable-active-high;
 123                 regulator-always-on;
 124         };
 125
 126         reserved_memory: reserved-memory {
 127                 #address-cells = <2>;
 128                 #size-cells = <2>;
 129                 ranges;
 130
 131                 scp_mem: memory@50000000 {
 132                         compatible = "shared-dma-pool";
 133                         reg = <0 0x50000000 0 0x2900000>;
 134                         no-map;
 135                 };
 136
 137                 adsp_mem: memory@60000000 {
 138                         compatible = "shared-dma-pool";
 139                         reg = <0 0x60000000 0 0xd80000>;
 140                         no-map;
 141                 };
 142
 143                 afe_mem: memory@60d80000 {
 144                         compatible = "shared-dma-pool";
 145                         reg = <0 0x60d80000 0 0x100000>;
 146                         no-map;
 147                 };
 148
 149                 adsp_device_mem: memory@60e80000 {
 150                         compatible = "shared-dma-pool";
 151                         reg = <0 0x60e80000 0 0x280000>;
 152                         no-map;
 153                 };
 154         };
 155
 156         spk_amplifier: rt1019p {
 157                 compatible = "realtek,rt1019p";
 158                 label = "rt1019p";
 159                 pinctrl-names = "default";
 160                 pinctrl-0 = <&rt1019p_pins_default>;
 161                 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>;
 162         };
 163 };
 164
 165 &adsp {
 166         status = "okay";
 167
 168         memory-region = <&adsp_device_mem>, <&adsp_mem>;
 169 };
 170
 171 &afe {
 172         status = "okay";
 173
 174         mediatek,etdm-in2-cowork-source = <2>;
 175         mediatek,etdm-out2-cowork-source = <0>;
 176         memory-region = <&afe_mem>;
 177 };
 178
 179 &dp_intf0 {
 180         status = "okay";
 181
 182         port {
 183                 dp_intf0_out: endpoint {
 184                         remote-endpoint = <&edp_in>;
 185                 };
 186         };
 187 };
 188
 189 &dp_intf1 {
 190         status = "okay";
 191
 192         port {
 193                 dp_intf1_out: endpoint {
 194                         remote-endpoint = <&dptx_in>;
 195                 };
 196         };
 197 };
 198
 199 &edp_tx {
 200         status = "okay";
 201
 202         pinctrl-names = "default";
 203         pinctrl-0 = <&edptx_pins_default>;
 204
 205         ports {
 206                 #address-cells = <1>;
 207                 #size-cells = <0>;
 208
 209                 port@0 {
 210                         reg = <0>;
 211                         edp_in: endpoint {
 212                                 remote-endpoint = <&dp_intf0_out>;
 213                         };
 214                 };
 215
 216                 port@1 {
 217                         reg = <1>;
 218                         edp_out: endpoint {
 219                                 data-lanes = <0 1 2 3>;
 220                         };
 221                 };
 222         };
 223 };
 224
 225 &disp_pwm0 {
 226         status = "okay";
 227
 228         pinctrl-names = "default";
 229         pinctrl-0 = <&disp_pwm0_pin_default>;
 230 };
 231
 232 &dp_tx {
 233         status = "okay";
 234
 235         pinctrl-names = "default";
 236         pinctrl-0 = <&dptx_pin>;
 237
 238         ports {
 239                 #address-cells = <1>;
 240                 #size-cells = <0>;
 241
 242                 port@0 {
 243                         reg = <0>;
 244                         dptx_in: endpoint {
 245                                 remote-endpoint = <&dp_intf1_out>;
 246                         };
 247                 };
 248
 249                 port@1 {
 250                         reg = <1>;
 251                         dptx_out: endpoint {
 252                                 data-lanes = <0 1 2 3>;
 253                         };
 254                 };
 255         };
 256 };
 257
 258 &gpu {
 259         status = "okay";
 260         mali-supply = <&mt6315_7_vbuck1>;
 261 };
 262
 263 &i2c0 {
 264         status = "okay";
 265
 266         clock-frequency = <400000>;
 267         pinctrl-names = "default";
 268         pinctrl-0 = <&i2c0_pins>;
 269 };
 270
 271 &i2c1 {
 272         status = "okay";
 273
 274         clock-frequency = <400000>;
 275         i2c-scl-internal-delay-ns = <12500>;
 276         pinctrl-names = "default";
 277         pinctrl-0 = <&i2c1_pins>;
 278
 279         trackpad@15 {
 280                 compatible = "elan,ekth3000";
 281                 reg = <0x15>;
 282                 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>;
 283                 pinctrl-names = "default";
 284                 pinctrl-0 = <&trackpad_pins>;
 285                 vcc-supply = <&pp3300_s3>;
 286                 wakeup-source;
 287         };
 288 };
 289
 290 &i2c2 {
 291         status = "okay";
 292
 293         clock-frequency = <400000>;
 294         pinctrl-names = "default";
 295         pinctrl-0 = <&i2c2_pins>;
 296
 297         audio_codec: codec@1a {
 298                 /* Realtek RT5682i or RT5682s, sharing the same configuration */
 299                 reg = <0x1a>;
 300                 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>;
 301                 realtek,jd-src = <1>;
 302
 303                 AVDD-supply = <&mt6359_vio18_ldo_reg>;
 304                 MICVDD-supply = <&pp3300_z2>;
 305                 VBAT-supply = <&pp3300_z5>;
 306         };
 307 };
 308
 309 &i2c3 {
 310         status = "okay";
 311
 312         clock-frequency = <400000>;
 313         pinctrl-names = "default";
 314         pinctrl-0 = <&i2c3_pins>;
 315
 316         tpm@50 {
 317                 compatible = "google,cr50";
 318                 reg = <0x50>;
 319                 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
 320                 pinctrl-names = "default";
 321                 pinctrl-0 = <&cr50_int>;
 322         };
 323 };
 324
 325 &i2c4 {
 326         status = "okay";
 327
 328         clock-frequency = <400000>;
 329         pinctrl-names = "default";
 330         pinctrl-0 = <&i2c4_pins>;
 331
 332         ts_10: touchscreen@10 {
 333                 compatible = "hid-over-i2c";
 334                 reg = <0x10>;
 335                 hid-descr-addr = <0x0001>;
 336                 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>;
 337                 pinctrl-names = "default";
 338                 pinctrl-0 = <&touchscreen_pins>;
 339                 post-power-on-delay-ms = <10>;
 340                 vdd-supply = <&pp3300_s3>;
 341                 status = "disabled";
 342         };
 343 };
 344
 345 &i2c5 {
 346         status = "okay";
 347
 348         clock-frequency = <400000>;
 349         pinctrl-names = "default";
 350         pinctrl-0 = <&i2c5_pins>;
 351 };
 352
 353 &i2c7 {
 354         status = "okay";
 355
 356         clock-frequency = <400000>;
 357         pinctrl-names = "default";
 358         pinctrl-0 = <&i2c7_pins>;
 359
 360         pmic@34 {
 361                 #interrupt-cells = <1>;
 362                 compatible = "mediatek,mt6360";
 363                 reg = <0x34>;
 364                 interrupt-controller;
 365                 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
 366                 interrupt-names = "IRQB";
 367                 pinctrl-names = "default";
 368                 pinctrl-0 = <&subpmic_default>;
 369                 wakeup-source;
 370         };
 371 };
 372
 373 &mmc0 {
 374         status = "okay";
 375
 376         bus-width = <8>;
 377         cap-mmc-highspeed;
 378         cap-mmc-hw-reset;
 379         hs400-ds-delay = <0x14c11>;
 380         max-frequency = <200000000>;
 381         mmc-hs200-1_8v;
 382         mmc-hs400-1_8v;
 383         no-sdio;
 384         no-sd;
 385         non-removable;
 386         pinctrl-names = "default", "state_uhs";
 387         pinctrl-0 = <&mmc0_pins_default>;
 388         pinctrl-1 = <&mmc0_pins_uhs>;
 389         vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
 390         vqmmc-supply = <&mt6359_vufs_ldo_reg>;
 391 };
 392
 393 &mmc1 {
 394         status = "okay";
 395
 396         bus-width = <4>;
 397         cap-sd-highspeed;
 398         cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>;
 399         max-frequency = <200000000>;
 400         no-mmc;
 401         no-sdio;
 402         pinctrl-names = "default", "state_uhs";
 403         pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>;
 404         pinctrl-1 = <&mmc1_pins_default>;
 405         sd-uhs-sdr50;
 406         sd-uhs-sdr104;
 407         vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
 408         vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
 409 };
 410
 411 &mt6359codec {
 412         mediatek,dmic-mode = <1>;  /* one-wire */
 413         mediatek,mic-type-0 = <2>; /* DMIC */
 414 };
 415
 416 /* for CPU-L */
 417 &mt6359_vcore_buck_reg {
 418         regulator-always-on;
 419 };
 420
 421 /* for CORE */
 422 &mt6359_vgpu11_buck_reg {
 423         regulator-always-on;
 424 };
 425
 426 &mt6359_vgpu11_sshub_buck_reg {
 427         regulator-always-on;
 428         regulator-min-microvolt = <550000>;
 429         regulator-max-microvolt = <550000>;
 430 };
 431
 432 /* for CORE SRAM */
 433 &mt6359_vpu_buck_reg {
 434         regulator-always-on;
 435 };
 436
 437 &mt6359_vrf12_ldo_reg {
 438         regulator-always-on;
 439 };
 440
 441 /* for GPU SRAM */
 442 &mt6359_vsram_others_ldo_reg {
 443         regulator-always-on;
 444         regulator-min-microvolt = <750000>;
 445         regulator-max-microvolt = <750000>;
 446 };
 447
 448 &mt6359_vufs_ldo_reg {
 449         regulator-always-on;
 450 };
 451
 452 &nor_flash {
 453         status = "okay";
 454
 455         pinctrl-names = "default";
 456         pinctrl-0 = <&nor_pins_default>;
 457
 458         flash@0 {
 459                 compatible = "jedec,spi-nor";
 460                 reg = <0>;
 461                 spi-max-frequency = <52000000>;
 462                 spi-rx-bus-width = <2>;
 463                 spi-tx-bus-width = <2>;
 464         };
 465 };
 466
 467 &pio {
 468         mediatek,rsel-resistance-in-si-unit;
 469         pinctrl-names = "default";
 470         pinctrl-0 = <&pio_default>;
 471
 472         /* 144 lines */
 473         gpio-line-names =
 474                 "I2S_SPKR_MCLK",
 475                 "I2S_SPKR_DATAIN",
 476                 "I2S_SPKR_LRCK",
 477                 "I2S_SPKR_BCLK",
 478                 "EC_AP_INT_ODL",
 479                 /*
 480                  * AP_FLASH_WP_L is crossystem ABI. Schematics
 481                  * call it AP_FLASH_WP_ODL.
 482                  */
 483                 "AP_FLASH_WP_L",
 484                 "TCHPAD_INT_ODL",
 485                 "EDP_HPD_1V8",
 486                 "AP_I2C_CAM_SDA",
 487                 "AP_I2C_CAM_SCL",
 488                 "AP_I2C_TCHPAD_SDA_1V8",
 489                 "AP_I2C_TCHPAD_SCL_1V8",
 490                 "AP_I2C_AUD_SDA",
 491                 "AP_I2C_AUD_SCL",
 492                 "AP_I2C_TPM_SDA_1V8",
 493                 "AP_I2C_TPM_SCL_1V8",
 494                 "AP_I2C_TCHSCR_SDA_1V8",
 495                 "AP_I2C_TCHSCR_SCL_1V8",
 496                 "EC_AP_HPD_OD",
 497                 "",
 498                 "PCIE_NVME_RST_L",
 499                 "PCIE_NVME_CLKREQ_ODL",
 500                 "PCIE_RST_1V8_L",
 501                 "PCIE_CLKREQ_1V8_ODL",
 502                 "PCIE_WAKE_1V8_ODL",
 503                 "CLK_24M_CAM0",
 504                 "CAM1_SEN_EN",
 505                 "AP_I2C_PWR_SCL_1V8",
 506                 "AP_I2C_PWR_SDA_1V8",
 507                 "AP_I2C_MISC_SCL",
 508                 "AP_I2C_MISC_SDA",
 509                 "EN_PP5000_HDMI_X",
 510                 "AP_HDMITX_HTPLG",
 511                 "",
 512                 "AP_HDMITX_SCL_1V8",
 513                 "AP_HDMITX_SDA_1V8",
 514                 "AP_RTC_CLK32K",
 515                 "AP_EC_WATCHDOG_L",
 516                 "SRCLKENA0",
 517                 "SRCLKENA1",
 518                 "PWRAP_SPI0_CS_L",
 519                 "PWRAP_SPI0_CK",
 520                 "PWRAP_SPI0_MOSI",
 521                 "PWRAP_SPI0_MISO",
 522                 "SPMI_SCL",
 523                 "SPMI_SDA",
 524                 "",
 525                 "",
 526                 "",
 527                 "I2S_HP_DATAIN",
 528                 "I2S_HP_MCLK",
 529                 "I2S_HP_BCK",
 530                 "I2S_HP_LRCK",
 531                 "I2S_HP_DATAOUT",
 532                 "SD_CD_ODL",
 533                 "EN_PP3300_DISP_X",
 534                 "TCHSCR_RST_1V8_L",
 535                 "TCHSCR_REPORT_DISABLE",
 536                 "EN_PP3300_WLAN_X",
 537                 "BT_KILL_1V8_L",
 538                 "I2S_SPKR_DATAOUT",
 539                 "WIFI_KILL_1V8_L",
 540                 "BEEP_ON",
 541                 "SCP_I2C_SENSOR_SCL_1V8",
 542                 "SCP_I2C_SENSOR_SDA_1V8",
 543                 "",
 544                 "",
 545                 "",
 546                 "",
 547                 "AUD_CLK_MOSI",
 548                 "AUD_SYNC_MOSI",
 549                 "AUD_DAT_MOSI0",
 550                 "AUD_DAT_MOSI1",
 551                 "AUD_DAT_MISO0",
 552                 "AUD_DAT_MISO1",
 553                 "AUD_DAT_MISO2",
 554                 "SCP_VREQ_VAO",
 555                 "AP_SPI_GSC_TPM_CLK",
 556                 "AP_SPI_GSC_TPM_MOSI",
 557                 "AP_SPI_GSC_TPM_CS_L",
 558                 "AP_SPI_GSC_TPM_MISO",
 559                 "EN_PP1000_CAM_X",
 560                 "AP_EDP_BKLTEN",
 561                 "",
 562                 "USB3_HUB_RST_L",
 563                 "",
 564                 "WLAN_ALERT_ODL",
 565                 "EC_IN_RW_ODL",
 566                 "GSC_AP_INT_ODL",
 567                 "HP_INT_ODL",
 568                 "CAM0_RST_L",
 569                 "CAM1_RST_L",
 570                 "TCHSCR_INT_1V8_L",
 571                 "CAM1_DET_L",
 572                 "RST_ALC1011_L",
 573                 "",
 574                 "",
 575                 "BL_PWM_1V8",
 576                 "UART_AP_TX_DBG_RX",
 577                 "UART_DBG_TX_AP_RX",
 578                 "EN_SPKR",
 579                 "AP_EC_WARM_RST_REQ",
 580                 "UART_SCP_TX_DBGCON_RX",
 581                 "UART_DBGCON_TX_SCP_RX",
 582                 "",
 583                 "",
 584                 "KPCOL0",
 585                 "",
 586                 "MT6315_GPU_INT",
 587                 "MT6315_PROC_BC_INT",
 588                 "SD_CMD",
 589                 "SD_CLK",
 590                 "SD_DAT0",
 591                 "SD_DAT1",
 592                 "SD_DAT2",
 593                 "SD_DAT3",
 594                 "EMMC_DAT7",
 595                 "EMMC_DAT6",
 596                 "EMMC_DAT5",
 597                 "EMMC_DAT4",
 598                 "EMMC_RSTB",
 599                 "EMMC_CMD",
 600                 "EMMC_CLK",
 601                 "EMMC_DAT3",
 602                 "EMMC_DAT2",
 603                 "EMMC_DAT1",
 604                 "EMMC_DAT0",
 605                 "EMMC_DSL",
 606                 "",
 607                 "",
 608                 "MT6360_INT_ODL",
 609                 "SCP_JTAG0_TRSTN",
 610                 "AP_SPI_EC_CS_L",
 611                 "AP_SPI_EC_CLK",
 612                 "AP_SPI_EC_MOSI",
 613                 "AP_SPI_EC_MISO",
 614                 "SCP_JTAG0_TMS",
 615                 "SCP_JTAG0_TCK",
 616                 "SCP_JTAG0_TDO",
 617                 "SCP_JTAG0_TDI",
 618                 "AP_SPI_FLASH_CS_L",
 619                 "AP_SPI_FLASH_CLK",
 620                 "AP_SPI_FLASH_MOSI",
 621                 "AP_SPI_FLASH_MISO";
 622
 623         aud_pins_default: audio-default-pins {
 624                 pins-cmd-dat {
 625                     pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>,
 626                              <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>,
 627                              <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>,
 628                              <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>,
 629                              <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>,
 630                              <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>,
 631                              <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>,
 632                              <PINMUX_GPIO0__FUNC_TDMIN_MCK>,
 633                              <PINMUX_GPIO1__FUNC_TDMIN_DI>,
 634                              <PINMUX_GPIO2__FUNC_TDMIN_LRCK>,
 635                              <PINMUX_GPIO3__FUNC_TDMIN_BCK>,
 636                              <PINMUX_GPIO60__FUNC_I2SO2_D0>,
 637                              <PINMUX_GPIO49__FUNC_I2SIN_D0>,
 638                              <PINMUX_GPIO50__FUNC_I2SO1_MCK>,
 639                              <PINMUX_GPIO51__FUNC_I2SO1_BCK>,
 640                              <PINMUX_GPIO52__FUNC_I2SO1_WS>,
 641                              <PINMUX_GPIO53__FUNC_I2SO1_D0>;
 642                 };
 643
 644                 pins-hp-jack-int-odl {
 645                         pinmux = <PINMUX_GPIO89__FUNC_GPIO89>;
 646                         input-enable;
 647                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 648                 };
 649         };
 650
 651         cr50_int: cr50-irq-default-pins {
 652                 pins-gsc-ap-int-odl {
 653                         pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
 654                         input-enable;
 655                 };
 656         };
 657
 658         cros_ec_int: cros-ec-irq-default-pins {
 659                 pins-ec-ap-int-odl {
 660                         pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
 661                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 662                         input-enable;
 663                 };
 664         };
 665
 666         edptx_pins_default: edptx-default-pins {
 667                 pins-cmd-dat {
 668                         pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>;
 669                         bias-pull-up;
 670                 };
 671         };
 672
 673         disp_pwm0_pin_default: disp-pwm0-default-pins {
 674                 pins-disp-pwm {
 675                         pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
 676                                  <PINMUX_GPIO97__FUNC_DISP_PWM0>;
 677                 };
 678         };
 679
 680         dptx_pin: dptx-default-pins {
 681                 pins-cmd-dat {
 682                         pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;
 683                         bias-pull-up;
 684                 };
 685         };
 686
 687         i2c0_pins: i2c0-default-pins {
 688                 pins-bus {
 689                         pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
 690                                  <PINMUX_GPIO9__FUNC_SCL0>;
 691                         bias-disable;
 692                         drive-strength-microamp = <1000>;
 693                 };
 694         };
 695
 696         i2c1_pins: i2c1-default-pins {
 697                 pins-bus {
 698                         pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
 699                                  <PINMUX_GPIO11__FUNC_SCL1>;
 700                         bias-pull-up = <1000>;
 701                         drive-strength-microamp = <1000>;
 702                 };
 703         };
 704
 705         i2c2_pins: i2c2-default-pins {
 706                 pins-bus {
 707                         pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
 708                                  <PINMUX_GPIO13__FUNC_SCL2>;
 709                         bias-disable;
 710                         drive-strength-microamp = <1000>;
 711                 };
 712         };
 713
 714         i2c3_pins: i2c3-default-pins {
 715                 pins-bus {
 716                         pinmux = <PINMUX_GPIO14__FUNC_SDA3>,
 717                                  <PINMUX_GPIO15__FUNC_SCL3>;
 718                         bias-pull-up = <1000>;
 719                         drive-strength-microamp = <1000>;
 720                 };
 721         };
 722
 723         i2c4_pins: i2c4-default-pins {
 724                 pins-bus {
 725                         pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
 726                                  <PINMUX_GPIO17__FUNC_SCL4>;
 727                         bias-pull-up = <1000>;
 728                         drive-strength = <4>;
 729                 };
 730         };
 731
 732         i2c5_pins: i2c5-default-pins {
 733                 pins-bus {
 734                         pinmux = <PINMUX_GPIO29__FUNC_SCL5>,
 735                                  <PINMUX_GPIO30__FUNC_SDA5>;
 736                         bias-disable;
 737                         drive-strength-microamp = <1000>;
 738                 };
 739         };
 740
 741         i2c7_pins: i2c7-default-pins {
 742                 pins-bus {
 743                         pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
 744                                  <PINMUX_GPIO28__FUNC_SDA7>;
 745                         bias-disable;
 746                 };
 747         };
 748
 749         mmc0_pins_default: mmc0-default-pins {
 750                 pins-cmd-dat {
 751                         pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
 752                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
 753                                  <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
 754                                  <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
 755                                  <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
 756                                  <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
 757                                  <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
 758                                  <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
 759                                  <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
 760                         input-enable;
 761                         drive-strength = <6>;
 762                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 763                 };
 764
 765                 pins-clk {
 766                         pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
 767                         drive-strength = <6>;
 768                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 769                 };
 770
 771                 pins-rst {
 772                         pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
 773                         drive-strength = <6>;
 774                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 775                 };
 776         };
 777
 778         mmc0_pins_uhs: mmc0-uhs-pins {
 779                 pins-cmd-dat {
 780                         pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
 781                                  <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
 782                                  <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
 783                                  <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
 784                                  <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
 785                                  <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
 786                                  <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
 787                                  <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
 788                                  <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
 789                         input-enable;
 790                         drive-strength = <8>;
 791                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 792                 };
 793
 794                 pins-clk {
 795                         pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
 796                         drive-strength = <8>;
 797                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 798                 };
 799
 800                 pins-ds {
 801                         pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
 802                         drive-strength = <8>;
 803                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 804                 };
 805
 806                 pins-rst {
 807                         pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
 808                         drive-strength = <8>;
 809                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 810                 };
 811         };
 812
 813         mmc1_pins_detect: mmc1-detect-pins {
 814                 pins-insert {
 815                         pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
 816                         bias-pull-up;
 817                 };
 818         };
 819
 820         mmc1_pins_default: mmc1-default-pins {
 821                 pins-cmd-dat {
 822                         pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
 823                                  <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
 824                                  <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
 825                                  <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
 826                                  <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
 827                         input-enable;
 828                         drive-strength = <8>;
 829                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 830                 };
 831
 832                 pins-clk {
 833                         pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
 834                         drive-strength = <8>;
 835                         bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
 836                 };
 837         };
 838
 839         nor_pins_default: nor-default-pins {
 840                 pins-ck-io {
 841                         pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
 842                                  <PINMUX_GPIO141__FUNC_SPINOR_CK>,
 843                                  <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
 844                         drive-strength = <6>;
 845                         bias-pull-down;
 846                 };
 847
 848                 pins-cs {
 849                         pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>;
 850                         drive-strength = <6>;
 851                         bias-pull-up;
 852                 };
 853         };
 854
 855         pio_default: pio-default-pins {
 856                 pins-wifi-enable {
 857                         pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
 858                         output-high;
 859                         drive-strength = <14>;
 860                 };
 861
 862                 pins-low-power-pd {
 863                         pinmux = <PINMUX_GPIO25__FUNC_GPIO25>,
 864                                  <PINMUX_GPIO26__FUNC_GPIO26>,
 865                                  <PINMUX_GPIO46__FUNC_GPIO46>,
 866                                  <PINMUX_GPIO47__FUNC_GPIO47>,
 867                                  <PINMUX_GPIO48__FUNC_GPIO48>,
 868                                  <PINMUX_GPIO65__FUNC_GPIO65>,
 869                                  <PINMUX_GPIO66__FUNC_GPIO66>,
 870                                  <PINMUX_GPIO67__FUNC_GPIO67>,
 871                                  <PINMUX_GPIO68__FUNC_GPIO68>,
 872                                  <PINMUX_GPIO128__FUNC_GPIO128>,
 873                                  <PINMUX_GPIO129__FUNC_GPIO129>;
 874                         input-enable;
 875                         bias-pull-down;
 876                 };
 877
 878                 pins-low-power-pupd {
 879                         pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
 880                                  <PINMUX_GPIO78__FUNC_GPIO78>,
 881                                  <PINMUX_GPIO79__FUNC_GPIO79>,
 882                                  <PINMUX_GPIO80__FUNC_GPIO80>,
 883                                  <PINMUX_GPIO83__FUNC_GPIO83>,
 884                                  <PINMUX_GPIO85__FUNC_GPIO85>,
 885                                  <PINMUX_GPIO90__FUNC_GPIO90>,
 886                                  <PINMUX_GPIO91__FUNC_GPIO91>,
 887                                  <PINMUX_GPIO93__FUNC_GPIO93>,
 888                                  <PINMUX_GPIO94__FUNC_GPIO94>,
 889                                  <PINMUX_GPIO95__FUNC_GPIO95>,
 890                                  <PINMUX_GPIO96__FUNC_GPIO96>,
 891                                  <PINMUX_GPIO104__FUNC_GPIO104>,
 892                                  <PINMUX_GPIO105__FUNC_GPIO105>,
 893                                  <PINMUX_GPIO107__FUNC_GPIO107>;
 894                         input-enable;
 895                         bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
 896                 };
 897         };
 898
 899         rt1019p_pins_default: rt1019p-default-pins {
 900                 pins-amp-sdb {
 901                         pinmux = <PINMUX_GPIO100__FUNC_GPIO100>;
 902                         output-low;
 903                 };
 904         };
 905
 906         scp_pins: scp-default-pins {
 907                 pins-vreq {
 908                         pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>;
 909                         bias-disable;
 910                         input-enable;
 911                 };
 912         };
 913
 914         spi0_pins: spi0-default-pins {
 915                 pins-cs-mosi-clk {
 916                         pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
 917                                  <PINMUX_GPIO134__FUNC_SPIM0_MO>,
 918                                  <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
 919                         bias-disable;
 920                 };
 921
 922                 pins-miso {
 923                         pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
 924                         bias-pull-down;
 925                 };
 926         };
 927
 928         subpmic_default: subpmic-default-pins {
 929                 subpmic_pin_irq: pins-subpmic-int-n {
 930                         pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
 931                         input-enable;
 932                         bias-pull-up;
 933                 };
 934         };
 935
 936         trackpad_pins: trackpad-default-pins {
 937                 pins-int-n {
 938                         pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
 939                         input-enable;
 940                         bias-pull-up;
 941                 };
 942         };
 943
 944         touchscreen_pins: touchscreen-default-pins {
 945                 pins-int-n {
 946                         pinmux = <PINMUX_GPIO92__FUNC_GPIO92>;
 947                         input-enable;
 948                         bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
 949                 };
 950                 pins-rst {
 951                         pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
 952                         output-high;
 953                 };
 954                 pins-report-sw {
 955                         pinmux = <PINMUX_GPIO57__FUNC_GPIO57>;
 956                         output-low;
 957                 };
 958         };
 959 };
 960
 961 &pmic {
 962         interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
 963 };
 964
 965 &scp {
 966         status = "okay";
 967
 968         firmware-name = "mediatek/mt8195/scp.img";
 969         memory-region = <&scp_mem>;
 970         pinctrl-names = "default";
 971         pinctrl-0 = <&scp_pins>;
 972
 973         cros-ec-rpmsg {
 974                 compatible = "google,cros-ec-rpmsg";
 975                 mediatek,rpmsg-name = "cros-ec-rpmsg";
 976         };
 977 };
 978
 979 &sound {
 980         status = "okay";
 981
 982         mediatek,adsp = <&adsp>;
 983         mediatek,dai-link =
 984                 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE",
 985                 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE",
 986                 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5";
 987         pinctrl-names = "default";
 988         pinctrl-0 = <&aud_pins_default>;
 989 };
 990
 991 &spi0 {
 992         status = "okay";
 993
 994         pinctrl-names = "default";
 995         pinctrl-0 = <&spi0_pins>;
 996         mediatek,pad-select = <0>;
 997
 998         cros_ec: ec@0 {
 999                 #address-cells = <1>;
1000                 #size-cells = <0>;
1001
1002                 compatible = "google,cros-ec-spi";
1003                 reg = <0>;
1004                 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>;
1005                 pinctrl-names = "default";
1006                 pinctrl-0 = <&cros_ec_int>;
1007                 spi-max-frequency = <3000000>;
1008
1009                 keyboard-backlight {
1010                         compatible = "google,cros-kbd-led-backlight";
1011                 };
1012
1013                 i2c_tunnel: i2c-tunnel {
1014                         compatible = "google,cros-ec-i2c-tunnel";
1015                         google,remote-bus = <0>;
1016                         #address-cells = <1>;
1017                         #size-cells = <0>;
1018                 };
1019
1020                 mt_pmic_vmc_ldo_reg: regulator@0 {
1021                         compatible = "google,cros-ec-regulator";
1022                         reg = <0>;
1023                         regulator-name = "mt_pmic_vmc_ldo";
1024                         regulator-min-microvolt = <1200000>;
1025                         regulator-max-microvolt = <3600000>;
1026                 };
1027
1028                 mt_pmic_vmch_ldo_reg: regulator@1 {
1029                         compatible = "google,cros-ec-regulator";
1030                         reg = <1>;
1031                         regulator-name = "mt_pmic_vmch_ldo";
1032                         regulator-min-microvolt = <2700000>;
1033                         regulator-max-microvolt = <3600000>;
1034                 };
1035
1036                 typec {
1037                         compatible = "google,cros-ec-typec";
1038                         #address-cells = <1>;
1039                         #size-cells = <0>;
1040
1041                         usb_c0: connector@0 {
1042                                 compatible = "usb-c-connector";
1043                                 reg = <0>;
1044                                 power-role = "dual";
1045                                 data-role = "host";
1046                                 try-power-role = "source";
1047                         };
1048
1049                         usb_c1: connector@1 {
1050                                 compatible = "usb-c-connector";
1051                                 reg = <1>;
1052                                 power-role = "dual";
1053                                 data-role = "host";
1054                                 try-power-role = "source";
1055                         };
1056                 };
1057         };
1058 };
1059
1060 &spmi {
1061         #address-cells = <2>;
1062         #size-cells = <0>;
1063
1064         mt6315@6 {
1065                 compatible = "mediatek,mt6315-regulator";
1066                 reg = <0x6 SPMI_USID>;
1067
1068                 regulators {
1069                         mt6315_6_vbuck1: vbuck1 {
1070                                 regulator-compatible = "vbuck1";
1071                                 regulator-name = "Vbcpu";
1072                                 regulator-min-microvolt = <300000>;
1073                                 regulator-max-microvolt = <1193750>;
1074                                 regulator-enable-ramp-delay = <256>;
1075                                 regulator-ramp-delay = <6250>;
1076                                 regulator-allowed-modes = <0 1 2>;
1077                                 regulator-always-on;
1078                         };
1079                 };
1080         };
1081
1082         mt6315@7 {
1083                 compatible = "mediatek,mt6315-regulator";
1084                 reg = <0x7 SPMI_USID>;
1085
1086                 regulators {
1087                         mt6315_7_vbuck1: vbuck1 {
1088                                 regulator-compatible = "vbuck1";
1089                                 regulator-name = "Vgpu";
1090                                 regulator-min-microvolt = <625000>;
1091                                 regulator-max-microvolt = <1193750>;
1092                                 regulator-enable-ramp-delay = <256>;
1093                                 regulator-ramp-delay = <6250>;
1094                                 regulator-allowed-modes = <0 1 2>;
1095                                 regulator-always-on;
1096                         };
1097                 };
1098         };
1099 };
1100
1101 &u3phy0 {
1102         status = "okay";
1103 };
1104
1105 &u3phy1 {
1106         status = "okay";
1107 };
1108
1109 &u3phy2 {
1110         status = "okay";
1111 };
1112
1113 &u3phy3 {
1114         status = "okay";
1115 };
1116
1117 &uart0 {
1118         status = "okay";
1119 };
1120
1121 &xhci0 {
1122         status = "okay";
1123
1124         vusb33-supply = <&mt6359_vusb_ldo_reg>;
1125         vbus-supply = <&usb_vbus>;
1126 };
1127
1128 &xhci1 {
1129         status = "okay";
1130
1131         vusb33-supply = <&mt6359_vusb_ldo_reg>;
1132         vbus-supply = <&usb_vbus>;
1133 };
1134
1135 &xhci2 {
1136         status = "okay";
1137
1138         vusb33-supply = <&mt6359_vusb_ldo_reg>;
1139         vbus-supply = <&usb_vbus>;
1140 };
1141
1142 &xhci3 {
1143         status = "okay";
1144
1145         /* MT7921's USB Bluetooth has issues with USB2 LPM */
1146         usb2-lpm-disable;
1147         vusb33-supply = <&mt6359_vusb_ldo_reg>;
1148         vbus-supply = <&usb_vbus>;
1149 };
1150
1151 #include <arm/cros-ec-keyboard.dtsi>
1152 #include <arm/cros-ec-sbs.dtsi>
1153
1154 &keyboard_controller {
1155         function-row-physmap = <
1156                 MATRIX_KEY(0x00, 0x02, 0)       /* T1 */
1157                 MATRIX_KEY(0x03, 0x02, 0)       /* T2 */
1158                 MATRIX_KEY(0x02, 0x02, 0)       /* T3 */
1159                 MATRIX_KEY(0x01, 0x02, 0)       /* T4 */
1160                 MATRIX_KEY(0x03, 0x04, 0)       /* T5 */
1161                 MATRIX_KEY(0x02, 0x04, 0)       /* T6 */
1162                 MATRIX_KEY(0x01, 0x04, 0)       /* T7 */
1163                 MATRIX_KEY(0x02, 0x09, 0)       /* T8 */
1164                 MATRIX_KEY(0x01, 0x09, 0)       /* T9 */
1165                 MATRIX_KEY(0x00, 0x04, 0)       /* T10 */
1166         >;
1167
1168         linux,keymap = <
1169                 MATRIX_KEY(0x00, 0x02, KEY_BACK)
1170                 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
1171                 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
1172                 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
1173                 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
1174                 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
1175                 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
1176                 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
1177                 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
1178                 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
1179
1180                 CROS_STD_MAIN_KEYMAP
1181         >;
1182 };